more involved
with Dove than Sebastian is now? Sebastian?
Uhm, yeah, please change the MAINTAINERS entry.
I haven't been able to follow neither Dove nor mvebu discussion
lately.
If you want to take over, feel free to add my
Acked-by: Sebastian Hesselbarth
Sebastian
On 19.01.2017 22:12, Chris Packham wrote:
> On 14/01/17 20:50, Chris Packham wrote:
>> On 13/01/17 22:54, Sebastian Hesselbarth wrote:
>>> On 13.01.2017 10:12, Chris Packham wrote:
>>>> From: Kalyan Kinthada
>>>>
>>>> This pinctrl driver suppo
On 13.01.2017 10:12, Chris Packham wrote:
From: Kalyan Kinthada
This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs
from Marvell.
Signed-off-by: Kalyan Kinthada
Signed-off-by: Chris Packham
Acked-by: Rob Herring
Acked-by: Sebastian Hesselbarth
---
Notes:
Changes in
oes not.
- MPP_MODE20 binding "gpio" and driver "gpo" differ.
- MPP_MODE20 binding "dev","we" and driver "dev","we0" differ.
- MPP_MODE21 through MPP_MODE30 binding "gpio" and driver "gpo" differ.
- remove spaces before "0, 0" in mv98dx3236_mpp_gpio_ranges.
Most of it is cosmetic stuff, so if you fix it feel free to add my
Acked-by: Sebastian Hesselbarth
Sebastian
Cc: Rafał Miłecki
Cc: Sebastian Hesselbarth
Feel free to add my
Acked-by: Sebastian Hesselbarth
for Patches 23, 25, 27, 29, 30, 31, 32, 33, 35, 36, i.e. all I
have been in Cc.
Sebastian
Cc: Stefan Roese
Cc: Thomas Petazzoni
Signed-off-by: Alexandre Belloni
---
arch/arm/boot/dts
and the order
of the E-mails below should represent that.
Thanks for taking over and if you reword the Patch, feel free to
add my
Acked-by: Sebastian Hesselbarth
Sebastian
Signed-off-by: Jisheng Zhang
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINT
On 06.09.2016 10:40, Jisheng Zhang wrote:
This is a clean up series to fix berlin arm platforms dtc warnings.
Firstly we remove skeleton.dtsi inclusion. Then add missing unit name
of /soc node and /memory node. Lastly, we fix regulators' name
Jisheng Zhang (10):
ARM: dts: berlin2q: Remove ske
On 30.08.2016 10:24, Philipp Zabel wrote:
Visible only if COMPILE_TEST is enabled, this allows to include the
driver in build tests.
Cc: Antoine Tenart
Cc: Sebastian Hesselbarth
Reviewed-by: Masahiro Yamada
Signed-off-by: Philipp Zabel
Sorry for the late reply, FWIW
Acked-by: Sebastian
in header files as they're useless and we're in the
area.
Cc: Jisheng Zhang
Cc: Alexandre Belloni
Cc: Sebastian Hesselbarth
Signed-off-by: Stephen Boyd
---
Changes from v1:
* Fixed alignment
* Added note about dropping __init in commit text
drivers/clk/berlin/berlin2-av
On July 23, 2016 12:45:23 AM Andreas Klinger wrote:
Sebastian Hesselbarth schrieb am Fri, 22.
Jul 18:59:
On 16.07.2016 17:07, Andreas Klinger wrote:
>On Marvell mv88f6180 with pin control driver one can not use multi
>purpose pins 35 through 44.
>I'm using this controller
6180 uses MPP[19:0] and MPP[44:35], i.e. there is a hole
in the middle.
So, looking at your patch, you basically move MPP[n] to MPP[n+15]
starting with MPP[20] to match the HW spec.
That's fine with me, if it works on 6180 Kirkwood.
Signed-off-by: Andreas Klinger
Reviewed-by: Sebastian H
On 07.07.2016 07:48, Jisheng Zhang wrote:
> On Wed, 6 Jul 2016 19:49:01 +0200 Sebastian Hesselbarth wrote:
>> On 16.06.2016 10:40, Jisheng Zhang wrote:
>>> This patch adds the L2 cache topology for berlin4ct which has 1MB L2
>>> cache.
>>>
>>> Signed-o
On 16.12.2015 21:30, Sebastian Hesselbarth wrote:
> On 15.12.2015 15:57, Jisheng Zhang wrote:
>> Commit ac82d1277215 ("arm64: perf: add Cortex-A53 support") adds the
>> cortex A53 PMU support, thus instead of using the generic armv8-pmuv3
>> compatibility u
On 06.07.2016 08:41, Jisheng Zhang wrote:
> When we add watchdog dt nodes into berlin dtsi, the dw_wdt driver can't
> support multiple variants, so we have to keep one enabled and others
> disabled. After commit f29a72c24ad4 ("watchdog: dw_wdt: Convert to use
> watchdog infrastructure"), the dw_wdt
On 16.06.2016 10:40, Jisheng Zhang wrote:
> This patch adds the L2 cache topology for berlin4ct which has 1MB L2
> cache.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/marv
On 15.12.2015 15:57, Jisheng Zhang wrote:
> Commit ac82d1277215 ("arm64: perf: add Cortex-A53 support") adds the
> cortex A53 PMU support, thus instead of using the generic armv8-pmuv3
> compatibility use the more specific Cortex A53 compatibility.
>
> Signed-off-by: Jisheng Zhang
> ---
> Since v
:arch/arm/mach-berlin/
F:arch/arm/boot/dts/berlin*
+F: arch/arm64/boot/dts/marvell/berlin*
For Berlin,
Acked-by: Sebastian Hesselbarth
Thanks!
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the body of a message to majord...@vger.kerne
On 07.12.2015 14:09, Jisheng Zhang wrote:
> CLKID_SDIO is used as the 2nd optional clk for all sdhci hosts in BG2Q.
> We removed CLK_IGNORE_UNUSED from CLKID_SDIO's flag. These two patches
> fixes this clk issue.
>
> Jisheng Zhang (2):
> ARM: dts: berlin: correct BG2Q's sdhci2 2nd clock
> ARM:
On 19.11.2015 21:31, Sebastian Hesselbarth wrote:
> On 16.11.2015 11:56, Jisheng Zhang wrote:
>> Add or fix the optional clock property, then remove the CLK_IGNORE_UNUSED
>> flag for sdio clk(s).
>>
>> This is a partialy resend of
>> http://lists.infradead.or
On 30.11.2015 14:41, Jisheng Zhang wrote:
> This patch adds an idle-states node to describe the berlin4ct idle
> states and also adds references to the idle-states node in all CPU
> nodes. After this patch cpuidle is enabled.
>
> Signed-off-by: Jisheng Zhang
Applied to berlin64/dt with Lorenzo's
On 30.11.2015 14:54, Jisheng Zhang wrote:
> The sdhci1 on Marvell BG2Q DMP board is used as sdcard interface, we
> have gpios for card detection, write-protect, vqmmc and vmmc.
>
> This patch adds pinmux for this sdcard interface, then adds regulators
> for vmmc and vqmmc, lastly adds cd-gpios, wp
On 29.11.2015 15:35, Thomas Petazzoni wrote:
Adding Ezequiel Garcia in Cc.
On Sat, 28 Nov 2015 12:14:08 +0100, Sebastian Hesselbarth wrote:
The NAND device found on Lenovo ix4-300d uses 4-bit BCH ECC protection.
Add the corresponding properties to the NAND node.
If the ONFI information from
On 28.11.2015 18:00, Andrew Lunn wrote:
> On Sat, Nov 28, 2015 at 12:14:06PM +0100, Sebastian Hesselbarth wrote:
>> NAND flash partitions should be part of a partitions sub-node
>> not the flash node itself. Move the partitions which will also
>> allow different bootloaders
On 28.11.2015 17:52, Andrew Lunn wrote:
> On Sat, Nov 28, 2015 at 12:14:05PM +0100, Sebastian Hesselbarth wrote:
>> Current NAND node has an additional flash partition for the whole
>> flash overlapping with real partitions. Remove this partition as
>> the whole flash is alrea
On 23.11.2015 05:59, Jisheng Zhang wrote:
> On Fri, 20 Nov 2015 21:19:46 +0100
> Sebastian Hesselbarth wrote:
>> On 20.11.2015 04:34, Jisheng Zhang wrote:
>>> On Thu, 19 Nov 2015 21:47:05 +0100
>>> Sebastian Hesselbarth wrote:
>>>> On 16.11.2015 12:09
gt;
> I'm not maintainers, but this patch looks good to me. So if you need,
>
> Acked-by: Jisheng Zhang
And here comes the maintainer's
Acked-by: Sebastian Hesselbarth
Thanks!
>> ---
>>
>> drivers/pinctrl/Makefile| 2 +-
>> drivers/p
On 26.11.2015 14:13, Jisheng Zhang wrote:
> The sdhci1 on Marvell BG2Q DMP board is used as sdcard interface, we
> have gpios for card detection, write-protect, vqmmc and vmmc.
>
> This patch adds pinmux for this sdcard interface, then adds regulators
> for vmmc and vqmmc, lastly adds cd-gpios, wp
The NAND device found on Lenovo ix4-300d uses 4-bit BCH ECC protection.
Add the corresponding properties to the NAND node.
Signed-off-by: Sebastian Hesselbarth
---
Cc: Jason Cooper
Cc: Andrew Lunn
Cc: Gregory Clement
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
ame offset.
Patch 4 finally adds ECC properties for 4-bit BCH ECC used by the ix4-300d
flash.
Sebastian
Sebastian Hesselbarth (4):
ARM: dt: mvebu: ix4-300d: remove whole flash partition
ARM: dt: mvebu: ix4-300d: move partitions to partition sub-node
ARM: dt: mvebu: ix4-300d: Cleanup NAND
NAND flash partitions should be part of a partitions sub-node
not the flash node itself. Move the partitions which will also
allow different bootloaders get rid of the stock partitions
easily by removing the partitions node.
Signed-off-by: Sebastian Hesselbarth
---
Cc: Jason Cooper
Cc: Andrew
Prefix all partition reg properties to 32-bit to ease readability.
While at it, also remove a stale x in front of boot partition
offset and make some upper-case hex numbers lower-case.
Signed-off-by: Sebastian Hesselbarth
---
Cc: Jason Cooper
Cc: Andrew Lunn
Cc: Gregory Clement
Cc: Rob
Current NAND node has an additional flash partition for the whole
flash overlapping with real partitions. Remove this partition as
the whole flash is already represented by the NAND device itself.
Signed-off-by: Sebastian Hesselbarth
---
Cc: Jason Cooper
Cc: Andrew Lunn
Cc: Gregory Clement
Cc
setting. Also, if
there is no supported setting for this variant, do not complain at
all.
Signed-off-by: Sebastian Hesselbarth
Reported-by: Linus Walleij
---
Changelog:
v1->v2:
- modify settings loop to allow to check for !num_settings
Cc: Linus Walleij
Cc: Simon Guinot
Cc: Thomas Petazz
On 28.11.2015 11:14, Sebastian Hesselbarth wrote:
> Common MVEBU pinctrl driver core gets an array of controls to modify
> a specific set of registers and an array of modes for each pingroup
> from each of the different SoC families of MVEBU.
>
> Some SoC families comprise differen
mode setting. Also, if
there is no supported setting for this variant, do not complain at
all.
Signed-off-by: Sebastian Hesselbarth
Reported-by: Linus Walleij
---
Cc: Linus Walleij
Cc: Simon Guinot
Cc: Thomas Petazzoni
Cc: Jason Cooper
Cc: Andrew Lunn
Cc: Gregory Clement
Cc: linux-g
On 24.11.2015 03:35, Jisheng Zhang wrote:
On Mon, 23 Nov 2015 16:54:44 +0800
Jisheng Zhang wrote:
On Mon, 23 Nov 2015 09:30:42 +0100
Sebastian Hesselbarth wrote:
On 23.11.2015 08:21, Jisheng Zhang wrote:
On Fri, 20 Nov 2015 22:06:59 +0100
Sebastian Hesselbarth wrote:
On 20.11.2015 09:42
On 23.11.2015 08:21, Jisheng Zhang wrote:
On Fri, 20 Nov 2015 22:06:59 +0100
Sebastian Hesselbarth wrote:
On 20.11.2015 09:42, Jisheng Zhang wrote:
Add syspll, mempll, cpupll, gateclk and berlin-clk nodes.
Signed-off-by: Jisheng Zhang
---
[...]
+ syspll: syspll
On 23.11.2015 03:49, Jisheng Zhang wrote:
On Fri, 20 Nov 2015 22:19:32 +0100
Sebastian Hesselbarth wrote:
On 20.11.2015 10:47, Jisheng Zhang wrote:
Enable all i2c nodes for the Marvell berlin BG4CT STB board.
Signed-off-by: Jisheng Zhang
---
arch/arm64/boot/dts/marvell/berlin4ct-stb.dts
On 20.11.2015 10:47, Jisheng Zhang wrote:
> The Marvell Berlin BG4CT SoC has 4 TWSI which are compatible with the
> Synopsys DesignWare I2C driver. Add the corresponding nodes.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 52
> +++
On 20.11.2015 10:47, Jisheng Zhang wrote:
> Enable all i2c nodes for the Marvell berlin BG4CT STB board.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm64/boot/dts/marvell/berlin4ct-stb.dts | 50
> +++
> 1 file changed, 50 insertions(+)
>
> diff --git a/arch/arm64/boo
On 20.11.2015 09:42, Jisheng Zhang wrote:
> Add syspll, mempll, cpupll, gateclk and berlin-clk nodes.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 38
> ++
> 1 file changed, 38 insertions(+)
>
> diff --git a/arch/arm64/boot/d
On 20.11.2015 09:42, Jisheng Zhang wrote:
> This patch supports the gateclk and berlin-clk in berlin4ct SoC.
>
> Signed-off-by: Jisheng Zhang
> ---
> drivers/clk/berlin/Makefile| 2 +-
> drivers/clk/berlin/clk-berlin4ct.c | 97
> ++
> 2 files changed
On 20.11.2015 09:42, Jisheng Zhang wrote:
> Add common clk driver for Marvell SoCs newer than BG2, BG2CD, BG2Q.
> berlin_clk_setup() is provided to setup and register such kind of clks.
>
> Signed-off-by: Jisheng Zhang
> ---
> drivers/clk/berlin/Makefile | 2 +-
> drivers/clk/berlin/clk.c|
On 20.11.2015 09:42, Jisheng Zhang wrote:
> Add pll driver for Marvell SoCs newer than BG2, BG2CD, BG2Q.
>
> Signed-off-by: Jisheng Zhang
> ---
> drivers/clk/berlin/Makefile | 1 +
> drivers/clk/berlin/pll.c| 133
>
> 2 files changed, 134 inser
On 20.11.2015 04:34, Jisheng Zhang wrote:
> On Thu, 19 Nov 2015 21:47:05 +0100
> Sebastian Hesselbarth wrote:
>> On 16.11.2015 12:09, Jisheng Zhang wrote:
>>> The Marvell Berlin BG2Q has 3 watchdogs which are compatible with the
>>> snps,dw-wdt driver sit in the sysm
get
* all outputs running.
*/
After you fixed the style issue, you can add my
Acked-by: Sebastian Hesselbarth
Thanks!
+ si5351_reg_write(hwdata->drvdata, SI5351_PLL_RESET,
+SI5351_PLL_RESET_A | SI5351_PLL_RESET_B);
+
dev_dbg(&hwdata->drvdata-&g
On 19.11.2015 14:40, Jacob Siverskog wrote:
> This is according to figure 12 ("I2C Programming Procedure") in
> "Si5351A/B/C Data Sheet"
> (https://www.silabs.com/Support%20Documents/TechnicalDocs/Si5351-B.pdf).
>
> Without the PLL soft reset, we were unable to get three outputs
> working at the s
On 16.11.2015 12:37, Jisheng Zhang wrote:
> The firmware can support PSCI-1.0 in fact. This change also enables
> suspend to ram on Marvell berlin arm64 SoC.
>
> Signed-off-by: Jisheng Zhang
Appled to berlin64/dt.
Thanks!
> ---
> arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 2 +-
> 1 file cha
> ...
> }
> //
>
> Signed-off-by: Julia Lawall
Acked-by: Sebastian Hesselbarth
Thanks!
> ---
> drivers/phy/phy-berlin-sata.c | 20 ++--
> 1 file changed, 14 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/phy/phy-berlin-sata.c b/dr
On 16.11.2015 12:09, Jisheng Zhang wrote:
> The Marvell Berlin BG2Q has 3 watchdogs which are compatible with the
> snps,dw-wdt driver sit in the sysmgr domain. This patch adds the
> corresponding device tree nodes.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm/boot/dts/berlin2q.dtsi | 24 ++
On 16.11.2015 11:56, Jisheng Zhang wrote:
> Add or fix the optional clock property, then remove the CLK_IGNORE_UNUSED
> flag for sdio clk(s).
>
> This is a partialy resend of
> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/379457.html
>
> patch3, patch4 has been merged.
Gre
On 16.11.2015 11:46, Jisheng Zhang wrote:
> The default interrupt-parent has been set in the upper layer, apb@e8
> and apb@fc for example. So if the interrupt-parent isn't changed, we
> don't need to set it again. This patch removes the dumplicated
> interrupt-parent settings.
>
> Signed-o
On 16.11.2015 11:43, Jisheng Zhang wrote:
> The eMMC is non-removable so is marked with the non-removable DT
> property to avoid having to redetect it after a suspend/resume.
>
> But it also has the broken-cd property which is wrong since only
> one of the DT properties for card detection should b
or 2/3) to berlin/doc that
I can send a PR for to Jonathan.
If Jonathan prefers to pick-up the patches himself, feel free
to add my
Acked-by: Sebastian Hesselbarth
Sebastian
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the body of a message to major
-
[...]
> arch/arm/mach-berlin/platsmp.c | 2 +-
[...]
> 54 files changed, 64 insertions(+), 64 deletions(-)
For berlin,
Acked-by: Sebastian Hesselbarth
--
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the body of a message to majord...@vger.
Signed-off-by: Jisheng Zhang
>>> Acked-by: Sebastian Hesselbarth
>>> Acked-by: Antoine Tenart
>>> Acked-by: Linus Walleij
>>> ---
>>> this small patch is missed:
>>>
>>> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/3
On 16.10.2015 16:15, Linus Walleij wrote:
On Fri, Oct 16, 2015 at 9:37 AM, Jisheng Zhang wrote:
This is to add the pinctrl dependency for Marvell Berlin SoCs.
Signed-off-by: Jisheng Zhang
Acked-by: Sebastian Hesselbarth
Acked-by: Antoine Tenart
Acked-by: Linus Walleij
Please push this
On 16.10.2015 16:18, Linus Walleij wrote:
On Fri, Oct 16, 2015 at 9:37 AM, Jisheng Zhang wrote:
Add urt0 txd and rxd muxing setup in the dtsi because uart0 always uses
them to work, no other possibilities.
Signed-off-by: Jisheng Zhang
Acked-by: Sebastian Hesselbarth
Acked-by: Antoine
On 16.10.2015 16:17, Linus Walleij wrote:
On Fri, Oct 16, 2015 at 9:37 AM, Jisheng Zhang wrote:
Add the avio, soc, sm pinctrl nodes for Marvell berlin4ct SoC.
Signed-off-by: Jisheng Zhang
Acked-by: Sebastian Hesselbarth
Acked-by: Antoine Tenart
Acked-by: Linus Walleij
Funnel this
On 16.10.2015 16:19, Linus Walleij wrote:
On Tue, Oct 13, 2015 at 11:31 PM, Antoine Tenart
wrote:
This patch removes the pinctrl driver selection from the mach-berlin
Kconfig file. This is now done in the Berlin pinctrl driver Kconfig.
Signed-off-by: Antoine Tenart
Acked-by: Linus Walleij
On 16.10.2015 13:40, Jisheng Zhang wrote:
On Thu, 15 Oct 2015 23:41:22 +0200
Sebastian Hesselbarth wrote:
On 12.10.2015 07:46, Jisheng Zhang wrote:
Commit 8afdc9cca27f ("mmc: sdhci-pxav3: Get optional core clock") adds
additional optional clock support, but the clock names isn'
On 16.10.2015 14:47, Michael Turquette wrote:
Quoting Jisheng Zhang (2015-10-11 22:46:35)
Since we have added the necessary axi clk properties in dts, we can
remove the "sdio" clk's CLK_IGNORE_UNUSED flag now.
Signed-off-by: Jisheng Zhang
Applied to clk-next.
Mike,
these two patches will
Besides the nit-pick on patch 3/7,
Acked-by: Sebastian Hesselbarth
Thanks!
Since v4:
- drop ARCH_BERLIN dependency for it has been met
- drop COMPILE_TEST dependency but make berlin pinctrl driver visible
if COMPILE_TEST=y, and let this change be a seperate commit.
Since v3:
- fix
On 09.10.2015 13:56, Jisheng Zhang wrote:
Add the pin-controller driver for Marvell Berlin BG4CT SoC, with definition
of its groups and functions. This uses the core Berlin pinctrl driver.
Signed-off-by: Jisheng Zhang
---
drivers/pinctrl/berlin/Kconfig| 5 +
drivers/pinctrl/berlin/
On 13.10.2015 23:31, Antoine Tenart wrote:
This patch prepares to remove the pinctrl driver selection from the
mach-berlin Kconfig. To do so, bool is replaced by def_bool.
Signed-off-by: Antoine Tenart
Acked-by: Sebastian Hesselbarth
---
drivers/pinctrl/berlin/Kconfig | 6 +++---
1
On 13.10.2015 23:31, Antoine Tenart wrote:
Reorder the statements under the PINCTRL_BERLIN_BG4CT config
option to be consistent with the existing.
Signed-off-by: Antoine Tenart
If this is the only patch that requires the dependency with
Jisheng's pending patches, can you two agree on squashin
On 13.10.2015 23:31, Antoine Tenart wrote:
My family name contained an accent when I submitted the
Berlin pinctrl series in the first place. There was an
encoding issue when the series was applied. Fix this.
Signed-off-by: Antoine Tenart
Acked-by: Sebastian Hesselbarth
and sorry for the
On 12.10.2015 07:46, Jisheng Zhang wrote:
Commit 8afdc9cca27f ("mmc: sdhci-pxav3: Get optional core clock") adds
additional optional clock support, but the clock names isn't correct.
The current "io" clock is really the PXAv3 SDHCI IP's "core" clock
which is manadatory. The current "core" clock
On 13.10.2015 13:12, Michael Opdenacker wrote:
This fixes a trivial typo in the name of the "chosen" device tree property
for the Marvell BG2-Q DMP board.
Signed-off-by: Michael Opdenacker
Applied to berlin/fixes with Antoine's Acked-by and
a Cc to stable back to v3.16.
Thanks,
Sebastian
From: Thomas Hebb
The previous register layout was incorrect, many of the fields having
fewer bits than were needed to represent all their modes. The new layout
is taken from the bootloader source of a BG2CD device.
Signed-off-by: Thomas Hebb
Acked-by: Sebastian Hesselbarth
---
Linus,
this
On 02.10.2015 16:59, Antoine Tenart wrote:
This patch adds a PWM node in the Berlin BG2Q device tree, using the
newly added Berlin PWM driver.
Signed-off-by: Antoine Tenart
---
arch/arm/boot/dts/berlin2q.dtsi | 7 +++
1 file changed, 7 insertions(+)
Applied this and the next two for BG
On 05.10.2015 09:24, Linus Walleij wrote:
On Thu, Oct 1, 2015 at 9:30 PM, Sebastian Hesselbarth
wrote:
On 27.09.2015 03:03, Thomas Hebb wrote:
The previous register layout was incorrect, many of the fields having
fewer bits than were needed to represent all their modes. The new layout
is
On 27.09.2015 03:03, Thomas Hebb wrote:
The previous register layout was incorrect, many of the fields having
fewer bits than were needed to represent all their modes. The new layout
is taken from the bootloader source of a BG2CD device.
Signed-off-by: Thomas Hebb
---
drivers/pinctrl/berlin/b
On 27.09.2015 02:47, Thomas Hebb wrote:
Currently, BG2Q shares a compatible with BG2. This is incorrect, since
BG2 and BG2Q use different USB PLL dividers. In reality, BG2Q shares a
divider with BG2CD. Change BG2Q's USB PHY compatible string to reflect
that.
Signed-off-by: Thomas Hebb
Sorry, I
On 21.09.2015 10:09, Thierry Reding wrote:
On Sun, Sep 20, 2015 at 08:13:48PM +0200, Sebastian Hesselbarth wrote:
On 17.09.2015 12:13, Antoine Tenart wrote:
Add a PWM controller driver for the Marvell Berlin SoCs. This PWM
controller has 4 channels.
Signed-off-by: Antoine Tenart
Acked-by
On 19.09.2015 12:02, Jisheng Zhang wrote:
Add the avio, soc, sm pinctrl nodes for Marvell berlin4ct SoC. This
patch also adds urt0 txd and rxd muxing setup in the dtsi because uart0
always use them to work, no other possibilities.
Please split the patch into two:
one adding the pinctrl nodes an
On 19.09.2015 12:02, Jisheng Zhang wrote:
Add the pin-controller driver for Marvell Berlin BG4CT SoC, with definition
of its groups and functions. This uses the core Berlin pinctrl driver.
Signed-off-by: Jisheng Zhang
---
[...]
diff --git a/drivers/pinctrl/berlin/berlin4ct.c
b/drivers/pinctr
On 18.09.2015 15:47, Jisheng Zhang wrote:
All berlin SoCs have GPIOs driven by the dwapb GPIO driver. Add GPIOLIB
as a dependency to be able to support them.
Signed-off-by: Jisheng Zhang
Applied to berlin64/soc.
Thanks,
Sebastian
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed,
On 18.09.2015 15:47, Jisheng Zhang wrote:
This patch adds dts for the Berlin4CT STB reference board which is also
based on the Berlin4CT SoC. The Berlin4CT DMP board will be deprecated as
time goes.
Signed-off-by: Jisheng Zhang
---
arch/arm64/boot/dts/marvell/berlin4ct-stb.dts | 66 ++
On 17.09.2015 12:14, Antoine Tenart wrote:
This series adds the cpufreq support to the Berlin SoCs, using
cpufreq-dt.
[...]
Antoine Tenart (6):
clk: berlin: move MAX_CLKS out of drivers/clk/berlin
clk: berlin: add cpuclk
ARM: berlin: dts: add the cpufreq-dt bindings on the BG2Q
ARM:
On 17.09.2015 12:13, Antoine Tenart wrote:
Add a PWM controller driver for the Marvell Berlin SoCs. This PWM
controller has 4 channels.
Signed-off-by: Antoine Tenart
Acked-by: Sebastian Hesselbarth
Thierry,
if you are also fine with the driver, please let me know if you want
me to take the
On 14.09.2015 08:42, Jisheng Zhang wrote:
These two simple patches use stdout-path to specify the console.
The first patch add aliases for serial uarts. The second patch
removes the console argument from the command line, uses stdout-path
instead.
Jisheng Zhang (2):
arm: dts: berlin: add alia
On 14.09.2015 08:47, Jisheng Zhang wrote:
In Berlin SoCs, there are two kinds of cpu reset control registers: the
first one's corresponding bits will be self-cleared after some cycles,
while the second one's bits won't. Previously the first kind of reset
control register is used, this patch uses
On 08/18/2015 01:38 PM, Antoine Tenart wrote:
Add a PWM controller driver for the Marvell Berlin SoCs. This PWM
controller has 4 channels.
Signed-off-by: Antoine Tenart
Acked-by: Sebastian Hesselbarth
---
[...]
diff --git a/drivers/pwm/pwm-berlin.c b/drivers/pwm/pwm-berlin.c
new file mode
t_name(E)
[...]
Signed-off-by: Stephen Boyd
---
drivers/clk/berlin/berlin2-pll.c | 4 ++--
For Berlin,
Acked-by: Sebastian Hesselbarth
Thanks!
[...]
diff --git a/drivers/clk/berlin/berlin2-pll.c b/drivers/clk/berlin/berlin2-pll.c
index f4b8d324b083..1c2294d3ba85 100644
--- a/drivers/clk/berlin
amp;pdev->dev, "Failed to add PWM chip: %d\n", ret);
+ return ret;
+ }
+
+ platform_set_drvdata(pdev, pwm);
+
+ return 0;
+}
+
+static int berlin_pwm_remove(struct platform_device *pdev)
+{
+ struct berlin_pwm_chip *pwm = platform_get_drvdata(pdev);
+
+
On 31.07.2015 19:03, Stephen Boyd wrote:
Mostly converted with the following snippet:
@@
struct clk_hw *E;
@@
-__clk_get_flags(E->clk)
+clk_hw_get_flags(E)
Cc: Tero Kristo
Cc: Maxime Ripard
Cc: Max Filippov
Cc: Sebastian Hesselbarth
Cc: Daniel Thompson
Cc: Coquelin
Signed-off
On 08.08.2015 01:35, Stephen Boyd wrote:
This driver uses __clk_get_name() when it's dealing with struct
clk_hw pointers. Use the simpler form so that we can get rid of
the clk member in struct clk_hw one day.
Cc: Sebastian Hesselbarth
Signed-off-by: Stephen Boyd
Sorry for the late res
On 31.07.2015 08:16, Jisheng Zhang wrote:
On Thu, 30 Jul 2015 14:35:51 +0200
Antoine Tenart wrote:
The BG2Q SoC uses cpufreq-dt for cpufreq. Register a platform device for
this.
Signed-off-by: Antoine Tenart
---
[...]
diff --git a/arch/arm/mach-berlin/berlin.c b/arch/arm/mach-berlin/berlin
On 30.07.2015 14:35, Antoine Tenart wrote:
Add cpuclk in the Berlin BG2Q clock driver. This clk has a divider
fixed to 1.
Signed-off-by: Antoine Tenart
---
drivers/clk/berlin/bg2q.c| 14 +++---
include/dt-bindings/clock/berlin2q.h | 3 ++-
2 files changed, 9 insertions(
On 30.07.2015 11:23, Antoine Tenart wrote:
This patch adds a PWM node in the Berlin BG2 device tree, using the
newly added Berlin PWM driver.
Signed-off-by: Antoine Tenart
---
arch/arm/boot/dts/berlin2.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2.d
/pwm-berlin.txt
@@ -0,0 +1,15 @@
+Berlin PWM controller
Just a little sentence about "PWM IP found in Marvell Berlin SoCs" ?
Besides that, this looks pretty straight-forward to me. Feel free
to add my
Acked-by: Sebastian Hesselbarth
for the Berlin part of it.
Sebastian
+Required
On 30.07.2015 11:23, Antoine Tenart wrote:
Add a PWM controller driver for the Marvell Berlin SoCs. This PWM
controller has 4 channels.
Signed-off-by: Antoine Tenart
Antoine,
thanks for providing these patches, some comments below.
---
drivers/pwm/Kconfig | 9 +++
drivers/pwm/Mak
Hi Arnd, Kevin, Olof,
this is initial Marvell Berlin4CT ARM64 support for v4.3. It contains minimum
SoC
dtsi and basic dts for the development board. The patches have been posted by
Marvell's Jisheng Zhang a while ago on the lists.
Please pull.
The following changes since commit d770e558e21961a
From: Jisheng Zhang
This patch introduces ARCH_BERLIN to enable Marvell Berlin SoC family in
Kconfig.
Signed-off-by: Jisheng Zhang
Signed-off-by: Sebastian Hesselbarth
---
As discussed with Olof on IRC, this is Jisheng's Kconfig patch for
ARM64 Berlin. Olof agreed to rework this to fi
From: Jisheng Zhang
Enable Marvell Berlin SoC family in arm64 defconfig.
Signed-off-by: Jisheng Zhang
Signed-off-by: Sebastian Hesselbarth
---
Also discussed with Olof on IRC, this is the defconfig changes singled
out from Jisheng's original patch.
Sebastian
---
arch/arm64/configs/defc
On 07/30/2015 01:13 PM, Jisheng Zhang wrote:
On Thu, 30 Jul 2015 11:57:27 +0200
Sebastian Hesselbarth wrote:
On 07/30/2015 11:35 AM, Jisheng Zhang wrote:
Marvell Berlin4CT is a SoC based on 64bit ARMv8 architecture. It contains
quad CA53 cores.
This SoC shares many HW IP with BG2Q and other
On 07/30/2015 11:35 AM, Jisheng Zhang wrote:
Marvell Berlin4CT is a SoC based on 64bit ARMv8 architecture. It contains
quad CA53 cores.
This SoC shares many HW IP with BG2Q and other berlin series. This patchset
was tested on Berlin4CT DMP board, and boot to shell ok.
Since v4:
- rebased on t
On 07/22/2015 11:39 AM, Jisheng Zhang wrote:
This patch introduces ARCH_BERLIN to enable Marvell Berlin SoC family in
Kconfig and defconfig.
Signed-off-by: Jisheng Zhang
I guess this will go through arm64 directly? If so,
Acked-by: Sebastian Hesselbarth
---
arch/arm64/Kconfig.platforms
On 07/22/2015 11:39 AM, Jisheng Zhang wrote:
Add initial dtsi file to support Marvell Berlin4CT SoC with
quad Cortex-A53 CPUs.
It also adds dts file for Marvell Berlin4CT DMP board which is
based on Berlin4CT SoC.
Signed-off-by: Jisheng Zhang
---
[...]
diff --git a/arch/arm64/boot/dts/marvel
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