On Wed, Aug 26, 2015 at 10:16 AM, Viresh Kumar wrote:
> On 26-08-15, 09:25, Pi-Cheng Chen wrote:
>> The [3/3] is based on Mediatek SoC maintainer tree[1] and the patch which
>> introduce a new clock type[2] consumed by MT8173 cpufreq driver. So it will
>> cause some conflic
Hi Rafael,
On Wed, Aug 26, 2015 at 7:01 AM, Rafael J. Wysocki wrote:
> On Tuesday, August 25, 2015 10:10:44 AM Pi-Cheng Chen wrote:
>> On Mon, Aug 17, 2015 at 5:24 PM, Pi-Cheng Chen
>> wrote:
>> > MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs in a single clu
On Mon, Aug 17, 2015 at 5:24 PM, Pi-Cheng Chen wrote:
> MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs in a single cluster
> share the same power and clock domain. This series tries to add cpufreq
> support
> for MT8173 SoC. The v6 of this series is resent with Acks added
t MUX need to be parented to
another "intermediate" stable PLL first and reparented to the original
PLL once the original PLL is stable at the target frequency. This patch
implements those mechanisms to enable CPU DVFS support for Mediatek
MT8173 SoC.
Signed-off-by: Pi-Cheng Chen
Acked-by: Vir
t MUX need to be parented to
another "intermediate" stable PLL first and reparented to the original
PLL once the original PLL is stable at the target frequency. This patch
implements those mechanisms to enable CPU DVFS support for Mediatek
MT8173 SoC.
Signed-off-by: Pi-Cheng Chen
Acked-by:
This patch adds the clock and regulator consumer properties part of
document for CPU DVFS clocks on Mediatek MT8173 SoC.
Signed-off-by: Pi-Cheng Chen
Acked-by: Michael Turquette
Acked-by: Viresh Kumar
---
.../devicetree/bindings/clock/mt8173-cpu-dvfs.txt | 83 ++
1 file
This patch adds the required properties in device tree to enable MT8173
cpufreq driver.
Signed-off-by: Pi-Cheng Chen
Acked-by: Viresh Kumar
---
It is based on the top of MT8173 SoC maintainer's tree:
https://github.com/mbgg/linux-mediatek.git v4.2-next/arm64
comm
tage scaling code of cpufreq-dt for little cluster instead of
implementaion in notifier of mtk-cpufreq driver
- Code refinement for mtk-cpufreq driver
Pi-Cheng Chen (3):
dt-bindings: mediatek: Add MT8173 CPU DVFS clock bindings
cpufreq: mediatek: Add MT8173 cpufreq driver
arm64: dts: mt8173
From: "pi-cheng.chen"
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Signed-off-by: Pi-Cheng Chen
Reviewed-by: Daniel Kurtz
---
Changes in v5:
- Replace __initdata with __initconst to fix compiling error
Changes in
On Wed, Jul 15, 2015 at 02:38:46PM +0800, Pi-Cheng Chen wrote:
> From: "pi-cheng.chen"
>
> This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
> for intermediate clock source switching.
Hi Mike and Stephen,
since the MT8173 cpufreq driver is likel
From: "pi-cheng.chen"
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Signed-off-by: Pi-Cheng Chen
Reviewed-by: Daniel Kurtz
---
Changes in v4:
- Address comments for v3
- Rebase to the patch that adds 13mhz clock fo
From: "pi-cheng.chen"
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Signed-off-by: Pi-Cheng Chen
Reviewed-by: Daniel Kurtz
---
Changes in v4:
- Address comments for v3
- Rebase to the patch that adds 13mhz clock fo
This patch adds device tree binding document for MT8173 cpufreq driver.
The clock and regulator consumer properties are documented in
Documentation/devicetree/bindings/clock/mt8173-cpu-dvfs.txt and
referenced by this document.
Signed-off-by: Pi-Cheng Chen
---
.../devicetree/bindings/cpufreq
This patch adds the clock and regulator consumer properties part of
document for CPU DVFS clocks on Mediatek MT8173 SoC.
Signed-off-by: Pi-Cheng Chen
---
.../devicetree/bindings/clock/mt8173-cpu-dvfs.txt | 83 ++
1 file changed, 83 insertions(+)
create mode 100644
clock need to be
parented to another "intermediate" stable PLL first and reparented to
the original PLL once the original PLL is stable at the target
frequency. This patch implements those mechanisms to enable CPU DVFS
support for Mediatek MT8173 SoC.
Signed-off-by: Pi-Cheng Chen
---
d
This patch adds the required properties in device tree to enable MT8173
cpufreq driver.
Signed-off-by: Pi-Cheng Chen
---
It is based on the top of Mediatek SoC maintainer's tree[1] and the
patch that adds cpumux clocks for MT8173[2]
[1] https://github.com/mbgg/linux-mediatek.git v4.2-next/
e cluster instead of
implementaion in notifier of mtk-cpufreq driver
- Code refinement for mtk-cpufreq driver
Pi-Cheng Chen (4):
dt-bindings: mediatek: Add MT8173 CPU DVFS clock bindings
dt-bindings: mediatek: Add MT8173 cpufreq driver bindings
cpufreq: mediatek: Add MT8173 cpufreq driver
arm64: dts
Hi Viresh,
On Wed, Jul 8, 2015 at 7:34 PM, Viresh Kumar wrote:
> On 01-07-15, 10:16, Pi-Cheng Chen wrote:
>> This patch implements MT8173 cpufreq driver.
>
> Now that you are going to resend this patchset, a few more comments.
>
> Please describe your SoC a bit here, so tha
e CPUs.
>
> Fix this by considering offline CPUs, but with a restriction that the
> policy is active at that time.
>
> Because we will be using 'cpufreq_cpu_data' now, which is internal to
> cpufreq-core, lets also move cpufreq_frequency_get_table() to cpufreq.c
> file.
ne.
>
> We also missed marking policy->governor as NULL while restoring the
> policy. Because of that, we call __cpufreq_governor(CPUFREQ_GOV_LIMITS)
> for an uninitialized policy. Which eventually returns -EBUSY.
>
> Fix this by setting policy->governor to NULL while restoring th
Hi Viresh,
On Tue, Jul 7, 2015 at 6:27 PM, Viresh Kumar wrote:
> On 01-07-15, 12:13, Pi-Cheng Chen wrote:
>> Sorry for the mistake I made when cherry-picking the patch. Fix and resend
>> again.
>
> You really want above to show up in git logs ?
>
> Any comments
From: "pi-cheng.chen"
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Changes in v3:
- Rebase to 4.2-rc1
- Fix some issues of v2
Changes in v2:
- Remove use of .determine_rate callback
Signed-off-by: Pi-Cheng Chen
--
Hi Alexey,
On Thu, Jul 2, 2015 at 5:24 AM, Alexey Klimov wrote:
> Hi Pi-Cheng,
>
> On Wed, Jul 1, 2015 at 5:16 AM, Pi-Cheng Chen
> wrote:
>> This patch implements MT8173 cpufreq driver.
>>
>> Signed-off-by: Pi-Cheng Chen
>> ---
>> drivers/cpufreq/Kc
Sorry for the mistake I made when cherry-picking the patch. Fix and resend
again.
__cpufreq_cooling_register() might fail if some CPU other than first one in
clip_cpu mask is present earlier e.g. CPU hotplug. Iterate all CPUs in the mask
to handle this case.
Signed-off-by: Pi-Cheng Chen
__cpufreq_cooling_register() might fail if some CPU other than first one in
clip_cpu mask is present earlier e.g. CPU hotplug. Iterate all CPUs in the mask
to handle this case.
Signed-off-by: Pi-Cheng Chen
---
drivers/thermal/cpu_cooling.c | 8 +++-
1 file changed, 7 insertions(+), 1
This patch implements MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen
---
drivers/cpufreq/Kconfig.arm | 7 +
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/mt8173-cpufreq.c | 520 +++
3 files changed, 528 insertions(+)
create mode
in notifier of mtk-cpufreq driver
- Code refinement for mtk-cpufreq driver
Pi-Cheng Chen (2):
dt-bindings: mediatek: Add MT8173 cpufreq driver binding
cpufreq: mediatek: Add MT8173 cpufreq driver
.../devicetree/bindings/cpufreq/cpufreq-mt8173.txt | 145 ++
drivers/cpufreq/Kconfig.arm
This patch adds device tree binding document for MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen
Reviewed-by: Michael Turquette
---
.../devicetree/bindings/cpufreq/cpufreq-mt8173.txt | 145 +
1 file changed, 145 insertions(+)
create mode 100644 Documentation/devicetree
Hi Mike,
On Tue, Jun 30, 2015 at 5:53 AM, Michael Turquette
wrote:
> Quoting Viresh Kumar (2015-06-23 18:06:21)
>> Adding Mike's new email address..
>>
>> On 23-06-15, 23:31, Pi-Cheng Chen wrote:
>> > On Mon, Jun 8, 2015 at 8:29 PM, Pi-Cheng Chen
>> &g
Hi Matthias and Mark,
May I have some review comments for this patch from you to get this
series moving forwards?
Thanks.
Pi-Cheng
On Wed, Jun 24, 2015 at 9:06 AM, Viresh Kumar wrote:
> Adding Mike's new email address..
>
> On 23-06-15, 23:31, Pi-Cheng Chen wrote:
>> On M
On Wed, Jun 24, 2015 at 4:56 PM, Viresh Kumar wrote:
> On 24-06-15, 16:44, Pi-Cheng Chen wrote:
>> One reason to put those initialization and resource allocation in probe is
>> that it's easier to handle the return value -PROBE_DEFER from clock
>> and regulator framework
On Wed, Jun 24, 2015 at 9:06 AM, Viresh Kumar wrote:
> Adding Mike's new email address..
>
> On 23-06-15, 23:31, Pi-Cheng Chen wrote:
>> On Mon, Jun 8, 2015 at 8:29 PM, Pi-Cheng Chen
>> wrote:
>> > This patch adds device tree binding document for MT8173 cpuf
Hi Viresh,
On Wed, Jun 24, 2015 at 8:57 AM, Viresh Kumar wrote:
> On 23-06-15, 23:25, Pi-Cheng Chen wrote:
>> On Mon, Jun 22, 2015 at 7:45 PM, Viresh Kumar
>> wrote:
>> >> +static struct mtk_cpu_dvfs_info *mtk_cpu_dvfs_info_get(int cpu)
>> >
>> > A
Hi,
May I get some comments for this patch to get this series proceeding?
Pi-Cheng
On Mon, Jun 8, 2015 at 8:29 PM, Pi-Cheng Chen wrote:
> This patch adds device tree binding document for MT8173 cpufreq driver.
>
> Signed-off-by: Pi-Cheng Chen
> ---
> .../devicetree/bindings/
Hi Viresh,
On Mon, Jun 22, 2015 at 7:45 PM, Viresh Kumar wrote:
> On 08-06-15, 20:29, Pi-Cheng Chen wrote:
>
> Sorry for the delay, I have been quite busy recently.
That's fine. Thanks for reviewing.
>
>> +++ b/drivers/cpufreq/mt8173-cpufreq.c
>> +static
On Tue, Jun 9, 2015 at 5:17 PM, Paul Bolle wrote:
> On Mon, 2015-06-08 at 20:29 +0800, Pi-Cheng Chen wrote:
>> --- /dev/null
>> +++ b/drivers/cpufreq/mt8173-cpufreq.c
>
>> +#include
>
> Weren't you going to drop this include?
Sorry I forget to merge that part
On Mon, Jun 8, 2015 at 8:29 PM, Pi-Cheng Chen wrote:
> MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs in a single cluster
> share the same power and clock domain. This series tries to add cpufreq
> support
> for MT8173 SoC.
I am sorry I forgot to add the version in the mail
This patch implements MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen
---
drivers/cpufreq/Kconfig.arm | 7 +
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/mt8173-cpufreq.c | 550 +++
3 files changed, 558 insertions(+)
create mode
-dt for little cluster instead of
implementaion in notifier of mtk-cpufreq driver
- Code refinement for mtk-cpufreq driver
Pi-Cheng Chen (2):
dt-bindings: mediatek: Add MT8173 cpufreq driver binding
cpufreq: mediatek: Add MT8173 cpufreq driver
.../devicetree/bindings/cpufreq/cpufreq-mt8173
This patch adds device tree binding document for MT8173 cpufreq driver.
Signed-off-by: Pi-Cheng Chen
---
.../devicetree/bindings/cpufreq/cpufreq-mt8173.txt | 127 +
1 file changed, 127 insertions(+)
create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mt8173
On Fri, Apr 24, 2015 at 3:09 PM, Pi-Cheng Chen wrote:
> Hi Mark,
>
> Thanks for reviewing.
>
> On Thu, Apr 23, 2015 at 8:53 PM, Mark Rutland wrote:
>> On Mon, Apr 20, 2015 at 10:27:27AM +0100, pi-cheng.chen wrote:
>>> This patch adds voltage supplies and clocks
dc14074
>> --- /dev/null
>> +++ b/drivers/clk/mediatek/clk-cpumux.c
>> @@ -0,0 +1,122 @@
>> +/*
>> + * Copyright (c) 2015 Linaro Ltd.
>> + * Author: Pi-Cheng Chen
>> + *
>> + * This program is free software; you can redistribute it and/o
pumux.o
>> obj-$(CONFIG_RESET_CONTROLLER) += reset.o
>> obj-y += clk-mt8135.o
>> obj-y += clk-mt8173.o
>> diff --git a/drivers/clk/mediatek/clk-cpumux.c
>> b/drivers/clk/mediatek/clk-cpumux.c
>> new file mode 100644
>> index 000..dc14074
>> -
On Fri, Apr 24, 2015 at 8:55 PM, Sascha Hauer wrote:
> On Fri, Apr 24, 2015 at 02:46:25PM +0800, Pi-Cheng Chen wrote:
>> Hi Sascha,
>>
>> Thanks for reviewing.
>>
>> On Thu, Apr 23, 2015 at 8:01 PM, Sascha Hauer wrote:
>> > On Mon, Apr 20, 201
On Thu, Apr 30, 2015 at 3:42 PM, Sascha Hauer wrote:
> On Mon, Apr 20, 2015 at 05:27:26PM +0800, pi-cheng.chen wrote:
>> This patch implements MT8173 specific cpufreq driver with OPP table defined
>> in the driver code.
>>
>> Signed-off-by: pi-cheng.chen
>> ---
>> drivers/cpufreq/Kconfig.arm
Hi Mark,
Thanks for reviewing.
On Thu, Apr 23, 2015 at 8:53 PM, Mark Rutland wrote:
> On Mon, Apr 20, 2015 at 10:27:27AM +0100, pi-cheng.chen wrote:
>> This patch adds voltage supplies and clocks used by MT8173 cpufreq driver.
>>
>> Signed-off-by: pi-cheng.chen
>
> This series has no bindings f
On Thu, Apr 23, 2015 at 8:56 PM, Mark Rutland wrote:
>> +/*
>> + * This is a temporary solution until we have new OPPv2 bindings. Therefore
>> we
>> + * could describe the OPPs with (freq, volt, volt) tuple properly in device
>> + * tree.
>> + */
>> +
>> +/* OPP table for LITTLE cores of MT8173 *
.o
>> obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o
>> diff --git a/drivers/cpufreq/mt8173-cpufreq.c
>> b/drivers/cpufreq/mt8173-cpufreq.c
>> new file mode 100644
>> index 000..a310e72
>> --- /dev/null
>> +++ b/drivers/cpufreq/mt8173-cpufreq.c
On Tue, Apr 21, 2015 at 2:28 AM, Paul Bolle wrote:
> On Mon, 2015-04-20 at 17:27 +0800, pi-cheng.chen wrote:
>> --- a/drivers/cpufreq/Kconfig.arm
>> +++ b/drivers/cpufreq/Kconfig.arm
>
>> +config ARM_MT8173_CPUFREQ
>> + bool "Mediatek MT8173 CPUFreq support"
>> + depends on ARCH_MEDIATEK &
-cpufreq.o
>> obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o
>> obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o
>> obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o
>> diff --git a/drivers/cpufreq/mt8173-cpufreq.c
>> b/drivers/cpufreq/mt8173
On Thu, Mar 12, 2015 at 5:28 PM, Viresh Kumar wrote:
> On 11 March 2015 at 18:15, Mark Brown wrote:
>> Ugh, no - that's a hideous bodge which is only going to create trouble
>> later. Remember, DT is an ABI and should describe the hardware so if
>> we're doing bodges that are visible there to sh
On Tue, Mar 10, 2015 at 3:55 PM, Sascha Hauer wrote:
> On Tue, Mar 10, 2015 at 09:53:19AM +0800, Pi-Cheng Chen wrote:
>> On 5 March 2015 at 15:42, Sascha Hauer wrote:
>> >
>> > My suggestion is to take another approach. Implement clk_set_rate for
>> >
On 10 March 2015 at 00:28, Russell King - ARM Linux
wrote:
> On Wed, Mar 04, 2015 at 04:49:15PM +0800, pi-cheng.chen wrote:
>> +static int cpu_opp_table_get_freq_index(unsigned int freq)
>> +{
>> + struct cpu_opp_table *opp_tbl = dvfs_info->opp_tbl;
>> + int i;
>> +
>> + for (i = 0; op
On 5 March 2015 at 15:42, Sascha Hauer wrote:
>
> +Cc Viresh Kumar
>
> Viresh, this is the patch for the underlying clocks for the Mediatek
> cpufreq driver.
>
> On Thu, Mar 05, 2015 at 10:43:21AM +0800, Pi-Cheng Chen wrote:
>> Hi Sascha,
>>
>> On 4 M
+cc Sascha
On 5 March 2015 at 17:55, Viresh Kumar wrote:
> On 5 March 2015 at 12:57, Pi-Cheng Chen wrote:
>
>> On 4 March 2015 at 19:09, Viresh Kumar wrote:
>> There are 2 clusters, but only the big cluster need to do voltage scaling in
>> the
>> notifier, si
On 5 March 2015 at 18:51, Sascha Hauer wrote:
> On Thu, Mar 05, 2015 at 05:39:12PM +0800, Pi-Cheng Chen wrote:
>> On 5 March 2015 at 17:19, Sascha Hauer wrote:
>> > On Thu, Mar 05, 2015 at 02:29:50PM +0530, Viresh Kumar wrote:
>> >> On 5 March 2015 at 13:12, Sascha
On 5 March 2015 at 17:19, Sascha Hauer wrote:
> On Thu, Mar 05, 2015 at 02:29:50PM +0530, Viresh Kumar wrote:
>> On 5 March 2015 at 13:12, Sascha Hauer wrote:
>> > We have clk_set_parent for changing the parent and clk_set_rate to
>> > change the rate. Use the former for changing the parent and t
On 5 March 2015 at 15:42, Sascha Hauer wrote:
>
> +Cc Viresh Kumar
>
> Viresh, this is the patch for the underlying clocks for the Mediatek
> cpufreq driver.
>
> On Thu, Mar 05, 2015 at 10:43:21AM +0800, Pi-Cheng Chen wrote:
>> Hi Sascha,
>>
>> On 4 M
On 5 March 2015 at 11:58, Viresh Kumar wrote:
> On 5 March 2015 at 09:02, Pi-Cheng Chen wrote:
>> In the case of Mediatek SoC, the intermediate frequency might not be one
>> entry
>> of OPP table. To elaborate, the source clock node of the CPUs/Cluster on
>> Mediate
Hi Viresh,
Thanks for reviewing.
Please see my reply below:
On 4 March 2015 at 19:09, Viresh Kumar wrote:
> Haven't reviewed it completely yet, but this is all I have done.
>
> On 4 March 2015 at 14:19, pi-cheng.chen wrote:
>
>> +static int mtk_cpufreq_notify(struct notifier_block *nb,
>> +
Hi Viresh,
Thanks for reviewing. Please see my reply below:
On 4 March 2015 at 18:15, Viresh Kumar wrote:
> On 4 March 2015 at 14:19, pi-cheng.chen wrote:
>> In this patch, CPU clock/power domain information is added into the
>> platform_data of cpufreq-dt so that cpufreq-dt driver could check
Hi Sascha,
On 4 March 2015 at 19:21, Sascha Hauer wrote:
> On Wed, Mar 04, 2015 at 06:49:11PM +0800, pi-cheng.chen wrote:
>> This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
>> for intermediate clock source switching. This patch is based on Mediatek
>> clock driver patches
On 20 January 2015 at 15:39, Viresh Kumar wrote:
> On 20 January 2015 at 13:03, Pi-Cheng Chen wrote:
>> I will also try to add intermediate frequency support in next version.
>
> Sure
>
>> BTW, do you think it's a good idea to add a new device tree binding like
>
Hi Viresh,
Thanks for reviewing.
On 19 January 2015 at 16:00, Viresh Kumar wrote:
> On 9 January 2015 at 15:24, pi-cheng.chen wrote:
>> Currently the DT based cpufreq driver is missing some way to check which
>> CPUs share clocks. In the 1st patch, CPU clock/power domain information is
>> added
On 20 January 2015 at 00:00, Mike Turquette wrote:
> Quoting pi-cheng.chen (2015-01-09 01:54:51)
>> diff --git a/drivers/cpufreq/mt8173-cpufreq.c
>> b/drivers/cpufreq/mt8173-cpufreq.c
>> new file mode 100644
>> index 000..b578c10
>> --- /dev/null
>> +++ b/drivers/cpufreq/mt8173-cpufreq.c
>> @
sram_reg = regulator_get(dvfs->cpu_dev,
>> "sram");
>> +
>> + np = of_node_get(dvfs->cpu_dev->of_node);
>> + of_property_read_u32(np, "voltage-tolerance",
>> +
>
>> ##########
>> # PowerPC platform drivers
>> diff --git a/drivers/cpufreq/mt8173-cpufreq.c
>> b/drivers/cpufreq/mt8173-cpufreq.c
>> new file mode 100644
>> index 000..b578c10
&
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