Hi Hanjun,
On 4/2/2018 10:24 AM, Hanjun Guo wrote:
I think we need to wait for the new version of IORT spec,
which includes the fix for the two base address for SMMUv3
PMCG (now just represent one).
Thanks
Hanjun
It's in rev D which is available now:
http://infocenter.arm.com/help/topic/com
Hi Yisheng Xie,
On 3/29/2018 03:03 AM, Yisheng Xie wrote:
Hi Neil,
On 2017/8/5 3:59, Neil Leeder wrote:
+ mem_resource_0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mem_map_0 = devm_ioremap_resource(&pdev->dev, mem_resource_0);
+
Can we use devm_ioremap instead?
Guests cannot access IMPDEF system registers, which are used
by this driver. Disable the driver if it's running in a guest VM.
Signed-off-by: Neil Leeder
---
drivers/perf/qcom_l2_pmu.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/perf/qcom_l2_pmu.c b/drivers
Add event names so that common events can be
specified symbolically, for example:
l2cache_0/total-reads/,l2cache_0/cycles/
Event names are displayed in 'perf list'.
Signed-off-by: Neil Leeder
---
drivers/perf/qcom_l2_pmu.c | 54 ++
1 fi
to transaction events.
SMMU events are not attributable to a CPU, so task mode and sampling
are not supported.
Signed-off-by: Neil Leeder
---
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_smmuv3_pmu.c | 813
Add support for the SMMU Performance Monitor Counter Group
information from ACPI. This is in preparation for its use
in the SMMU v3 PMU driver.
Signed-off-by: Neil Leeder
---
drivers/acpi/arm64/iort.c | 54 +++
include/acpi/actbl2.h | 9
.
Neil Leeder (2):
acpi: arm64: add iort support for PMCG
perf: add arm64 smmuv3 pmu driver
drivers/acpi/arm64/iort.c | 54 +++
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_smmuv3_pmu.c | 823
exclusion and
not counting it.
Add a check for PMU type before applying column exclusion logic.
Fixes: 21bdbb7102ed ("perf: add qcom l2 cache perf events driver")
Signed-off-by: Neil Leeder
Acked-by: Mark Rutland
---
Same code as v1, just added the tags to the commit text.
dr
exclusion and
not counting it.
Add a check for PMU type before applying column exclusion logic.
Signed-off-by: Neil Leeder
---
drivers/perf/qcom_l2_pmu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/perf/qcom_l2_pmu.c b/drivers/perf/qcom_l2_pmu.c
index c259848..b242cce 100644
--- a
nto a group field.
The PMNx event then points to that region/group combo.
Restrictions that limit only one concurrent region/group combination
are also enforced.
Signed-off-by: Neil Leeder
---
The Qualcomm Technologies CPU PMU extensions have an additional set of registers
which need to be programmed
Adds perf events support for L2 cache PMU.
The L2 cache PMU driver is named 'l2cache_0' and can be used
with perf events to profile L2 events such as cache hits
and misses on Qualcomm Technologies processors.
Signed-off-by: Neil Leeder
---
v10:
Remove unnecessary cross-call for re
Adds perf events support for L2 cache PMU.
The L2 cache PMU driver is named 'l2cache_0' and can be used
with perf events to profile L2 events such as cache hits
and misses on Qualcomm Technologies processors.
Signed-off-by: Neil Leeder
---
v9:
Add support for maxcpus < all cpus:
Adds perf events support for L2 cache PMU.
The L2 cache PMU driver is named 'l2cache_0' and can be used
with perf events to profile L2 events such as cache hits
and misses on Qualcomm Technologies processors.
Signed-off-by: Neil Leeder
---
v8:
Various style changes for function na
Adds perf events support for L2 cache PMU.
The L2 cache PMU driver is named 'l2cache_0' and can be used
with perf events to profile L2 events such as cache hits
and misses on Qualcomm Technologies processors.
Signed-off-by: Neil Leeder
---
v7:
Move to drivers/perf
Rebased
On 10/4/2016 11:53 AM, Mark Rutland wrote:
> Hi Neil,
>
> On Wed, Sep 21, 2016 at 05:12:54PM -0400, Neil Leeder wrote:
>> Adds perf events support for L2 cache PMU.
>>
>> The L2 cache PMU driver is named 'l2cache_0' and can be used
>> with perf eve
On 9/21/2016 05:12 PM, Neil Leeder wrote:
> Adds perf events support for L2 cache PMU.
>
> The L2 cache PMU driver is named 'l2cache_0' and can be used
> with perf events to profile L2 events such as cache hits
> and misses.
>
> Signed-off-by: Neil Leeder
&
Adds perf events support for L2 cache PMU.
The L2 cache PMU driver is named 'l2cache_0' and can be used
with perf events to profile L2 events such as cache hits
and misses.
Signed-off-by: Neil Leeder
---
v6: restore accidentally dropped Kconfig dependencies
v5:
Fold the header and l2
Adds perf events support for L2 cache PMU.
The L2 cache PMU driver is named 'l2cache_0' and can be used
with perf events to profile L2 events such as cache hits
and misses.
Signed-off-by: Neil Leeder
---
v5:
Fold the header and l2-accessors into .c file
Use multi-instance framework f
On 9/16/2016 12:40 PM, Mark Rutland wrote:
> On Fri, Sep 16, 2016 at 11:33:39AM -0400, Neil Leeder wrote:
[...]
>> On 9/1/2016 12:30 PM, Mark Rutland wrote:
>>> On Tue, Aug 30, 2016 at 01:01:33PM -0400, Neil Leeder wrote:
>>>> + /* Don't allow groups wit
Hi Mark,
Thank you for the thorough review. I will post an updated patchset which
addresses
all of your comments. There is just one outstanding comment which I have a
question about:
On 9/1/2016 12:30 PM, Mark Rutland wrote:
> On Tue, Aug 30, 2016 at 01:01:33PM -0400, Neil Leeder wr
Adds perf events support for L2 cache PMU.
The L2 cache PMU driver is named 'l2cache_0' and can be used
with perf events to profile L2 events such as cache hits
and misses.
Signed-off-by: Neil Leeder
---
drivers/soc/qcom/Kconfig | 10 +
drivers/soc/qco
registers use the set and get functions provided by
l2-accessors to ensure correct reads and writes to L2 registers.
Signed-off-by: Neil Leeder
---
drivers/soc/qcom/Kconfig | 6
drivers/soc/qcom/Makefile | 1 +
drivers/soc/qcom/l2-accessors.c | 63
per slice.
Replace manual event filtering with filter_match callback.
Use a separate used_mask for event groups.
Add hotplug notifier for CPU and irq migration.
Remove extraneous synchronisation instructions.
Other miscellaneous cleanup.
Neil Leeder (2):
soc: qcom: provide mechanism for drivers to
Adds perf events support for L2 cache PMU.
The L2 cache PMU driver is named 'l2cache_0' and can be used
with perf events to profile L2 events such as cache hits
and misses.
Signed-off-by: Neil Leeder
---
drivers/soc/qcom/Kconfig | 10 +
drivers/soc/qco
.
Use a separate used_mask for event groups.
Add hotplug notifier for CPU and irq migration.
Remove extraneous synchronisation instructions.
Other miscellaneous cleanup.
Neil Leeder (2):
soc: qcom: provide mechanism for drivers to access L2 registers
soc: qcom: add l2 cache perf events driver
registers use the set and get functions provided by
l2-accessors to ensure correct reads and writes to L2 registers.
Signed-off-by: Neil Leeder
---
drivers/soc/qcom/Kconfig | 6
drivers/soc/qcom/Makefile | 1 +
drivers/soc/qcom/l2-accessors.c | 63
On 8/5/2016 07:15 PM, Paul Gortmaker wrote:
> On Thu, Aug 4, 2016 at 5:11 PM, Neil Leeder wrote:
>> Adds perf events support for L2 cache PMU.
>>
>> The L2 cache PMU driver is named 'l2cache_0' and can be used
>> with perf events to profile L2 ev
On 8/5/2016 06:00 AM, Mark Rutland wrote:
> On Thu, Aug 04, 2016 at 05:11:10PM -0400, Neil Leeder wrote:
>> L2 registers are accessed using a select register and data
>> register pair. To prevent multiple concurrent writes to the
>> select register by independent driv
registers use the set and get functions provided by
l2-accessors to ensure correct reads and writes to L2 registers.
Signed-off-by: Neil Leeder
---
drivers/soc/qcom/Kconfig | 9 +
drivers/soc/qcom/Makefile | 1 +
drivers/soc/qcom/l2-accessors.c | 66
Adds perf events support for L2 cache PMU.
The L2 cache PMU driver is named 'l2cache_0' and can be used
with perf events to profile L2 events such as cache hits
and misses.
Signed-off-by: Neil Leeder
---
drivers/soc/qcom/Kconfig | 10 +
drivers/soc/qco
instructions.
Other miscellaneous cleanup.
Neil Leeder (2):
soc: qcom: provide mechanism for drivers to access L2 registers
soc: qcom: add l2 cache perf events driver
drivers/soc/qcom/Kconfig | 19 +
drivers/soc/qcom/Makefile | 2 +
drivers/soc/qcom/l2-accessors.c
On 6/9/2016 03:41 PM, Peter Zijlstra wrote:
> On Thu, Jun 09, 2016 at 04:56:16PM +0100, Mark Rutland wrote:
> +static irqreturn_t l2_cache__handle_irq(int irq_num, void *data)
> +{
> + struct hml2_pmu *slice = data;
> + u32 ovsr;
> + int idx;
> + struct pt_regs *regs;
On 6/8/2016 12:12 PM, Mark Rutland wrote:
> On Wed, Jun 08, 2016 at 11:21:16AM -0400, Neil Leeder wrote:
>>
>>
>> On 6/6/2016 05:04 AM, Mark Rutland wrote:
>>> On Fri, Jun 03, 2016 at 05:03:30PM -0400, Neil Leeder wrote:
>>>> This adds a new dynamic P
On 6/6/2016 05:04 AM, Mark Rutland wrote:
> On Fri, Jun 03, 2016 at 05:03:30PM -0400, Neil Leeder wrote:
>> This adds a new dynamic PMU to the Perf Events framework to program
>> and control the L2 cache PMUs in some Qualcomm Technologies SOCs.
>>
>> The driver e
Mark,
Thank you for the detailed review.
On 6/6/2016 05:51 AM, Mark Rutland wrote:
> On Fri, Jun 03, 2016 at 05:03:32PM -0400, Neil Leeder wrote:
>> Adds perf events support for L2 cache PMU.
>>
>> The L2 cache PMU driver is named 'l2cache' and can be used
>>
Adds perf events support for L2 cache PMU.
The L2 cache PMU driver is named 'l2cache' and can be used
with perf events to profile L2 events such as cache hits
and misses.
Signed-off-by: Neil Leeder
---
drivers/soc/qcom/Kconfig | 10 +
drivers/soc/qcom/Makefile
When the platform-specific pmu->add function returns
an error, it may have also changed the event's state.
If so, do not override that new state.
Signed-off-by: Neil Leeder
---
kernel/events/core.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/kernel/events/
event_add() changed the state, and not override it
and force it to Inactive.
This patchset requires:
[PATCH] soc: qcom: provide mechanism for drivers to access L2 registers
Neil Leeder (2):
perf: allow add to change event state
soc: qcom: add l2 cache perf events driver
drivers/soc/qcom/Kconfig
registers use the set and get functions provided by
l2-accessors to ensure correct reads and writes to L2 registers.
Signed-off-by: Neil Leeder
---
Changes since v1:
Add ARM64 dependency
Replace module.h with export.h
Remove unused dummy fnunctions and ifdef in header
drivers/soc/qcom
On 5/26/2016 12:48 AM, Bjorn Andersson wrote:
> On Tue 24 May 12:54 PDT 2016, Neil Leeder wrote:
>
>>
>>
>> On 5/24/2016 07:23 AM, Mark Rutland wrote:
>>> On Mon, May 23, 2016 at 02:22:59PM -0400, Neil Leeder wrote:
>>>>
>>>> On 5/23/2016
On 5/24/2016 07:23 AM, Mark Rutland wrote:
> On Mon, May 23, 2016 at 02:22:59PM -0400, Neil Leeder wrote:
>>
>> On 5/23/2016 01:25 PM, Mark Rutland wrote:
>>> On Fri, May 20, 2016 at 03:13:07PM -0400, Neil Leeder wrote:
>>>> Signed-off-by: Neil Leeder
>
On 5/23/2016 01:25 PM, Mark Rutland wrote:
> On Fri, May 20, 2016 at 03:13:07PM -0400, Neil Leeder wrote:
>> L2 registers are accessed using a select register and data
>> register pair. To prevent multiple concurrent writes to the
>> select register by independent driv
On 5/23/2016 01:04 PM, Stephen Boyd wrote:
> On 05/23/2016 08:43 AM, Neil Leeder wrote:
>>
>> On 5/20/2016 05:19 PM, Stephen Boyd wrote:
>>
>>>
>>> Is there a patch to add sysreg.h to arch/arm? It would be nice to use
>>> one l2 accessor API on ar
On 5/20/2016 05:19 PM, Stephen Boyd wrote:
> On 05/20/2016 12:13 PM, Neil Leeder wrote:
>> diff --git a/drivers/soc/qcom/l2-accessors.c
>> b/drivers/soc/qcom/l2-accessors.c
>> new file mode 100644
>> index 000..fbb69bd
>> --- /dev/null
>> +++ b/dri
registers use the set and get functions provided by
l2-accessors to ensure correct reads and writes to L2 registers.
Signed-off-by: Neil Leeder
---
drivers/soc/qcom/Kconfig | 9 +
drivers/soc/qcom/Makefile | 1 +
drivers/soc/qcom/l2-accessors.c | 66
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