[PATCH] PCI: cadence: LTSSM Detect Quiet state minimum delay setting.

. 10 : 1ms minimum wait time in Detect.Quiet state. 11 : 2ms minimum wait time in Detect.Quiet state. Signed-off-by: Nadeem Athani --- drivers/pci/controller/cadence/pci-j721e.c | 6 ++ drivers/pci/controller/cadence/pcie-cadence-ep.c | 21 + drivers/pci/controll

[PATCH 1/2] dt-bindings:pci: Set LTSSM Detect.Quiet state delay.

minimum wait time in Detect.Quiet state. Signed-off-by: Nadeem Athani --- .../devicetree/bindings/pci/cdns,cdns-pcie-host.yaml| 13 + 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml b/Documentation/devicetree/bindings

[PATCH 2/2] PCI: cadence: Set LTSSM Detect.Quiet state delay.

minimum wait time in Detect.Quiet state. As per PCIe specification, all Receivers must meet the Z-RX-DC specification for 2.5 GT/s within 1000us of entering Detect.Quiet LTSSM substate. The LTSSM must stay in this substate until the ZRXDC specification for 2.5 GT/s is met. Signed-off-by: Nadeem Athani

[PATCH 0/2] PCI: cadence: Set LTSSM Detect.Quiet state delay.

state. 00 : 0us minimum wait time in Detect.Quiet state. 01 : 100us minimum wait time in Detect.Quiet state. 10 : 1000us minimum wait time in Detect.Quiet state. 11 : 2000us minimum wait time in Detect.Quiet state. Nadeem Athani (2): dt-bindings:pci: Set LTSSM Detect.Quiet state delay. PCI

[PATCH v8 2/2] PCI: cadence: Retrain Link to work around Gen2 training defect.

Cadence controller will not initiate autonomous speed change if strapped as Gen2. The Retrain Link bit is set as quirk to enable this speed change. Signed-off-by: Nadeem Athani --- drivers/pci/controller/cadence/pci-j721e.c | 3 ++ drivers/pci/controller/cadence/pcie-cadence-host.c

[PATCH v8 1/2] PCI: cadence: Shifting of a function to support new code.

Moving the function cdns_pcie_host_wait_for_link() further up in the file, as it's going to be used by upcoming additional code in the driver. Signed-off-by: Nadeem Athani --- drivers/pci/controller/cadence/pcie-cadence-host.c | 33 +++--- 1 file changed, 16 insertions(+

[PATCH v8 0/2] PCI: cadence: Retrain Link to work around Gen2

: cdns_pcie_host_wait_for_link(). Changes in v3: - To set retrain link bit,checking device capability & link status. - 32bit read in place of 8bit. - Minor correction in patch comment. - Change in variable & macro name. Changes in v2: - 16bit read in place of 8bit. Nadeem Athani (2): PCI: cadence: Shift

[PATCH v7 0/2] PCI: cadence: Retrain Link to work around Gen2

capability & link status. - 32bit read in place of 8bit. - Minor correction in patch comment. - Change in variable & macro name. Changes in v2: - 16bit read in place of 8bit. Nadeem Athani (2): PCI: cadence: Shifting of a function to support new code. PCI: cadence: Retrain Link to wor

[PATCH v7 2/2] PCI: cadence: Retrain Link to work around Gen2 training defect.

Cadence controller will not initiate autonomous speed change if strapped as Gen2. The Retrain Link bit is set as quirk to enable this speed change. Signed-off-by: Nadeem Athani --- drivers/pci/controller/cadence/pci-j721e.c | 3 ++ drivers/pci/controller/cadence/pcie-cadence-host.c

[PATCH v7 1/2] PCI: cadence: Shifting of a function to support new code.

Move the function cdns_pcie_host_wait_for_link() further up in the file, as it's going to be used by upcoming additional code in the driver. Signed-off-by: Nadeem Athani --- drivers/pci/controller/cadence/pcie-cadence-host.c | 33 +++--- 1 file changed, 16 insertions(+

[PATCH v6 1/2] PCI: cadence: Retrain Link to work around Gen2 training defect.

Moving the function above to remove compilation error. No changes in function. Signed-off-by: Nadeem Athani --- drivers/pci/controller/cadence/pcie-cadence-host.c | 33 +++--- 1 file changed, 16 insertions(+), 17 deletions(-) diff --git a/drivers/pci/controller/cadence/pcie

[PATCH v6 2/2] PCI: cadence: Retrain Link to work around Gen2 training defect.

Cadence controller will not initiate autonomous speed change if strapped as Gen2. The Retrain Link bit is set as quirk to enable this speed change. Signed-off-by: Nadeem Athani --- drivers/pci/controller/cadence/pci-j721e.c | 3 ++ drivers/pci/controller/cadence/pcie-cadence-host.c

[PATCH v6 0/2] PCI: cadence: Retrain Link to work around Gen2

p; macro name. Changes in v2: - 16bit read in place of 8bit. Nadeem Athani (2): PCI: cadence: Retrain Link to work around Gen2 training defect. PCI: cadence: Retrain Link to work around Gen2 training defect. drivers/pci/controller/cadence/pci-j721e.c | 3 + drivers/pci/controller/cade

[PATCH v4 0/2] PCI: cadence: Retrain Link to work around Gen2

Changes in v2: - 16bit read in place of 8bit. Nadeem Athani (2): dt-bindings: pci: Retrain Link to work around Gen2 training defect. PCI: cadence: Retrain Link to work around Gen2 training defect. .../bindings/pci/cdns,cdns-pcie-host.yaml | 4 +- drivers/pci/controller/cadence/pcie

[PATCH v4 2/2] PCI: cadence: Retrain Link to work around Gen2 training defect.

Cadence controller will not initiate autonomous speed change if strapped as Gen2. The Retrain Link bit is set as quirk to enable this speed change. Signed-off-by: Nadeem Athani --- drivers/pci/controller/cadence/pcie-cadence-host.c | 67 -- drivers/pci/controller/cadence

[PATCH v4 1/2] dt-bindings: pci: Retrain Link to work around Gen2 training defect.

Cadence controller will not initiate autonomous speed change if strapped as Gen2. The Retrain Link bit is set as quirk to enable this speed change. Adding a quirk flag based on a new compatible string. Signed-off-by: Nadeem Athani --- Documentation/devicetree/bindings/pci/cdns,cdns-pcie

[PATCH v3] PCI: cadence: Retrain Link to work around Gen2 training defect.

Cadence controller will not initiate autonomous speed change if strapped as Gen2. The Retrain Link bit is set as quirk to enable this speed change. Signed-off-by: Nadeem Athani --- Changes in v3: - To set retrain link bit,checking device capability & link status. - 32bit read in place of

[PATCH v2] PCI: Cadence: Add quirk for Gen2 controller to do autonomous speed change.

Cadence controller will not initiate autonomous speed change if strapped as Gen2. The Retrain bit is set as a quirk to trigger this speed change. Signed-off-by: Nadeem Athani --- drivers/pci/controller/cadence/pcie-cadence-host.c | 14 ++ drivers/pci/controller/cadence/pcie

[PATCH] PCI: Cadence: Add quirk for Gen2 controller to do autonomous speed change.

Cadence controller will not initiate autonomous speed change if strapped as Gen2. The Retrain bit is set as a quirk to trigger this speed change. Signed-off-by: Nadeem Athani --- drivers/pci/controller/cadence/pcie-cadence-host.c | 13 + drivers/pci/controller/cadence/pcie