Add the possible compatible "rockchip,rk3288w-cru" that handles
the difference between the rk3288 and the new revision rk3288w.
This compatible will be added by bootloaders.
Signed-off-by: Mylène Josserand
---
.../devicetree/bindings/clock/rockchip,rk3288-cru.txt | 8 ++
---
This V4 is pretty much the same than the V3. Added the dt-bindings
documentation in clock-controller dt-bindings and fixed some typos
according to Heiko's reviews.
Changes since v3:
- Updated clock-controller's dt-bindings
- Fixed indentation
Best regards,
Mylène Josserand
f the device-tree node is
"rockchip,rk3288w-cru", we will apply the difference with this
version of this SoC.
Noticed that this new device-tree compatible must be handled in
bootloader such as u-boot.
Signed-off-by: Mylène Josserand
---
drivers/clk/rockchip/clk-rk3288.c | 20 +
ore. If the compatible is
"rockchip,rk3288w-cru", we will apply the difference according to this
version of this SoC.
Noticed that this new device-tree compatible must be handled by
bootloader.
Signed-off-by: Mylène Josserand
---
drivers/clk/rockchip/clk-rk3288.c | 20 ++--
x27;s handle that by
Bootloaders
Best regards,
Mylène Josserand
[1]
https://github.com/rockchip-linux/kernel/blob/develop-4.4/drivers/clk/rockchip/clk-rk3288.c#L960..L964
[2]
https://github.com/rockchip-linux/u-boot/blob/next-dev/arch/arm/mach-rockchip/rk3288/rk3288.c#L378..L388
Mylène Jos
Add the possibility to use a gpio as reset.
Signed-off-by: Mylène Josserand
---
Documentation/devicetree/bindings/serial/maxim,max310x.txt | 1 +
drivers/tty/serial/max310x.c | 7 +++
2 files changed, 8 insertions(+)
diff --git a/Documentation/devicetree
Add the support of a gpio that can be defined as a push button.
Thanks to that, it is possible to emit a keycode in case of a
"push" event, if the rotary supports that.
The keycode to emit is defined using "linux,code" property
(such as in gpio-keys).
Signed-off-
With the support of CHAN_INFO_PROCESSED in voltage-divider,
it is possible to read the processed values directly from iio's
sysfs entries or by using iio-hwmon. Add an example for this last
use case.
Signed-off-by: Mylène Josserand
---
.../bindings/iio/afe/voltage-divider.txt
To prepare the support of processed value, create a function
to convert the scale according to the voltage-divider node
used in the device-tree.
Signed-off-by: Mylène Josserand
---
drivers/iio/afe/iio-rescale.c | 54 +--
1 file changed, 31 insertions
Add the support of the CHAN_INFO_PROCESSED to have directly
the processed value (raw * scale). It will be exported as
in_voltage0_input in sysfs.
Signed-off-by: Mylène Josserand
---
drivers/iio/afe/iio-rescale.c | 42 +-
1 file changed, 41 insertions
in device-tree.
If you have any feedbacks on it, I will be pleased to read them!
Best regards,
Mylène
Mylène Josserand (3):
iio: afe: rescale: Move scale conversion to new function
iio: afe: rescale: Add support of CHAN_INFO_PROCESSED
dt-bindings: iio: afe: Add hwmon example
.../bindings
Hello Dmitry,
On Mon, 13 Aug 2018 08:36:32 -0700
Dmitry Torokhov wrote:
> Hi Mylène,
>
> On Mon, Aug 13, 2018 at 8:24 AM Mylène Josserand
> wrote:
> >
> > Hi Dmitry,
> >
> > On Tue, 24 Jul 2018 10:40:53 -0700
> > Dmitry Torokhov wrote:
> >
&
Hi Dmitry,
On Tue, 24 Jul 2018 10:40:53 -0700
Dmitry Torokhov wrote:
> Hi Mylène,
>
> On Tue, Jul 24, 2018 at 03:00:46PM +0200, Mylène Josserand wrote:
> > Hello Dmitry,
> >
> > On Wed, 4 Jul 2018 16:21:58 +
> > Dmitry Torokhov wrote:
> >
>
Hello Dmitry,
Thank you again for the review.
On Wed, 25 Jul 2018 17:47:32 -0700
Dmitry Torokhov wrote:
> Hi Mylène,
>
> On Wed, Jul 25, 2018 at 09:34:08AM +0200, Mylène Josserand wrote:
> > Add the support of regulator to use it as VCC source.
> >
> > Sign
Tha A711 tablet has a FocalTech EDT-FT5x06 Polytouch touchscreen.
It is connected via I2C0. The reset line is PD5, the interrupt
line is PL7 and the VCC supply is the ldo_io0 regulator.
Signed-off-by: Mylène Josserand
---
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 16
1 file
in one patch (see patch 02).
Patch 01: Add support for regulator in the FocalTech touchscreen driver
because A711 tablet is using a regulator to power-up the touchscreen.
Patch 02: Add a set wake/reset values on resume and suspend.
Patch 03: Add i2c0 and touchscreen's node for A711 TBS tabl
Add the support of regulator to use it as VCC source.
Signed-off-by: Mylène Josserand
Reviewed-by: Rob Herring
---
.../bindings/input/touchscreen/edt-ft5x06.txt | 1 +
drivers/input/touchscreen/edt-ft5x06.c | 43 ++
2 files changed, 44 insertions(+)
diff
On resume and suspend, set the value of wake and reset gpios
to be sure that we are in a know state after suspending/resuming.
Signed-off-by: Mylène Josserand
---
drivers/input/touchscreen/edt-ft5x06.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/input/touchscreen
Hello Dmitry,
Thank you for your review!
On Mon, 23 Jul 2018 15:39:26 -0700
Dmitry Torokhov wrote:
> On Thu, Jul 19, 2018 at 12:46:45AM +0200, Ondřej Jirman wrote:
> > Hello Mylène,
> >
> > On Wed, Jul 18, 2018 at 08:27:17PM +0200, Mylène Josserand wrote:
> > >
Hello,
Thank you for your review.
On Thu, 19 Jul 2018 00:46:45 +0200
Ondřej Jirman wrote:
> Hello Mylène,
>
> On Wed, Jul 18, 2018 at 08:27:17PM +0200, Mylène Josserand wrote:
> > Add the support of regulator to use it as VCC source.
> >
> > Sign
Hello,
On Fri, 20 Jul 2018 07:43:55 -0600
Rob Herring wrote:
> On Wed, Jul 18, 2018 at 08:27:17PM +0200, Mylène Josserand wrote:
> > Add the support of regulator to use it as VCC source.
> >
> > Signed-off-by: Mylène Josserand
> > ---
> > .../bindings
Hello Dmitry,
On Wed, 4 Jul 2018 16:21:58 +
Dmitry Torokhov wrote:
> Hi Mylène,
>
> On Tue, Jul 03, 2018 at 11:43:07AM +0200, Mylène Josserand wrote:
> > Hello,
> >
> > Here is a V6 series to add the driver of the touchscreen Cypress,
> > TrueTouch Gen
Tha A711 tablet has a FocalTech EDT-FT5x06 Polytouch touchscreen.
It is connected via I2C0. The reset line is PD5, the interrupt
line is PL7 and the VCC supply is the ldo_io0 regulator.
Signed-off-by: Mylène Josserand
---
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 16
1 file
On resume and suspend, set the value of wake and reset gpios
to be sure that we are in a know state after suspending/resuming.
Signed-off-by: Mylène Josserand
---
drivers/input/touchscreen/edt-ft5x06.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/input/touchscreen
Add the support of regulator to use it as VCC source.
Signed-off-by: Mylène Josserand
---
.../bindings/input/touchscreen/edt-ft5x06.txt | 1 +
drivers/input/touchscreen/edt-ft5x06.c | 29 ++
2 files changed, 30 insertions(+)
diff --git a/Documentation
touchscreen's node for A711 TBS tablet.
Thank you in advance for any review.
Best regards,
Mylène
Mylène Josserand (3):
Input: edt-ft5x06 - Add support for regulator
Input: edt-ft5x06 - Set wake/reset values on resume/suspend
arm: dts: sun8i: a83t: a711: Add touchscreen node
.../bindings
Hello Dmitry,
On Wed, 4 Jul 2018 16:21:58 +
Dmitry Torokhov wrote:
> Hi Mylène,
>
> On Tue, Jul 03, 2018 at 11:43:07AM +0200, Mylène Josserand wrote:
> > Hello,
> >
> > Here is a V6 series to add the driver of the touchscreen Cypress,
> > TrueTouch Gen
handles
button and multitouch events.
Reviewed-by: Maxime Ripard
Signed-off-by: Mylène Josserand
---
drivers/input/touchscreen/Kconfig | 16 +
drivers/input/touchscreen/Makefile |1 +
drivers/input/touchscreen/cyttsp5.c | 1110 +++
3 files changed, 1127
ed-by: Rob Herring
Signed-off-by: Mylène Josserand
---
.../bindings/input/touchscreen/cypress,cyttsp5.txt | 39 ++
1 file changed, 39 insertions(+)
create mode 100644
Documentation/devicetree/bindings/input/touchscreen/cypress,cyttsp5.txt
diff --git
a/Documentation/
n that comes from touchscreen's binding.
Patch 01: Add the basis of the driver for Cypress Gen5 Touchscreen.
Patch 02: Add the binding documentation for this driver.
Thank you,
Best regards,
Mylène
Mylène Josserand (2):
Input: Add driver for Cypress Generation 5 touchscreen
dt-bindin
don't need to be defined in multiple places.
Signed-off-by: Doug Berger
Signed-off-by: Florian Fainelli
Signed-off-by: Mylène Josserand
---
arch/arm/include/asm/cputype.h | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/cputype.h b/arc
As we found in sun9i-a80, CPUCFG is a collection of registers that are
mapped to the SoC's signals from each individual processor core and
associated peripherals.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
Move the assembly code for cluster cache enabling and resuming
into an assembly file instead of having it directly in C code.
Remove the CFLAGS because we are using the ARM directive "arch"
instead.
Signed-off-by: Mylène Josserand
Acked-by: Maxime Ripard
---
arch/arm/mach-sunxi/Make
Add CCI-400 node and control-port on CPUs needed by SMP bringup.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 41 +++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b
The R_CPUCFG is a collection of registers needed for SMP bringup
on clusters and cluster's reset.
For the moment, documentation about this register is found in
Allwinner's code only.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi |
ls to boot correctly.
Because of that, this function can't be called in SMP's early_initcall
function which is called after timer's init.
For secondary CPUs, add this function into secondary_startup
assembly entry.
Signed-off-by: Mylène Josserand
Acked-by: Maxime Ripard
---
arch/arm/ma
very well.
Add assembly code used for boot CPU and secondary CPU cores to make
sure that the CNTVOFF register is initialized. Because this code can
be used by different platforms, add this assembly file in ARM's common
folder.
Signed-off-by: Mylène Josserand
Reviewed-by: Geert Uytterhoeven
To prepare the support of sun8i-a83t, add a field in the smp_data
structure to know if we are on sun9i-a80 or sun8i-a83t.
Add also a global variable to retrieve which architecture we are
having.
Signed-off-by: Mylène Josserand
Acked-by: Maxime Ripard
---
arch/arm/mach-sunxi/mc_smp.c | 4
Add the use of enable-method property for SMP support which allows
to handle the SMP support for this specific SoC.
This commit adds enable-method properties to all CPU nodes.
Signed-off-by: Mylène Josserand
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 8
1 file changed, 8 insertions
BIT(0) in case of SUN8I-A83T.
There is also a bit swap between sun8i-a83t and sun9i-a80 that must be
handled.
Signed-off-by: Mylène Josserand
Acked-by: Maxime Ripard
---
arch/arm/mach-sunxi/Kconfig | 2 +-
arch/arm/mach-sunxi/mc_smp.c | 151 ++-
2
To prepare the support for sun8i-a83t, rename the macro that handles
the power-off of clusters because it is different from sun9i-a80 to
sun8i-a83t.
The power off register for clusters are different from a80 and a83t.
Signed-off-by: Mylène Josserand
Acked-by: Maxime Ripard
Reviewed-by: Chen-Yu
Now that a common function is available for CNTVOFF's
initialization, let's convert shmobile-apmu code to use
this function.
Signed-off-by: Mylène Josserand
Reviewed-by: Geert Uytterhoeven
Tested-by: Geert Uytterhoeven
Acked-by: Simon Horman
---
arch/arm/mach-shmobile/common.h
functions to separate the DT parsing of sun9i-a80 and
sun8i-a83t.
- Thanks to Maxime's review: order device tree's nodes according
to physical addresses, remove unused label and fix registers' sizes.
Update the commit log and commit title of my last patch (see
pat
Hi Maxime,
On Wed, 2 May 2018 15:08:42 +0200
Maxime Ripard wrote:
> On Tue, May 01, 2018 at 02:31:26PM +0200, Mylène Josserand wrote:
> > Add the initialization of CNTVOFF for sun8i-a83t.
> >
> > For boot CPU, create a new machine that handles this
> > functi
Add CCI-400 node and control-port on CPUs needed by SMP bringup.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 41 +++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b
As we found in sun9i-a80, CPUCFG is a collection of registers that are
mapped to the SoC's signals from each individual processor core and
associated peripherals.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
Move the assembly code for cluster cache enabling and resuming
into an assembly file instead of having it directly in C code.
Remove the CFLAGS because we are using the ARM directive "arch"
instead.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-sunxi/Makefile | 2 +-
arch/arm/
very well.
Add assembly code used for boot CPU and secondary CPU cores to make
sure that the CNTVOFF register is initialized. Because this code can
be used by different platforms, add this assembly file in ARM's common
folder.
Signed-off-by: Mylène Josserand
Reviewed-by: Geert Uytterhoeven
The R_CPUCFG is a collection of registers needed for SMP bringup
on clusters and cluster's reset.
For the moment, documentation about this register is found in
Allwinner's code only.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi |
To prepare the support for sun8i-a83t, rename the macro that handles
the power-off of clusters because it is different from sun9i-a80 to
sun8i-a83t.
The power off register for clusters are different from a80 and a83t.
Signed-off-by: Mylène Josserand
Acked-by: Maxime Ripard
Reviewed-by: Chen-Yu
BIT(0) in case of SUN8I-A83T.
There is also a bit swap between sun8i-a83t and sun9i-a80 that must be
handled.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-sunxi/Kconfig | 2 +-
arch/arm/mach-sunxi/mc_smp.c | 151 ++-
2 files changed, 137 insertions(+
Now that a common function is available for CNTVOFF's
initialization, let's convert shmobile-apmu code to use
this function.
Signed-off-by: Mylène Josserand
Reviewed-by: Geert Uytterhoeven
Tested-by: Geert Uytterhoeven
---
arch/arm/mach-shmobile/common.h | 1 -
arc
To prepare the support of sun8i-a83t, add a field in the smp_data
structure to know if we are on sun9i-a80 or sun8i-a83t.
Add also a global variable to retrieve which architecture we are
having.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-sunxi/mc_smp.c | 4
1 file changed, 4
Add the use of enable-method property for SMP support which allows
to handle the SMP support for this specific SoC.
This commit adds enable-method properties to all CPU nodes.
Signed-off-by: Mylène Josserand
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 8
1 file changed, 8 insertions
addresses, remove unused label and fix registers' sizes.
Update the commit log and commit title of my last patch (see
patch 05).
Doug Berger (1):
ARM: Allow this header to be included by assembly files
Mylène Josserand (11):
ARM: sunxi: smp: Move assembly code into a file
ARM
don't need to be defined in multiple places.
Signed-off-by: Doug Berger
Signed-off-by: Florian Fainelli
Signed-off-by: Mylène Josserand
---
arch/arm/include/asm/cputype.h | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/cputype.h b/arc
ls to boot correctly.
Because of that, this function can't be called in SMP's early_initcall
function which is called after timer's init.
For secondary CPUs, add this function into secondary_startup
assembly entry.
Signed-off-by: Mylène Josserand
Acked-by: Maxime Ripard
---
arch/arm/ma
Hello,
On Mon, 23 Apr 2018 10:14:23 +0200
Maxime Ripard wrote:
> On Fri, Apr 20, 2018 at 11:10:19PM +0200, Mylène Josserand wrote:
> > To prepare the support of sun8i-a83t, add a field in the smp_data
> > structure to know if we are on sun9i-a80 or sun8i-a83t.
> >
Hello Maxime,
Thanks for your review.
On Mon, 23 Apr 2018 10:16:09 +0200
Maxime Ripard wrote:
> On Fri, Apr 20, 2018 at 11:10:17PM +0200, Mylène Josserand wrote:
> > Add the initialization of CNTVOFF for sun8i-a83t.
> >
> > For boot CPU, create a new machine that handle
Hello,
On Fri, 20 Apr 2018 23:10:11 +0200
Mylène Josserand wrote:
> Hello everyone,
>
> This is a V7 of my series that adds SMP support for Allwinner sun8i-a83t.
> Based on sunxi's tree, sunxi/for-next branch.
> Depends on a patch from Doug Berger that allows to include the
very well.
Add assembly code used for boot CPU and secondary CPU cores to make
sure that the CNTVOFF register is initialized. Because this code can
be used by different platforms, add this assembly file in ARM's common
folder.
Signed-off-by: Mylène Josserand
Reviewed-by: Geert Uytterhoeven
BIT(0) in case of SUN8I-A83T.
There is also a bit swap between sun8i-a83t and sun9i-a80 that must be
handled.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-sunxi/Kconfig | 2 +-
arch/arm/mach-sunxi/mc_smp.c | 151 ++-
2 files changed, 137 insertions(+
To prepare the support of sun8i-a83t, add a field in the smp_data
structure to know if we are on sun9i-a80 or sun8i-a83t.
Add also a global variable to retrieve which architecture we are
having.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-sunxi/mc_smp.c | 4
1 file changed, 4
Now that a common function is available for CNTVOFF's
initialization, let's convert shmobile-apmu code to use
this function.
Signed-off-by: Mylène Josserand
Reviewed-by: Geert Uytterhoeven
Tested-by: Geert Uytterhoeven
---
arch/arm/mach-shmobile/common.h | 1 -
arc
Add the use of enable-method property for SMP support which allows
to handle the SMP support for this specific SoC.
This commit adds enable-method properties to all CPU nodes.
Signed-off-by: Mylène Josserand
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 8
1 file changed, 8 insertions
To prepare the support for sun8i-a83t, rename the macro that handles
the power-off of clusters because it is different from sun9i-a80 to
sun8i-a83t.
The power off register for clusters are different from a80 and a83t.
Signed-off-by: Mylène Josserand
Acked-by: Maxime Ripard
Reviewed-by: Chen-Yu
Add CCI-400 node and control-port on CPUs needed by SMP bringup.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 41 +++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b
ls to boot correctly.
Because of that, this function can't be called in SMP's early_initcall
function which is called after timer's init.
For secondary CPUs, add this function into secondary_startup
assembly entry.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-sunxi/headsmp.S | 1 +
As we found in sun9i-a80, CPUCFG is a collection of registers that are
mapped to the SoC's signals from each individual processor core and
associated peripherals.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
The R_CPUCFG is a collection of registers needed for SMP bringup
on clusters and cluster's reset.
For the moment, documentation about this register is found in
Allwinner's code only.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi |
Move the assembly code for cluster cache enabling and resuming
into an assembly file instead of having it directly in C code.
Remove the CFLAGS because we are using the ARM directive "arch"
instead.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-sunxi/Makefile | 4 +--
arch/arm/
sing of sun9i-a80 and
sun8i-a83t.
- Thanks to Maxime's review: order device tree's nodes according
to physical addresses, remove unused label and fix registers' sizes.
Update the commit log and commit title of my last patch (see
patch 05).
Mylène Josserand (11):
sing of sun9i-a80 and
sun8i-a83t.
- Thanks to Maxime's review: order device tree's nodes according
to physical addresses, remove unused label and fix registers' sizes.
Update the commit log and commit title of my last patch (see
patch 05).
Mylène Josserand (11):
> >> > On Tue, Apr 17, 2018 at 11:12:41AM +0800, Chen-Yu Tsai wrote:
> >> >> On Tue, Apr 17, 2018 at 5:50 AM, Mylène Josserand
> >> >> wrote:
> >> >> > Move the assembly code for cluster cache enabling and resuming
> >> >&g
Hello Simon,
On Wed, 18 Apr 2018 15:48:55 +0200
Simon Horman wrote:
> On Wed, Apr 18, 2018 at 12:03:27PM +0200, Mylène Josserand wrote:
> > Hello,
> >
> > On Wed, 18 Apr 2018 11:36:27 +0200
> > Geert Uytterhoeven wrote:
> >
> > > Hi Mylène,
>
Hello,
On Wed, 18 Apr 2018 11:36:27 +0200
Geert Uytterhoeven wrote:
> Hi Mylène,
>
> On Mon, Apr 16, 2018 at 11:50 PM, Mylène Josserand
> wrote:
> > Now that a common function is available for CNTVOFF's
> > initialization, let's convert shmobile-
Hello Geert,
On Wed, 18 Apr 2018 11:30:47 +0200
Geert Uytterhoeven wrote:
> Allo Mylène,
>
> On Mon, Apr 16, 2018 at 11:50 PM, Mylène Josserand
> wrote:
> > The CNTVOFF register from arch timer is uninitialized.
> > It should be done by the bootloader but it i
Hello,
On Tue, 17 Apr 2018 11:21:02 +0300
Sergei Shtylyov wrote:
> Hello!
>
> On 4/17/2018 12:50 AM, Mylène Josserand wrote:
>
> > To prepare the support for sun8i-a83t, rename the variable name
>
> s/variable/macro/ maybe? Also "rename the ... name"
> Because otherwise when I'm building kernel just for sun8i and I don't have
> sun9i
> enabled, this new SMP code for A83T (which is sun8i) will not be built.
>
True, I forgot to add this, thanks!
Best regards,
Mylène
--
Mylène Josserand, Bootlin (formerly Free Electron
Hello Maxime,
On Tue, 17 Apr 2018 13:20:38 +0200
Maxime Ripard wrote:
> On Mon, Apr 16, 2018 at 11:50:30PM +0200, Mylène Josserand wrote:
> > @@ -535,8 +599,12 @@ static int sunxi_mc_smp_cpu_kill(unsigned int l_cpu)
> > return !ret;
> > }
> >
> > -static
Move the assembly code for cluster cache enabling and resuming
into an assembly file instead of having it directly in C code.
Remove the CFLAGS because we are using the ARM directive "arch"
instead.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-sunxi/Makefile | 4 +--
arch/arm/
ls to boot correctly.
Because of that, this function can't be called in SMP's early_initcall
function which is called after timer's init.
For secondary CPUs, add this function into secondary_startup
assembly entry.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-sunxi/headsmp.S | 1 +
Add the use of enable-method property for SMP support which allows
to handle the SMP support for this specific SoC.
This commit adds enable-method properties to all CPU nodes.
Signed-off-by: Mylène Josserand
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 8
1 file changed, 8 insertions
Now that a common function is available for CNTVOFF's
initialization, let's convert shmobile-apmu code to use
this function.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-shmobile/common.h | 1 -
arch/arm/mach-shmobile/headsmp-apmu.S| 22 +-
arc
BIT(0) in case of SUN8I-A83T.
There is also a bit swap between sun8i-a83t and sun9i-a80 that must be
handled.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-sunxi/mc_smp.c | 151 ++-
1 file changed, 136 insertions(+), 15 deletions(-)
diff --git a/arch/arm
To prepare the support of sun8i-a83t, add a field in the smp_data
structure to know if we are on sun9i-a80 or sun8i-a83t.
Add also a global variable to retrieve which architecture we are
having.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-sunxi/mc_smp.c | 5 +
1 file changed, 5
very well.
Add assembly code used for boot CPU and secondary CPU cores to make
sure that the CNTVOFF register is initialized. Because this code can
be used by different platforms, add this assembly file in ARM's common
folder.
Signed-off-by: Mylène Josserand
---
arch/arm/commo
To prepare the support for sun8i-a83t, rename the variable name
that handles the power-off of clusters because it is different from
sun9i-a80 to sun8i-a83t.
The power off register for clusters are different from a80 and a83t.
Signed-off-by: Mylène Josserand
Acked-by: Maxime Ripard
Reviewed-by
Add CCI-400 node and control-port on CPUs needed by SMP bringup.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 41 +++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b
- Thanks to Maxime's review: order device tree's nodes according
to physical addresses, remove unused label and fix registers' sizes.
Update the commit log and commit title of my last patch (see
patch 05).
Mylène Josserand (11):
ARM: sunxi: smp: Move assembly code in
The R_CPUCFG is a collection of registers needed for SMP bringup
on clusters and cluster's reset.
For the moment, documentation about this register is found in
Allwinner's code only.
Signed-off-by: Mylène Josserand
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 5 +
1 file changed, 5
As we found in sun9i-a80, CPUCFG is a collection of registers that are
mapped to the SoC's signals from each individual processor core and
associated peripherals.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
?), it is okay for me to refactor this
> >> code :)
> >
> > I guess you could Cc the shmobile folks (Geert Uytterhoeven, Simon
> > Horman), and get them to review/test the changes.
>
> Correct. I can test on a remote R-Car E2 ALT board that needs it.
Great, thank yo
fine cpuid_feature_extract(reg, field) \
> cpuid_feature_extract_field(read_cpuid_ext(reg), field)
>
> +#endif /* __ASSEMBLY__ */
> +
> #endif
Tested-by: Mylène Josserand
Thanks!
Best regards,
--
Mylène Josserand, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com
Hello Maxime,
On Wed, 4 Apr 2018 09:45:15 +0200
Maxime Ripard wrote:
> On Tue, Apr 03, 2018 at 10:06:28PM +0200, Mylène Josserand wrote:
> > Hello,
> >
> > Thank you for the review.
> >
> > On Tue, 3 Apr 2018 11:12:18 +0200
> > Maxime Ripard wrote:
>
Hi Marc,
Thank you for the review.
On Wed, 4 Apr 2018 14:01:48 +0100
Marc Zyngier wrote:
> Hi Mylène,
>
> On 03/04/18 07:18, Mylène Josserand wrote:
> > The CNTVOFF register from arch timer is uninitialized.
> > It should be done by the bootloader but it is currently n
Hello Florian,
On Tue, 3 Apr 2018 12:56:30 -0700
Florian Fainelli wrote:
> On 04/02/2018 11:52 PM, Chen-Yu Tsai wrote:
> > On Tue, Apr 3, 2018 at 2:18 PM, Mylène Josserand
> > wrote:
> >> To add the support for SMP on sun8i-a83t, we will use some
> >> defini
Hello Chen-Yu,
Thanks for your review.
On Tue, 3 Apr 2018 16:47:53 +0800
Chen-Yu Tsai wrote:
> On Tue, Apr 3, 2018 at 2:18 PM, Mylène Josserand
> wrote:
> > Add the support for A83T.
> >
> > A83T SoC has an additional register than A80 to handle CPU configurations:
>
Hi,
On Tue, 3 Apr 2018 16:48:41 +0800
Chen-Yu Tsai wrote:
> On Tue, Apr 3, 2018 at 4:46 PM, Maxime Ripard
> wrote:
> > On Tue, Apr 03, 2018 at 08:18:34AM +0200, Mylène Josserand wrote:
> >> To prepare the support of sun8i-a83t, add a field in the smp_data
> >>
Hello,
Thank you for the review.
On Tue, 3 Apr 2018 11:12:18 +0200
Maxime Ripard wrote:
> On Tue, Apr 03, 2018 at 08:18:31AM +0200, Mylène Josserand wrote:
> > Add the initialization of CNTVOFF for sun8i-a83t.
> >
> > For boot CPU, Create a new machine that handles this
&
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