ly in __rproc_virtio_del_vqs
before virtqueue is free to ensure that rproc_vq_interrupt is
aware of the virtqueue removal.
The synchronized_vqs is expected to be implemented in rproc
driver to ensure that all previous vring_interrupts are handled
before the vqs are marked as broken or removed.
Signed-off-by: Ma
From: Michal Kubecek
Hi,
I found that CVE-2019-16089 still exist in upstream kernel.
Does anyone know why this patch was not merged?
The following commit has been merged into the irq/irqchip-next branch of
irqchip:
Commit-ID: ea4aeaa5c88906eb3ca3d7d3d17a45605d2dd0de
Gitweb:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/ea4aeaa5c88906eb3ca3d7d3d17a45605d2dd0de
Author:Mark-PK Tsai
From: Mark-PK Tsai
To: Marc Zyngier
Cc: Mark-PK Tsai ,
Daniel Palmer ,
Thomas Gleixner ,
Matthias Brugger ,
,
,
,
Subject: [PATCH v4] irqchip/irq-mst: Support polarity configuration
Date: Mon, 15 Mar 2021 21:18:48 +0800
> Support irq polar
Support irq polarity configuration and save and restore the config
when system suspend and resume.
Signed-off-by: Mark-PK Tsai
---
drivers/irqchip/irq-mst-intc.c | 94 --
1 file changed, 91 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-mst
From: Daniel Palmer
> On Fri, 12 Mar 2021 at 01:11, Mark-PK Tsai wrote:
> > Why irq could accept either?
>
> As the irq intc has no way to clear it's triggered state (no eoi) it
> must just pass the signal through instead of latching it?
> Otherwise it would latch
From: Daniel Palmer
> On Thu, 11 Mar 2021 at 12:12, Mark-PK Tsai wrote:
> > For a fiq controller, the input edge signal will be convert to level and
> > keep the interrupt status until we do EOI operation.
> > That means if a rising edge input if trigger the ouput line wil
From: Daniel Palmer
>On Mon, 8 Mar 2021 at 23:30, Mark-PK Tsai wrote:
>> From: Daniel Palmer
>> >On Mon, 8 Mar 2021 at 15:05, Mark-PK Tsai wrote:
>> >> +static int mst_irq_chip_set_type(struct irq_data *data, unsigned int
>> >> ty
Support irq polarity configuration and save and restore the config
when system suspend and resume.
Signed-off-by: Mark-PK Tsai
---
drivers/irqchip/irq-mst-intc.c | 92 --
1 file changed, 89 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-mst
From: Marc Zyngier
>On 2021-03-08 03:01, Mark-PK Tsai wrote:
>> From: Marc Zyngier
>>
>>> >
>>> > Support irq polarity configuration and save and restore the config
>>> > when system suspend and resume.
>>> >
>>> > S
From: Daniel Palmer
>On Mon, 8 Mar 2021 at 15:05, Mark-PK Tsai wrote:
>> +static int mst_irq_chip_set_type(struct irq_data *data, unsigned int type)
> > +{
>> + if (type != IRQ_TYPE_LEVEL_LOW && type != IRQ_TYPE_LEVEL_HIGH)
>> + ret
Support irq polarity configuration and save and restore the config
when system suspend and resume.
Signed-off-by: Mark-PK Tsai
---
drivers/irqchip/irq-mst-intc.c | 90 --
1 file changed, 87 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-mst
From: Marc Zyngier
> >
> > Support irq polarity configuration and save and restore the config
> > when system suspend and resume.
> >
> > Signed-off-by: Mark-PK Tsai
> > ---
> > drivers/irqchip/irq-mst-intc.c | 87 -
Support irq polarity configuration and save and restore the config
when system suspend and resume.
Signed-off-by: Mark-PK Tsai
---
drivers/irqchip/irq-mst-intc.c | 87 --
1 file changed, 84 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-mst
mst_intc_of_init is not intended to be used ouside of irq-mst-intc.c,
declare it static.
Reported-by: kernel test robot
Signed-off-by: Mark-PK Tsai
---
drivers/irqchip/irq-mst-intc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-mst-intc.c b/drivers
The following commit has been merged into the irq/core branch of tip:
Commit-ID: ad4c938c92af91302e363b1842c82f1cc4a6c4fd
Gitweb:
https://git.kernel.org/tip/ad4c938c92af91302e363b1842c82f1cc4a6c4fd
Author:Mark-PK Tsai
AuthorDate:Wed, 02 Sep 2020 14:33:43 +08:00
Committer
The following commit has been merged into the irq/core branch of tip:
Commit-ID: 6d8af863b89da6bdce013db2216b432b4016042e
Gitweb:
https://git.kernel.org/tip/6d8af863b89da6bdce013db2216b432b4016042e
Author:Mark-PK Tsai
AuthorDate:Wed, 02 Sep 2020 14:33:44 +08:00
Committer
From: Marc Zyngier
>On 2020-08-20 13:36, Daniel Palmer wrote:
>> Hi Mark-PK, Marc
>>
>> I'm not sure this will be the final version but I'm going to try to
>> integrate this with my current MStar/SigmaStar tree over the weekend
>> and then I guess I can give this a tested-by?
>
>That'd be good.
Hi,
I've updated the yaml and post it in the patch series v3[1].
But I still keep the vendor specific property mstar,irqs-map-range as I
mentioned in the last reply.
Please review it.
[1]
https://lore.kernel.org/lkml/20200902063344.1852-3-mark-pk.t...@mediatek.com/
Add MStar interrupt controller support using hierarchy irq
domain.
Signed-off-by: Mark-PK Tsai
Tested-by: Daniel Palmer
---
MAINTAINERS| 7 ++
drivers/irqchip/Kconfig| 8 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-mst-intc.c | 199
MStar contain a legacy interrupt controller that routes interrupts
to the GIC. SigmaStar and Mediatek TV SoCs also have this interrupt
controller IP.
Mark-PK Tsai (2):
irqchip: irq-mst: Add MStar interrupt controller support
dt-bindings: interrupt-controller: Add MStar interrupt controller
Add binding for MStar interrupt controller.
Signed-off-by: Mark-PK Tsai
---
.../interrupt-controller/mstar,mst-intc.yaml | 64 +++
1 file changed, 64 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/mstar,mst-intc.yaml
diff --git
a
From: Rob Herring
>> +
>> + "#interrupt-cells":
>> +const: 3
>> +description: |
>> + Use the same format as specified by GIC in arm,gic.yaml.
>
>That's odd. You have the same SPI and PPI stuff?
>
No, but I just want to keep the format same as arm,gic, and let the
driver bypass 1st
Add entry for MStar Interrupt Controller.
Signed-off-by: Mark-PK Tsai
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index deaafb617361..8ab08fccd915 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11754,6 +11754,13 @@ Q:
http
From: Daniel Palmer
>Hi Mark-PK,
>
>On Thu, 20 Aug 2020 at 00:38, Mark-PK Tsai wrote:
>>
>> Add MStar interrupt controller support using hierarchy irq
>> domain.
>>
>> Signed-off-by: Mark-PK Tsai
>
>I've integrated this version into my MS
Add MStar interrupt controller support using hierarchy irq
domain.
Signed-off-by: Mark-PK Tsai
---
drivers/irqchip/Kconfig| 8 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-mst-intc.c | 199 +
3 files changed, 208 insertions(+)
create
From: Marc Zyngier
>On 2020-08-19 14:31, Mark-PK Tsai wrote:
>> From: Marc Zyngier
>>
>>> > +
>>> > +static int mst_intc_domain_alloc(struct irq_domain *domain, unsigned
>>> > int virq,
>>> > +
Add MStar interrupt controller support using hierarchy irq
domain.
Signed-off-by: Mark-PK Tsai
---
drivers/irqchip/Kconfig| 7 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-mst-intc.c | 195 +
3 files changed, 203 insertions(+)
create
Add binding for MStar interrupt controller.
Signed-off-by: Mark-PK Tsai
---
.../interrupt-controller/mstar,mst-intc.yaml | 82 +++
1 file changed, 82 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/mstar,mst-intc.yaml
diff --git
a
MStar contain a legacy interrupt controller that routes interrupts
to the GIC. SigmaStar and Mediatek TV SoCs also have this interrupt
controller IP.
Mark-PK Tsai (2):
irqchip: irq-mst: Add MStar interrupt controller support
dt-bindings: interrupt-controller: Add MStar interrupt controller
From: Marc Zyngier
> On 2020-08-06 15:58, Daniel Palmer wrote:
> > Hi Mark-PK,
> >
> > On Thu, 6 Aug 2020 at 23:08, Mark-PK Tsai
> > wrote:
> >> > Do you know if it would be possible to confirm if they are
> >> > the
> >> > same
From: Daniel Palmer
> Hi Mark-PK,
>
> Your driver seems to be for the same interrupt controller IP that is
> present in MStar's TV and camera SoCs and now SigmaStar's SoCs.
> I sent a series[0] for a driver very similar to yours but for the
> MStar SoCs. Do you know if it would be possible to co
Add binding for MT58XX interrupt controller.
Signed-off-by: Mark-PK Tsai
---
.../mediatek,mt58xx-intc.yaml | 70 +++
1 file changed, 70 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/mediatek,mt58xx-intc.yaml
diff --git
Add mt58xx interrupt controller support using hierarchy irq
domain.
Signed-off-by: Mark-PK Tsai
---
drivers/irqchip/Kconfig | 7 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-mt58xx.c | 196 +++
3 files changed, 204 insertions(+)
create
Mediatek DTV SoCs contain multiple legacy interrupt controllers that routes
interrupts to the GIC. And all the mt58xx series SoCs have this controller,
hence the name of the driver and binding.
Mark-PK Tsai (2):
irqchip: irq-mt58xx: Add mt58xx interrupt controller support
dt-bindings
The following commit has been merged into the perf/urgent branch of tip:
Commit-ID: 310aa0a25b338b3100c94880c9a69bec8ce8c3ae
Gitweb:
https://git.kernel.org/tip/310aa0a25b338b3100c94880c9a69bec8ce8c3ae
Author:Mark-PK Tsai
AuthorDate:Fri, 06 Sep 2019 14:01:16 +08:00
r arm platform, the struct step_ctrl in arch_hw_breakpoint, which
used to be zero-initialized by kzalloc, may be used in
arch_install_hw_breakpoint without initialization.
Signed-off-by: Mark-PK Tsai
Cc: YJ Chiang
Cc: Alix Wu
---
kernel/events/hw_breakpoint.c | 4 ++--
1 file changed, 2 inser
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