For AMX, we must still reserve the space, but we are not going to write zeros
for clean state. We so this in software by checking XINUSE=0, and clearing
the xstate_bf for the XSAVE. As a result, for XINUSE=0, we can skip
writing the zeros, even though we can't compress the space.
So my unde
On 3/25/2021 5:09 AM, Len Brown wrote:
On Tue, Mar 23, 2021 at 11:15 PM Liu, Jing2 wrote:
IMO, the problem with AVX512 state
is that we guaranteed it will be zero for XINUSE=0.
That means we have to write 0's on saves.
why "we have to write 0's on saves" when XINUSE=
On 3/24/2021 5:01 AM, Len Brown wrote:
I have an obnoxious question: do we really want to use the XFD mechanism?
Obnoxious questions are often the most valuable! :-)
[...]
cheers,
Len Brown, Intel Open Source Technology Center
ps. I agree that un-necessary XINUSE=1 is possible.
Notwithstand
On 3/2/2021 7:59 AM, Sean Christopherson wrote:
On Thu, Feb 25, 2021, Jing Liu wrote:
XCOMP_BV[63] field indicates that the save area is in the compacted
format and XCOMP_BV[62:0] indicates the states that have space allocated
in the save area, including both XCR0 and XSS bits enabled by the
On 2/25/2021 4:40 AM, Sean Christopherson wrote:
On Tue, Feb 23, 2021, Liu, Jing2 wrote:
XCOMP_BV[63] field indicates that the save area is in the
compacted format and XCOMP_BV[62:0] indicates the states that
have space allocated in the save area, including both XCR0
and XSS bits enable by
On 2/23/2021 12:06 AM, Sean Christopherson wrote:
On Mon, Feb 22, 2021, Liu, Jing2 wrote:
On 2/9/2021 1:24 AM, Sean Christopherson wrote:
On Mon, Feb 08, 2021, Dave Hansen wrote:
On 2/8/21 8:16 AM, Jing Liu wrote:
-#define XSTATE_COMPACTION_ENABLED (1ULL << 63)
-
static void fill
On 2/9/2021 2:55 AM, Konrad Rzeszutek Wilk wrote:
On Mon, Feb 08, 2021 at 07:12:22PM +0100, Paolo Bonzini wrote:
[...]
However, running the host with _more_ bits set than necessary in XFD should
not be a problem as long as the host doesn't use the AMX instructions. So
perhaps Jing can look
On 2/9/2021 2:12 AM, Paolo Bonzini wrote:
On 08/02/21 19:04, Sean Christopherson wrote:
That said, the case where we saw MSR autoload as faster involved
EFER, and
we decided that it was due to TLB flushes (commit f6577a5fa15d,
"x86, kvm,
vmx: Always use LOAD_IA32_EFER if available", 2014-11-1
On 2/9/2021 1:24 AM, Sean Christopherson wrote:
On Mon, Feb 08, 2021, Dave Hansen wrote:
On 2/8/21 8:16 AM, Jing Liu wrote:
-#define XSTATE_COMPACTION_ENABLED (1ULL << 63)
-
static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
{
struct xregs_state *xsave = &vcpu->arch.guest_fp
On 2/7/2021 7:49 PM, Borislav Petkov wrote:
On Sun, Feb 07, 2021 at 10:42:52AM -0500, Jing Liu wrote:
diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index 7e0c68043ce3..fbb761fc13ec 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -145,6 +145,7
On 1/15/2021 12:59 PM, Bae, Chang Seok wrote:
On Jan 11, 2021, at 18:52, Liu, Jing2 wrote:
On 1/8/2021 2:40 AM, Bae, Chang Seok wrote:
On Jan 7, 2021, at 17:41, Liu, Jing2 wrote:
static void kvm_save_current_fpu(struct fpu *fpu) {
+ struct fpu *src_fpu = ¤t->thread.
On 1/8/2021 2:40 AM, Bae, Chang Seok wrote:
On Jan 7, 2021, at 17:41, Liu, Jing2 wrote:
static void kvm_save_current_fpu(struct fpu *fpu) {
+ struct fpu *src_fpu = ¤t->thread.fpu;
+
/*
* If the target FPU state is not resident in the CPU registers, j
-Original Message-
From: Bae, Chang Seok
Sent: Wednesday, December 23, 2020 11:57 PM
To: b...@suse.de; l...@kernel.org; t...@linutronix.de; mi...@kernel.org;
x...@kernel.org
Cc: Brown, Len ; Hansen, Dave ;
Liu, Jing2 ; Shankar, Ravi V ;
linux-kernel@vger.kernel.org; Bae, Chang Seok
Hi Paolo,
On 6/20/2019 8:16 PM, Paolo Bonzini wrote:
On 20/06/19 13:21, Jing Liu wrote:
+ for (i = 1; i <= times; i++) {
+ if (*nent >= maxnent)
+ goto out;
+ do_cpuid_1_ent(&entry[i], function, i);
+
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