dma_device directions and addr_widths fields.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> Improved commit message title and description
as suggested by Vinod.
drivers/dma/xilinx/xilinx_dma.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/dma/xilinx/xilinx_dma.
= NULL;
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> Improved commit message title and description
as suggested by Vinod.
drivers/dma/xilinx/xilinx_dma.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xil
This patch series does the below
--> Fixes sparse warnings in the driver.
--> properly configures the SG mode bit in the driver for cdma.
--> populates dma caps properly.
This patch series got created on top of linux tag 4.15-rc4
i.e slave-dma.git next branch
Kedareswara rao
dmaengine.
This patch updates the same.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> Improved commit message title and description
as suggested by Vinod.
drivers/dma/xilinx/xilinx_dma.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/dma/xil
Free BD consistent memory while freeing the channel
i.e in free_chan_resources.
Signed-off-by: Radhey Shyam Pandey
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> None.
drivers/dma/xilinx/xilinx_dma.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/dma/xil
Free BD consistent memory while freeing the channel
i.e in free_chan_resources.
Signed-off-by: Radhey Shyam Pandey
Signed-off-by: Kedareswara rao Appana
---
drivers/dma/xilinx/xilinx_dma.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma
when hardware is idle we need to toggle the SG bit
in the control register, inorder to update new value to the
current descriptor register other wise undefined
results will occur.
This patch updates the same.
Signed-off-by: Kedareswara rao Appana
---
drivers/dma/xilinx/xilinx_dma.c | 10
: Kedareswara rao Appana
---
drivers/dma/xilinx/xilinx_dma.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 88d317d..21ac954 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
= NULL;
Signed-off-by: Kedareswara rao Appana
---
drivers/dma/xilinx/xilinx_dma.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 8467671..845e638 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b
quot;dmaengine: xilinx_dma: Fix typos"
Kedareswara rao Appana (4):
dmaengine: xilinx_dma: Fix dma_get_slave_caps() API failures
dmaengine: xilinx_dma: Fix race condition in the driver for cdma
dmaengine: xilinx_dma: Fix compilation warning
dmaengine: xilinx_dma: Free BD consistent memory
This patch adds runtime pm support in the driver.
Signed-off-by: Kedareswara rao Appana
---
Resending the patch as there are some issues with my git send-email,
patch is not showing in the dmeengine mailing list.
Changes for v2:
--> Fixed error path in the probe.
drivers/dma/xil
gned-off-by: Michal Simek
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> None.
drivers/dma/xilinx/zynqmp_dma.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/xilinx/zynqmp_dma.c b/drivers/dma/xilinx/zynqmp_dma.c
index 4fa14bf..4376e4a 100644
--- a/dr
Incase of interrupt property is not present,
Driver is trying to free an invalid irq,
This patch fixes it by adding a check before freeing the irq.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> New patch.
drivers/dma/xilinx/zynqmp_dma.c | 3 ++-
1 file changed, 2 inserti
untime pm support"
Changes for v2:
--> New patch added "dmaengine: zynqmp_dma: Fix race condition in the probe"
to the series.
Kedareswara rao Appana (4):
dmaengine: zynqmp_dma: Fix kernel doc-format
dmaengine: zynqmp_dma: Fix warning variable 'val' set but not used
dm
This patch fixes the below issues.
--> Need to clear the channel data count register
when overflow interrupts occurs.
--> Reduce the log level from _info to _dbg when
overflow interrupt occurs.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> None.
drivers/dma/xilinx/zyn
This patch fixes the below warning
drivers/dma/xilinx/zynqmp_dma.c: In function 'zynqmp_dma_handle_ovfl_int':
drivers/dma/xilinx/zynqmp_dma.c:522:6: warning: variable 'val' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Kedareswara rao Appana
---
Chan
This patch fixes below.
ERROR: open brace '{' following function definitions go on the next line
+static int xilinx_dma_child_probe(struct xilinx_dma_device *xdev,
+ struct device_node *node) {
Signed-off-by: Kedareswara rao Appana
---
Changes for v
configuration for frame buffers in s/w,
so that driver can handle all cases for "k" frames where n%k==0
(n is a multiple of k) by simply replicating the frame pointers.
Signed-off-by: Kedareswara rao Appana
---
Changes for v7:
---> Used park mode as default configuration as suggested
by M
This patch fixes the kernel doc warnings
in the driver.
Signed-off-by: Kedareswara rao Appana
---
Changes for v7:
--> New patch.
drivers/dma/xilinx/xilinx_dma.c | 37 -
1 file changed, 24 insertions(+), 13 deletions(-)
diff --git a/drivers/dma/xil
.
Signed-off-by: Kedareswara rao Appana
---
Changes for v7:
---> None.
Changes for v6:
---> Updated Commit message as suggested by Vinod.
Changes for v5:
---> None.
Changes for v4:
---> None.
Changes for v3:
---> None.
Changes for v2:
---> None.
drivers/dma/xilinx/
This patch updates the probe banner info based on the ip probed.
Signed-off-by: Kedareswara rao Appana
---
Changes for v7:
--> New patch.
drivers/dma/xilinx/xilinx_dma.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/
MM(recv)
Side.
---> Fixed kernel doc warnings in the driver.
---> Fixed checkpatch errors in the driver.
Kedareswara rao Appana (6):
dmaengine: xilinx_dma: Check for channel idle state before submitting
dma descriptor
dmaeninge: xilinx_dma: Fix bug in multiple frame stores scenario in
Add variable for checking channel idle state to ensure that dma
descriptor is not submitted when dmaengine is in progress.
This will avoid the polling for a bit in the status register to know
dma state in the driver hot path.
Reviewed-by: Jose Abreu
Signed-off-by: Kedareswara rao Appana
Add variable for checking channel idle state to ensure that dma descriptor is
not
Submitted when DMA engine is in progress.
This will avoids the pollling for a bit in the status register to know
Dma state in the driver hot path.
Reviewed-by: Jose Abreu
Signed-off-by: Kedareswara rao Appana
This patch series fixes below bugs in DMA and VDMA IP's
---> Do not start VDMA until frame buffer is processed by the h/w
---> Fix bug in Multi frame sotres handling in VDMA
---> Fix issues w.r.to multi frame descriptors submit with AXI DMA S2MM(recv)
Side.
Kedareswara
of frames at one time
As the h/w is configured for n number of frames.
This patch fixes this issue.
Acked-by: Rob Herring
Reviewed-by: Jose Abreu
Signed-off-by: Kedareswara rao Appana
---
Changes for v6:
---> Added Rob Acked-by
---> Updated commit message as suggested by Vinod.
Changes
descriptor next descriptor field
Points to a invalid location, resulting the invalid data or errors in the
DMA engine.
This patch fixes this issue by creating a Buffer Descritpor Chain during
Channel allocation itself and use those Buffer Descriptors.
Signed-off-by: Kedareswara rao Appana
---
Changes
Add channel idle state to ensure that dma descriptor is not
submitted when VDMA engine is in progress.
Reviewed-by: Jose Abreu
Signed-off-by: Kedareswara rao Appana
---
Changes for v5:
---> None.
Changes for v4:
---> None.
Changes for v3:
---> None.
Changes for v2:
---> Add idle
This patch series fixes below bugs in DMA and VDMA IP's
---> Do not start VDMA until frame buffer is processed by the h/w Fix
---> bug in Multi frame sotres handling in VDMA Fix issues w.r.to multi
---> frame descriptors submit with AXI DMA S2MM(recv) Side.
Kedareswara
creating a BD Chain during
channel allocation itself and use those BD's.
Signed-off-by: Kedareswara rao Appana
---
Changes for v5:
---> None.
Changes for v4:
---> None.
Changes for v3:
---> None.
Changes for v2:
---> None.
drivers/dma/xilinx/x
of frames at one time as the h/w
Is configured for n number of frames.
This patch fixes this issue.
Reviewed-by: Jose Abreu
Signed-off-by: Kedareswara rao Appana
---
Changes for v5:
---> Updated xlnx,fstore-config property to xlnx,fstore-enable
and updated description as suggested by
creating a BD Chain during
channel allocation itself and use those BD's.
Signed-off-by: Kedareswara rao Appana
---
Changes for v4:
---> None.
Changes for v3:
---> None.
Changes for v2:
---> None.
drivers/dma/xilinx/xilinx_dma.c | 133 +---
1 fi
Add channel idle state to ensure that dma descriptor is not
submitted when VDMA engine is in progress.
Reviewed-by: Jose Abreu
Signed-off-by: Kedareswara rao Appana
---
Changes for v3:
---> None.
Changes for v2:
---> Add idle check in the reset as suggested by Jose Abreu
--->
This patch series fixes below bugs in DMA and VDMA IP's
---> Do not start VDMA until frame buffer is processed by the h/w Fix
---> bug in Multi frame sotres handling in VDMA Fix issues w.r.to multi
---> frame descriptors submit with AXI DMA S2MM(recv) Side.
Kedareswara
of frames at one time as the h/w
Is configured for n number of frames.
This patch fixes this issue.
Reviewed-by: Jose Abreu
Signed-off-by: Kedareswara rao Appana
---
Changes for v4:
---> Add Check for framestore configuration on Transmit case as well
as suggested by Jose Ab
Add channel idle state to ensure that dma descriptor is not
submitted when VDMA engine is in progress.
Reviewed-by: Jose Abreu
Signed-off-by: Kedareswara rao Appana
---
Changes for v3:
---> None.
Changes for v2:
---> Add idle check in the reset as suggested by Jose Abreu
--->
creating a BD Chain during
channel allocation itself and use those BD's.
Signed-off-by: Kedareswara rao Appana
---
Changes for v3:
---> None.
Changes for v2:
---> None.
drivers/dma/xilinx/xilinx_dma.c | 133 +---
1 file changed, 83 insertions(+), 5
This patch series fixes below bugs in DMA and VDMA IP's
---> Do not start VDMA until frame buffer is processed by the h/w Fix
---> bug in Multi frame sotres handling in VDMA Fix issues w.r.to multi
---> frame descriptors submit with AXI DMA S2MM(recv) Side.
Kedareswara
of frames at one time as the h/w
Is configured for n number of frames.
This patch fixes this issue.
Signed-off-by: Kedareswara rao Appana
---
Changes for v3:
---> Added Checks for frame store configuration. If frame store
Configuration is not present at the h/w level and user
Subm
of frames at one time as the h/w
Is configured for n number of frames.
This patch fixes this issue.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
---> Fixed race conditions in the driver as suggested by Jose Abreu
---> Fixed unnecessray if else checks in the vdma_start_tr
creating a BD Chain during
channel allocation itself and use those BD's.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
---> None.
drivers/dma/xilinx/xilinx_dma.c | 133 +---
1 file changed, 83 insertions(+), 50 deletions(-)
diff --git a/dri
This patch series fixes below bugs in DMA and VDMA IP's
---> Do not start VDMA until frame buffer is processed by the h/w Fix
---> bug in Multi frame sotres handling in VDMA Fix issues w.r.to multi
---> frame descriptors submit with AXI DMA S2MM(recv) Side.
Kedareswara
Add channel idle state to ensure that dma descriptor is not
submitted when VDMA engine is in progress.
Reviewed-by: Jose Abreu
Signed-off-by: Kedareswara rao Appana
---
Changes fro v2:
---> Add idle check in the reset as suggested by Jose Abreu
---> Removed xilinx_dma_is_r
Add channel idle state to ensure that dma descriptor is not
submitted when VDMA engine is in progress.
Signed-off-by: Kedareswara rao Appana
---
drivers/dma/xilinx/xilinx_dma.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx
This patch series fixes below bugs in DMA and VDMA IP's
---> Do not start VDMA until frame buffer is processed by the h/w
---> Fix bug in Multi frame sotres handling in VDMA
---> Fix issues w.r.to multi frame descriptors submit with AXI DMA S2MM(recv)
Side.
Kedareswara
creating a BD Chain during
channel allocation itself and use those BD's.
Signed-off-by: Kedareswara rao Appana
---
drivers/dma/xilinx/xilinx_dma.c | 133 +---
1 file changed, 83 insertions(+), 50 deletions(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/dr
of frames at one time as the h/w
Is configured for n number of frames.
This patch fixes this issue.
Signed-off-by: Kedareswara rao Appana
---
drivers/dma/xilinx/xilinx_dma.c | 43 +
1 file changed, 26 insertions(+), 17 deletions(-)
diff --git a/drivers
This patch fixes the below race conditions in the driver.
---> Fix Opps after unload the driver as a module
---> Use spin locks where relevant.
---> Take reference on the external phy to prevent issues
when phy driver is unloaded.
Reported-by: Andrew Lunn
Signed-off-by: Kedareswara r
This patch adds the necessary error checks in the driver.
Reported-by: Andrew Lunn
Signed-off-by: Kedareswara rao Appana
---
drivers/net/phy/xilinx_gmii2rgmii.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c
b/drivers
For implementing this driver most of the inputs is
provided by Andrew Lunn.
Updating the driver with Andrew Copy right.
Signed-off-by: Kedareswara rao Appana
---
drivers/net/phy/xilinx_gmii2rgmii.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c
b
This patch adds support for the 'phy-handle' binding which allows for a
system to specifically select a phy which can be attached via any MDIO
bus available in the system.
Signed-off-by: Kedareswara rao Appana
---
Documentation/devicetree/bindings/net/macb.txt | 3 +++
drivers/ne
Device-tree binding documentation for xilinx gmiitorgmii converter.
Signed-off-by: Kedareswara rao Appana
---
Changes for v6:
---> Removed mdio description as suggested by Florian.
Changes for v5:
---> Fixed Indentation in the example as suggested by Michal.
Changes for v4:
-->
This patch adds mask for the Control register
10Mbps speed.
Reviewed-by: Florian Fainelli
Signed-off-by: Kedareswara rao Appana
---
Changes for v6:
- None.
Changes for v5:
- New patch.
include/uapi/linux/mii.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/mii.h b
al phy negotiated speed.
This patch series does the below
---> Add mask for Control register 10Mbps speed.
---> Add support for xilinx gmiitorgmii converter.
Kedareswara rao Appana (3):
net: Add mask for Control register 10Mbps speed
Documentation: DT: net: Add Xilinx gmiitorgm
Operation by configuring the converter register through mdio write.
MDIO interface is used to set operating speed of Ethernet MAC.
This converter sits between the MAC and the external phy
MAC <==> GMII2RGMII <==> RGMII_PHY
Signed-off-by: Kedareswara rao Appana
---
Thanks a lot And
Operation by configuring the converter register through mdio write.
MDIO interface is used to set operating speed of Ethernet MAC.
This converter sits between the MAC and the external phy
MAC <==> GMII2RGMII <==> RGMII_PHY
Signed-off-by: Kedareswara rao Appana
---
Thanks a lot And
al phy negotiated speed.
This patch series does the below
---> Add mask for Control register 10Mbps speed.
---> Add support for xilinx gmiitorgmii converter.
Kedareswara rao Appana (3):
net: Add mask for Control register 10Mbps speed
Documentation: DT: net: Add Xilinx gmiitorgm
This patch adds mask for the Control register
10Mbps speed.
Signed-off-by: Kedareswara rao Appana
---
Changes for v5:
---> New patch as suggested by Punnaiah.
include/uapi/linux/mii.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/mii.h b/include/uapi/linux/mii.h
in
Device-tree binding documentation for xilinx gmiitorgmii converter.
Signed-off-by: Kedareswara rao Appana
---
Changes for v5:
---> Fixed Indentation in the example as suggested by Michal.
Changes for v4:
--> Modified compatible as suggested by Rob.
--> Removed underscores from the conve
Operation by configuring the converter register through mdio write.
MDIO interface is used to set operating speed of Ethernet MAC.
Signed-off-by: Kedareswara rao Appana
---
Thanks a lot Andrew for your inputs.
Changes for v4:
--> Updated phydev speed for all 3 speeds as suggested by zhuyj.
Chan
Device-tree binding documentation for xilinx gmiitorgmii converter.
Signed-off-by: Kedareswara rao Appana
---
Changes for v4:
--> Modified compatible as suggested by Rob.
--> Removed underscores from the converter node name as suggested by Rob.
Changes for v3:
--> None.
Changes for v2
Device-tree binding documentation for xilinx gmiitorgmii converter.
Signed-off-by: Kedareswara rao Appana
---
Changes for v3:
--> None.
Changes for v2:
--> New patch.
.../devicetree/bindings/net/xilinx_gmii2rgmii.txt | 32 ++
1 file changed, 32 insertions(+)
creat
Operation by configuring the converter register through mdio write.
MDIO interface is used to set operating speed of Ethernet MAC.
Signed-off-by: Kedareswara rao Appana
---
Thanks a lot Andrew for your inputs.
Changes for v3:
--> Updated the driver as suggested by Andrew.
Changes for v2:
-->
This patch fixes the below static checker warning
drivers/dma/xilinx/zynqmp_dma.c:973 zynqmp_dma_chan_probe()
warn: was && intended here instead of ||?
Reported-by: Dan Carpenter
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
---> Return EINVAL instead of err as s
This patch fixes the below static checker warning
drivers/dma/xilinx/zynqmp_dma.c:973 zynqmp_dma_chan_probe()
warn: was && intended here instead of ||?
Reported-by: Dan Carpenter
Signed-off-by: Kedareswara rao Appana
---
drivers/dma/xilinx/zynqmp_dma.c |9 +++--
1 files
In cyclic DMA mode need to link the tail bd segment
with the head bd segment to process bd's in cyclic.
Current driver is doing this only for tx channel
needs to update the same for rx channel case also.
This patch fixes the same.
Signed-off-by: Kedareswara rao Appana
---
drivers/dma/x
different speed modes of
Operation by configuring the converter register through mdio write.
MDIO interface is used to set operating speed of Ethernet MAC.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
---> Moved header file define xilinx_gmii2rgmii.h to macb.c file
as suggested by
This patch updates the macb device-tree binding doc for adding
Support for gmiitorgmii converter support.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> New patch.
Documentation/devicetree/bindings/net/macb.txt | 4
1 file changed, 4 insertions(+)
diff --gi
Operation by configuring the converter register through mdio write.
MDIO interface is used to set operating speed of Ethernet MAC.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> Passed struct xphy pointer directly to the fix_mac_speed
API as suggested by the Florian.
--> Added
MAC MDIO bus we can access both the converter and the external PHY.
We need to program the line speed of the converter during run time based
On the external phy negotiated speed.
Kedareswara rao Appana (4):
Documentation: DT: net: Add Xilinx gmiitorgmii converter device tree
binding docume
Device-tree binding documentation for xilinx gmiitorgmii converter.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> New patch.
.../devicetree/bindings/net/xilinx_gmii2rgmii.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644 Documentat
Added the driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. This dma controller supports memory to memory
and I/O to I/O buffer transfers.
Signed-off-by: Kedareswara rao Appana
---
Changes for v12:
- Removed zynqmp_dma_config structure as suggested by vinod.
- For slave usages using
Device-tree binding documentation for Xilinx zynqmp dma engine
used in Zynq UltraScale+ MPSoC.
Acked-by: Rob Herring
Signed-off-by: Punnaiah Choudary Kalluri
Signed-off-by: Kedareswara rao Appana
---
Changes in v12:
- None.
Changes in v11:
- None.
Changes in v10:
- Added Rob Acked-by in the
Operation.
MDIO interface is used to set operating speed of Ethernet MAC
Signed-off-by: Kedareswara rao Appana
---
drivers/net/ethernet/xilinx/Kconfig |7 ++
drivers/net/ethernet/xilinx/Makefile|1 +
drivers/net/ethernet/xilinx/xilinx_gmii2rgmii.c | 76
This patch adds support for gmii2rgmii phy converter
in the macb driver.
Signed-off-by: Kedareswara rao Appana
---
drivers/net/ethernet/cadence/macb.c | 21 -
drivers/net/ethernet/cadence/macb.h |3 +++
2 files changed, 23 insertions(+), 1 deletions(-)
diff --git a
fixes this issue.
Kedareswara rao Appana (2):
net: ethernet: xilinx: Add gmii2rgmii converter support
net: macb: Add gmii2rgmii phy converter support
drivers/net/ethernet/cadence/macb.c | 21 ++-
drivers/net/ethernet/cadence/macb.h |3 +
drivers/net/et
odes.
Signed-off-by: Kedareswara rao Appana
---
Chanes for v2:
---> New patch.
.../devicetree/bindings/dma/xilinx/xilinx_dma.txt |6 +-
drivers/dma/xilinx/xilinx_dma.c|8 ++--
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicet
In the existing vdma driver support for
AXI DMA and CDMA got added so the driver is no
longer VDMA specific.
This patch renames the driver and DT binding doc to xilinx_dma
and updates the Kconfig description for all the DMAS.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
---> N
This patch series does the following thing.
---> Add support for AXI DMA Multi-channel DMA mode.
---> Delete AXI DMA binding doc.
---> Rename the driver and update config options.
Kedareswara rao Appana (5):
Documentation: DT: vdma: Update binding doc for multi-channel dma
mode
This patch updates the device-tree binding doc for
AXI DMA multi channel dma mode.
Acked-by: Rob Herring
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
---> Added Rob Acked-by.
.../devicetree/bindings/dma/xilinx/xilinx_vdma.txt |4
1 files changed, 4 insertions(+)
This patch adds support for AXI DMA multi-channel dma mode
Multichannel mode enables DMA to connect to multiple masters
and slaves on the streaming side.
In Multichannel mode AXI DMA supports 2D transfers.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
---> Removed mcdma_config
The AXI DMA support is added to the existing AXI VDMA
driver. Device tree binding information also updated
in the VDMA binding doc.
Acked-by: Rob Herring
Signed-off-by: Kedareswara rao Appana
---
--> Added Rob Acked-by.
.../devicetree/bindings/dma/xilinx/xilinx_dma.txt |
speed modes of operation (10/100/1000 Mb/s).
MDIO interface is used to set operating speed of Ethernet MAC.
Signed-off-by: Kedareswara rao Appana
---
--> Tried to include this Coverter support in the
PHY layer but it won't fit into the PHY framework as the
coverter won't have vaild
This patch adds support for AXI DMA multi-channel dma mode
Multichannel mode enables DMA to connect to multiple masters
And slaves on the streaming side.
In Multichannel mode AXI DMA supports 2D transfers.
Signed-off-by: Kedareswara rao Appana
---
drivers/dma/xilinx/xilinx_vdma.c | 242
This patch updates the device-tree binding doc for
AXI DMA multi channel dma mode.
Signed-off-by: Kedareswara rao Appana
---
.../devicetree/bindings/dma/xilinx/xilinx_vdma.txt |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma
The AXI DMA support is added to the existing AXI VDMA
driver. Device tree binding information also updated
in the VDMA binding doc.
Signed-off-by: Kedareswara rao Appana
---
.../devicetree/bindings/dma/xilinx/xilinx_dma.txt | 65
1 files changed, 0 insertions(+), 65
driver support".
Kedareswara rao Appana (4):
Documentation: DT: vdma: Update binding doc for multi-channel dma
mode
dmaengine: vdma: Add support for mulit-channel dma mode
Documentation: DT: dma: Delete binding doc for AXI DMA
dmaengine: dma: Rename driver and config
.../devicetree/
In the existing vdma driver support for
AXI DMA and CDMA got added so the driver is no
longer VDMA specific.
This patch renames the driver and DT binding doc to xilinx_dma
and updates the Kconfig description for all the DMAS.
Signed-off-by: Kedareswara rao Appana
---
.../dma/xilinx
This patch updates the dmatest client to
Support scatter-gather dma mode.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
- Rename sg_resources to sg_buffers as suggested Vinod.
- Fixed coding style issues like spacing issues as suggested by Vinod.
drivers/dma/dmatest.c | 43
Device-tree binding documentation for Xilinx zynqmp dma engine
used in Zynq UltraScale+ MPSoC.
Acked-by: Rob Herring
Signed-off-by: Punnaiah Choudary Kalluri
Signed-off-by: Kedareswara rao Appana
---
Changes in v11:
- None.
Changes in v10:
- Added Rob Acked-by in the commit message.
Changs in
Added the driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. This dma controller supports memory to memory
and I/O to I/O buffer transfers.
Signed-off-by: Punnaiah Choudary Kalluri
Signed-off-by: Kedareswara rao Appana
---
Changes for v11:
- Fixed Kconfig/Make file order as suggested
ol |= XILINX_DMA_BD_SOP;
The start of packet (SOP) should be set to the first segment in the desc
chain not for the last segment of the desc chain.
Signed-off-by: Kedareswara rao Appana
---
drivers/dma/xilinx/xilinx_vdma.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --g
address.
So we need to program two registers at a time.
This patch adds the 64 bit addressing support for the axidma
IP in the driver.
Signed-off-by: Kedareswara rao Appana
---
Changes for v3:
--> Removed repeated code and used wrappers as suggested by vinod.
Changes for v2:
--> New
program two registers at a time.
This patch adds the 64 bit addressing support to the axicdma
IP in the driver.
Signed-off-by: Kedareswara rao Appana
---
Changes for v3:
--> Removed repeated code and used wrappers as suggested by vinod.
Changes for v2:
--> New patch.
drivers/dma/
Device-tree binding documentation for Xilinx zynqmp dma engine
used in Zynq UltraScale+ MPSoC.
Acked-by: Rob Herring
Signed-off-by: Punnaiah Choudary Kalluri
Signed-off-by: Kedareswara rao Appana
---
Changes in v10:
- Added Rob Acked-by in the commit message.
Changs in v9:
- Removed include sg
Added the driver for zynqmp dma engine used in Zynq
UltraScale+ MPSoC. This dma controller supports memory to memory
and memory to I/O buffer transfers.
Signed-off-by: Punnaiah Choudary Kalluri
Signed-off-by: Kedareswara rao Appana
---
Changes for v10:
- Use 64bit write for 64-bit platforms as
address.
So we need to program two registers at a time.
This patch adds the 64 bit addressing support for the axidma
IP in the driver.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> New patch.
drivers/dma/xilinx/xilinx_vdma.c | 79 ++--
1 f
program two registers at a time.
This patch adds the 64 bit addressing support to the axicdma
IP in the driver.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> New patch.
drivers/dma/xilinx/xilinx_vdma.c | 44 +---
1 file changed, 32 inserti
This patch series does the following
---> Add support for cyclic DMA mode for the AXI DMA IP.
---> use dma_poll_zalloc instead of dma_pool_alloc.
---> Add 64-bit addressing support for AXI DMA IP.
---> Add 64-bit addressing support for AXI CDMA IP.
Kedareswara rao Appana (4):
dma
dma_pool_zalloc combines dma_pool_alloc and memset 0
this patch updates the driver to use dma_pool_zalloc.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> New patch.
drivers/dma/xilinx/xilinx_vdma.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/driv
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