Add the QPIC BAM and QPIC NAND controller support and
enable the same in board DTS file.
Co-developed-by: Anusha Canchi Ramachandra Rao
Signed-off-by: Anusha Canchi Ramachandra Rao
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 16
arch/arm64/boot/dts
ings patch as they are already picked in
MTD tree
Kathiravan T (1):
arm64: dts: ipq6018: Add the QPIC peripheral nodes
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 16
arch/arm64/boot/dts/qcom/ipq6018.dtsi| 41
2 files
MTD and dt-bindings patch as they are already picked in
MTD tree
Kathiravan T (1):
arm64: dts: ipq6018: Add the QPIC peripheral nodes
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 16
arch/arm64/boot/dts/qcom/ipq6018.dtsi| 41
2 files changed, 57 inserti
Add the QPIC BAM and QPIC NAND controller support and
enable the same in board DTS file.
Co-developed-by: Anusha Canchi Ramachandra Rao
Signed-off-by: Anusha Canchi Ramachandra Rao
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 16
arch/arm64/boot/dts
On 11/2/2020 10:33 AM, Guenter Roeck wrote:
On 11/1/20 7:58 PM, Kathiravan T wrote:
On 10/31/2020 7:38 PM, Guenter Roeck wrote:
On 10/31/20 5:11 AM, Robert Marko wrote:
If the watchdog hardware is enabled/running during boot, e.g.
due to a boot loader configuring it, we must tell the
On 10/31/2020 7:38 PM, Guenter Roeck wrote:
On 10/31/20 5:11 AM, Robert Marko wrote:
If the watchdog hardware is enabled/running during boot, e.g.
due to a boot loader configuring it, we must tell the
watchdog framework about this fact so that it can ping the
watchdog until userspace opens the
Bjorn,
Wondering if this patch was overlooked due to some reason or should I
send V2 based on v5.10-rc1?
Thanks,
Kathiravan T.
On 10/8/2020 9:59 PM, Kathiravan T wrote:
Bjorn,
Any comments on this? I would like to know if there is any chances of
taking this patch for v5.10 merge window
)
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 1aa8d8579463..ee7acddcbdfa 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.
IPQ6018 has the QPIC NAND controller of version 1.5.0, which
uses the BAM DMA. Add support for the QPIC BAM, QPIC NAND and
enable the same in the board DTS file.
Kathiravan T (3):
dt-bindings: qcom_nandc: IPQ6018 QPIC NAND documentation
mtd: rawnand: qcom: Support for IPQ6018 QPIC NAND
Add the compatible string for IPQ6018 QPIC NAND controller
version 1.5.0. It's properties are same as IPQ8074, so reuse
the same.
Signed-off-by: Kathiravan T
---
drivers/mtd/nand/raw/qcom_nandc.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/nand/raw/qcom_nandc
Add the binding for the QPIC NAND used on IPQ6018 SoC.
Signed-off-by: Kathiravan T
---
Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
b/Documentation/devicetree/bindings/mtd
Add the QPIC BAM and QPIC NAND controller support and
enable the same in board DTS file.
Co-developed-by: Anusha Canchi Ramachandra Rao
Signed-off-by: Anusha Canchi Ramachandra Rao
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 16
arch/arm64/boot/dts
Bjorn,
Any comments on this? I would like to know if there is any chances of
taking this patch for v5.10 merge window?
Thanks,
Kathiravan T.
On 9/17/2020 7:26 PM, Kathiravan T wrote:
Lets enable the APSS clock driver for the DVFS support.
Signed-off-by: Kathiravan T
---
arch/arm64
Lets enable the APSS clock driver for the DVFS support.
Signed-off-by: Kathiravan T
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6d04b9577b0b..67244560f869 100644
--- a/arch/arm64/configs
Enable watchdog support for the IPQ8074 SoCs.
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 96a5ec89b5f0..74a474300314 100644
Bjorn,
Can you help to share your comments on this series?
Thanks,
Kathiravan T.
On 8/17/2020 12:48 PM, Kathiravan T wrote:
Add A53 PLL, APCS clock, RPM Glink, RPM message RAM, cpu-opp-table,
SMPA2 regulator to enable the cpu frequency on IPQ6018.
[v2]
- Rebased on v5.9-rc1
9-rc1
Kathiravan T (2):
dt-bindings: mailbox: add compatible for the IPQ6018 SoC
arm64: dts: ipq6018: enable DVFS support
.../bindings/mailbox/qcom,apcs-kpss-global.yaml| 1 +
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 96 +-
2 files changed, 94 insertions(
Add the mailbox compatible for the IPQ6018 SoC.
Acked-by: Rob Herring
Signed-off-by: Kathiravan T
---
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
Add A53 PLL, APCS clock, RPM Glink, RPM message RAM, cpu-opp-table,
SMPA2 regulator to enable the cpu frequency on IPQ6018.
Co-developed-by: Sivaprakash Murugesan
Signed-off-by: Sivaprakash Murugesan
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 96
Add the SoC ID for IPQ6018 variant.
Signed-off-by: Kathiravan T
---
[V2]:
- Rebased on v5.9-rc1
drivers/soc/qcom/socinfo.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c
index e19102f46302..2b28667e1c66 100644
--- a/drivers
IPQ8074 has A53 cores, so lets use the corresponding PMU compatible.
Signed-off-by: Kathiravan T
---
[V2]
- Rebased on v5.9-rc1
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
b/arch/arm64
IPQ8074 has A53 cores, so lets use the corresponding PMU compatible.
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index
Add the mailbox compatible for the IPQ6018 SoC.
Signed-off-by: Kathiravan T
---
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
b/Documentation
Add A53 PLL, APCS clock, RPM Glink, RPM message RAM, cpu-opp-table,
SMPA2 regulator to enable the cpu frequency on IPQ6018.
Kathiravan T (3):
dt-bindings: mailbox: add compatible for the IPQ6018 SoC
dt-bindings: regulator: add the sub node names for the MP5496 PMIC
arm64: dts: ipq6018
Add A53 PLL, APCS clock, RPM Glink, RPM message RAM, cpu-opp-table,
SMPA2 regulator to enable the cpu frequency on IPQ6018.
Co-developed-by: Sivaprakash Murugesan
Signed-off-by: Sivaprakash Murugesan
Signed-off-by: Kathiravan T
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 96
MP5496 PMIC is found on IPQ6018 SoC. SMPA2 regulator controls the APSS
voltage scaling. Document the sub node name for the same.
Signed-off-by: Kathiravan T
---
Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a
Add the SoC ID for IPQ6018 variant.
Signed-off-by: Kathiravan T
---
drivers/soc/qcom/socinfo.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c
index d9c64a78e49c..b7972bdff027 100644
--- a/drivers/soc/qcom/socinfo.c
+++ b/drivers/soc
This patch adds a compatible for the rpm on the Qualcomm IPQ6018 platform.
Signed-off-by: Kathiravan T
---
drivers/soc/qcom/smd-rpm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c
index 877b138..0ebd3ad 100644
--- a/drivers/soc/qcom
Convert qcom,smd-rpm-regulator.txt document to YAML schema
Reviewed-by: Rob Herring
Signed-off-by: Kathiravan T
---
.../bindings/regulator/qcom,smd-rpm-regulator.txt | 321 -
.../bindings/regulator/qcom,smd-rpm-regulator.yaml | 106 +++
2 files changed, 106 insertions
Convert the qcom,smd-rpm.txt document to YAML schema
Signed-off-by: Kathiravan T
---
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 65
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 87 ++
2 files changed, 87 insertions(+), 65 deletions
This patch adds the dt-binding for the rpm on the Qualcomm IPQ6018
platform.
Signed-off-by: Kathiravan T
---
Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
b
ode in qcom,smd-rpm.yaml
- Picked up the Reviewed-by tag for qcom,smd-rpm-regulator.yaml
- Regulator patches part of V2 was picked up by Mark and it's available
in linux-next tree
changes since V1:
- Moved YAML conversion to the last as per Mark's comments
Kathir
Hi Bjorn, Can you help to review the below patches in this series?
dt-bindings: soc: qcom: Add IPQ6018 compatible
soc: qcom: smd-rpm: Add IPQ6018 compatible
Hi Rob, Can you help to review the YAML schema in this series?
Thanks,
Kathiravan T.
On 6/23/2020 10:47 AM, Kathiravan T wrote
Hi Bjorn,
On 7/7/2020 10:44 AM, Bjorn Andersson wrote:
On Mon 06 Jul 21:58 PDT 2020, Kathiravan T wrote:
set target proc as APPS to route the gpio interrupts to APPS
Signed-off-by: Rajkumar Ayyasamy
Signed-off-by: Kathiravan T
This says "first Rajkumar certified the patch's or
set target proc as APPS to route the gpio interrupts to APPS
Co-developed-by: Rajkumar Ayyasamy
Signed-off-by: Rajkumar Ayyasamy
Signed-off-by: Kathiravan T
---
drivers/pinctrl/qcom/pinctrl-ipq8074.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq8074.c
b
set target proc as APPS to route the gpio interrupts to APPS
Signed-off-by: Rajkumar Ayyasamy
Signed-off-by: Kathiravan T
---
drivers/pinctrl/qcom/pinctrl-ipq8074.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq8074.c
b/drivers/pinctrl/qcom/pinctrl
IPQ6018 uses the PMIC MP5496. Add the binding for the same.
Signed-off-by: Kathiravan T
---
Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt
b
Convert qcom,smd-rpm-regulator.txt document to YAML schema
Signed-off-by: Kathiravan T
---
.../bindings/regulator/qcom,smd-rpm-regulator.txt | 321 -
.../bindings/regulator/qcom,smd-rpm-regulator.yaml | 106 +++
2 files changed, 106 insertions(+), 321 deletions
IPQ6018 SoC uses the PMIC MP5496. SMPA2 and LDOA2 regulator controls the
APSS and SDCC voltage scaling respectively. Add support for the same.
Signed-off-by: Kathiravan T
---
drivers/regulator/qcom_smd-regulator.c | 34 ++
1 file changed, 34 insertions(+)
diff
Convert the qcom,smd-rpm.txt document to YAML schema
Signed-off-by: Kathiravan T
---
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 63 ---
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 92 ++
2 files changed, 92 insertions(+), 63 deletions
This patch adds the dt-binding for the rpm on the Qualcomm IPQ6018
platform.
Signed-off-by: Kathiravan T
---
Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
b
This patch adds a compatible for the rpm on the Qualcomm IPQ6018 platform.
Signed-off-by: Kathiravan T
---
drivers/soc/qcom/smd-rpm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c
index 005dd30..1a5226a 100644
--- a/drivers/soc/qcom
IPQ6018 SoC uses the PMIC MP5496. SMPA2 and LDOA2 regulator of MP5496
controls the APSS and SDCC voltage scaling respectively. Add support
for the same.
changes since V1:
- Moved YAML conversion to the last as per Mark's comments
Kathiravan T (6):
dt-bindings: soc: qcom: Add IP
Add the YAML schema for the devicetree properties used in the QCOM
SMD-RPM driver.
Signed-off-by: Kathiravan T
---
.../bindings/regulator/qcom,smd-rpm-regulator.txt | 320 -
.../bindings/regulator/qcom,smd-rpm-regulator.yaml | 105 +++
2 files changed, 105 insertions
IPQ6018 uses the PMIC MP5496. Add the binding for the same.
Signed-off-by: Kathiravan T
---
Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml
b
IPQ6018 SoC uses the PMIC MP5496. SMPA2 and LDOA2 regulator controls the
APSS and SDCC voltage scaling respectively. Add support for the same.
Signed-off-by: Kathiravan T
---
drivers/regulator/qcom_smd-regulator.c | 34 ++
1 file changed, 34 insertions(+)
diff
This patch adds the dt-binding for the rpm on the Qualcomm IPQ6018
platform.
Signed-off-by: Kathiravan T
---
Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml
b
IPQ6018 SoC uses the PMIC MP5496. SMPA2 and LDOA2 regulator of MP5496
controls the APSS and SDCC voltage scaling respectively. Add support
for the same.
Kathiravan T (6):
dt-bindings: soc: qcom: add YAML schema for SMD-RPM driver
dt-bindings: soc: qcom: Add IPQ6018 compatible
soc: qcom: smd
This patch adds a compatible for the rpm on the Qualcomm IPQ6018 platform.
Signed-off-by: Kathiravan T
---
drivers/soc/qcom/smd-rpm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c
index 005dd30..1a5226a 100644
--- a/drivers/soc/qcom
Add YAML schema for the devitree properties used in the SMD-RPM driver.
Signed-off-by: Kathiravan T
---
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt | 62 ---
.../devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 91 ++
2 files changed, 91 insertions(+), 62
When more than one coresight components uses the obsolete DT bindings,
warning is displayed for only one component and not for the others.
Lets warn it for all components by replacing dev_warn_once with dev_warn.
Signed-off-by: Kathiravan T
---
drivers/hwtracing/coresight/coresight-platform.c
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