cumentation/devicetree/bindings/crypto/samsung-slimsss.yaml
> @@ -19,7 +19,7 @@ description: |+
> properties:
>compatible:
> items:
> - - const: samsung,exynos5433-slim-ss
> + - const: samsung,exynos5433-slim-sss
>
> reg:
> maxItems: 1
>
Reviewed-by: Kamil Konieczny
Acked-by: Kamil Konieczny
struct s5p_hash_reqctx {
> struct s5p_aes_dev *dd;
> @@ -1125,7 +1126,7 @@ static int s5p_hash_copy_sg_lists(struct
> s5p_hash_reqctx *ctx,
> * s5p_hash_prepare_sgs() - prepare sg for processing
> * @ctx: request context
> * @sg: source scatterlist request
> - * @nbytes: number of bytes to process from sg
> + * @new_len: number of bytes to process from sg
> * @final: final flag
> *
> * Check two conditions: (1) if buffers in sg have len aligned data, and (2)
>
Reviewed-by: Kamil Konieczny
Acked-by: Kamil Konieczny
= dev_err_probe(dev, PTR_ERR(pdata->pclk),
> + "failed to find clock %s\n",
> + variant->clk_names[1]);
> goto err_clk;
> }
>
>
Reviewed-by: Kamil Konieczny
Acked-by: Kamil Konieczny
tions(+), 4 deletions(-)
>
> diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
> index 341433fbcc4a..fdcbfd45c884 100644
> --- a/drivers/crypto/s5p-sss.c
> +++ b/drivers/crypto/s5p-sss.c
> @@ -2307,8 +2307,7 @@ static int s5p_aes_probe(struct platform_device *pdev)
> [...]
Acked-by: Kamil Konieczny
On 25.06.2020 14:02, Lukasz Luba wrote:
>
>
> On 6/25/20 12:30 PM, Kamil Konieczny wrote:
>> Hi Lukasz,
>>
>> On 25.06.2020 12:02, Lukasz Luba wrote:
>>> Hi Sylwester,
>>>
>>> On 6/24/20 4:11 PM, Sylwester Nawrocki wrote:
>>>> Hi
rflow threshold to value i.e. 1000 and we know that at 1000MHz
> and full utilization (100%) the counter will reach that threshold
> after 500ms (which we want, because we don't want too many interrupts
> per sec). What if suddenly utilization drops to 2% (i.e. from 5GB/s
>
frequency. They both are
> done by the governor but the workqueue must be scheduled periodically.
>
> I couldn't do much with this back then. I have given the example that
> this is causing issues with the DMC [2]. There is also a description
> of your situation staying at 633MHz for long time:
> ' When it is missing opportunity
> to change the frequency, it can either harm the performance or power
> consumption, depending of the frequency the device stuck on.'
>
> The patches were not accepted because it will cause CPU wake-up from
> idle, which increases the energy consumption. I know that there were
> some other attempts, but I don't know the status.
>
> I had also this devfreq workqueue issue when I have been working on
> thermal cooling for devfreq. The device status was not updated, because
> the devfreq workqueue didn't check the device [3].
>
> Let me investigate if that is the case.
>
> Regards,
> Lukasz
>
> [1] https%3A%2F%2Flkml.org%2Flkml%2F2019%2F2%2F11%2F1146
> [2] https%3A%2F%2Flkml.org%2Flkml%2F2019%2F2%2F12%2F383
> [3]
> https%3A%2F%2Flwn.net%2Fml%2Flinux-kernel%2F2020051912.3001-11-lukasz.luba%40arm.com%2F
and here was another try to fix wq: "PM / devfreq: add possibility for delayed
work"
https://lkml.org/lkml/2019/12/9/486
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
g.read = iproc_rng200_read,
> priv->rng.init = iproc_rng200_init,
> priv->rng.cleanup = iproc_rng200_cleanup,
> + priv->rng.quality = 1000,
>
> /* Register driver */
> ret = devm_hwrng_register(dev, &priv->rng);
>
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
TCH v1 00/50] Exynos5x clocks and buses changes" but it should first
be made in u-boot.
I have idea for a fix and will send it soon after weekend.
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
Dear MyungJoo,
On 08.08.2019 11:02, Kamil Konieczny wrote:
> Hi,
>
> The main purpose of this patch series is to add coupled regulators for
> Exynos5422/5800 to keep constrain on voltage difference between vdd_arm
> and vdd_int to be at most 300mV. In exynos-bus i
so remove
exynos_bus_passive_target(). In exynos_bus_probe() replace it with
exynos_bus_target.
Signed-off-by: Kamil Konieczny
Acked-by: Chanwoo Choi
---
Changes:
v5:
- squashed last patch into this one, as suggested by Chanwoo Choi
v4:
- remove unrelated changes, add newline before comment
---
drive
.
Signed-off-by: Kamil Konieczny
Acked-by: Chanwoo Choi
---
Changes:
v5:
- added Acked-by tag
v4:
- move regulator disable after clock disable
- remove unrelated changes
- add disabling regulators in error path in exynos_bus_probe()
---
drivers/devfreq/exynos-bus.c | 31
From: Marek Szyprowski
Declare Exynos5422/5800 voltage ranges for opp points for big cpu core and
bus wcore and couple their voltage supllies as vdd_arm and vdd_int should
be in 300mV range.
Signed-off-by: Marek Szyprowski
[k.konieczny: add missing patch description]
Signed-off-by: Kamil
Remove unused DT property "exynos,voltage-tolerance".
Signed-off-by: Kamil Konieczny
Acked-by: Chanwoo Choi
---
Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 2 --
1 file changed, 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/devfreq/exynos-
over letter as there is new patch
- added note before Signed-off-by in 4th patch
v2:
- improve regulators enable/disable code in opp/core as suggested by
Viresh Kumar
- add new patch for remove unused dt-bindings as suggested by Krzysztof
Kozlowski
Kamil Konieczny (3):
devfreq: exynos-bus: cor
68219f71a61e7c412717c1adba4f5
> parent57d85421038b458dd87ec268404ff608f90c36ae (diff)
> download linux-4304f4ecec93cebd255463d56b0a4f112ee9dc50.tar.gz
>
> Regards,
> Chanwoo Choi
>
> On 19. 8. 7. 오후 10:38, k.koniec...@partner.samsung.com wrote:
>> [...]
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
Hi,
On 25.07.2019 16:53, Chanwoo Choi wrote:
> 2019년 7월 25일 (목) 오후 11:19, Kamil Konieczny
> 님이 작성:
>>
>> Hi Chanwoo,
>>
>> On 25.07.2019 12:17, Chanwoo Choi wrote:
>>> Hi Kamil,
>>>
>>> Looks good to me. But, I have some comment. Please c
/w hang. This
>> require change in exynos_bus_probe() to move exynos_bus_parse_of()
>> after exynos_bus_parent_parse_of() and change in error handling.
>> Similar change is needed in exynos_bus_exit() where clock should be
>> disabled before regulators.
>>
>> Signed-
() with fixed
>> tolerance. This patch also removes no longer needed parsing of DT
>> property "exynos,voltage-tolerance" (no Exynos devfreq DT node uses
>> it).
>>
>> Signed-off-by: Kamil Konieczny
>> ---
>> drivers/devfreq/exynos-bus.c | 143 +++
On 16.07.2019 12:05, Viresh Kumar wrote:
> On 15-07-19, 14:04, Kamil Konieczny wrote:
>> Add enable regulators to dev_pm_opp_set_regulators() and disable
>> regulators to dev_pm_opp_put_regulators(). This prepares for
>> converting exynos-bus devfreq driver to us
On 16.07.2019 06:03, Chanwoo Choi wrote:
> Hi Kamil,
>
> On 19. 7. 15. 오후 9:04, Kamil Konieczny wrote:
>> Add enable regulators to dev_pm_opp_set_regulators() and disable
>> regulators to dev_pm_opp_put_regulators(). This prepares for
>> converting exyno
regulator_set_voltage_tol() with fixed
tolerance. This patch also removes no longer needed parsing of DT
property "exynos,voltage-tolerance" (no Exynos devfreq DT node uses
it).
Signed-off-by: Kamil Konieczny
---
drivers/devfreq/exynos-bus.c | 172 ++-
1 file c
Declare Exynos5422/5800 voltage ranges for opp points for big cpu core and
bus wcore and couple their voltage supllies as vdd_arm and vdd_int should
be in 300mV range.
Signed-off-by: Marek Szyprowski
Signed-off-by: Kamil Konieczny
---
arch/arm/boot/dts/exynos5420.dtsi | 34
Remove unused DT property "exynos,voltage-tolerance".
Signed-off-by: Kamil Konieczny
---
Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 2 --
1 file changed, 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
b/Documentation/devicetre
Add enable regulators to dev_pm_opp_set_regulators() and disable
regulators to dev_pm_opp_put_regulators(). This prepares for
converting exynos-bus devfreq driver to use dev_pm_opp_set_rate().
Signed-off-by: Kamil Konieczny
--
Changes in v2:
- move regulator enable and disable into loop
/disable code in opp/core as suggested by
Viresh Kumar
- add new patch for remove unused dt-bindings as suggested by Krzysztof
Kozlowski
Regards,
Kamil
Kamil Konieczny (3):
opp: core: add regulators enable and disable
devfreq: exynos-bus: convert to use dev_pm_opp_set_rate()
dt-bindings
On 10.07.2019 19:04, Krzysztof Kozlowski wrote:
> On Mon, 8 Jul 2019 at 16:12, wrote:
>>
>> From: Kamil Konieczny
>>
>> Reuse opp core code for setting bus clock and voltage. As a side
>> effect this allow useage of coupled regulators feature (required
>>
On 11.07.2019 08:22, Viresh Kumar wrote:
> On 08-07-19, 16:11, k.koniec...@partner.samsung.com wrote:
>> From: Kamil Konieczny
>>
>> Add enable regulators to dev_pm_opp_set_regulators() and disable
>> regulators to dev_pm_opp_put_regulators(). This prepares for
>&
On 10.07.2019 12:43, Kamil Konieczny wrote:
> On 09.07.2019 07:40, Viresh Kumar wrote:
>> On 08-07-19, 16:11, k.koniec...@partner.samsung.com wrote:
>>> From: Kamil Konieczny
>>>
>>> Add enable regulators to dev_pm_opp_set_regulators() and disable
>>
On 10.07.2019 12:14, Krzysztof Kozlowski wrote:
> On Wed, 10 Jul 2019 at 12:03, Kamil Konieczny
> wrote:
>>
>> On 10.07.2019 11:00, Krzysztof Kozlowski wrote:
>>> On Mon, 8 Jul 2019 at 16:12, wrote:
>>>>
>>>> From: Kamil Konieczny
>>>&
On 09.07.2019 07:40, Viresh Kumar wrote:
> On 08-07-19, 16:11, k.koniec...@partner.samsung.com wrote:
>> From: Kamil Konieczny
>>
>> Add enable regulators to dev_pm_opp_set_regulators() and disable
>> regulators to dev_pm_opp_put_regulators(). This prepares for
>&
On 10.07.2019 12:16, Kamil Konieczny wrote:
>
>
> On 09.07.2019 07:40, Viresh Kumar wrote:
>> On 08-07-19, 16:11, k.koniec...@partner.samsung.com wrote:
>>> From: Kamil Konieczny
>>>
>>> Add enable regulators to dev_pm_opp_set_
On 09.07.2019 07:40, Viresh Kumar wrote:
> On 08-07-19, 16:11, k.koniec...@partner.samsung.com wrote:
>> From: Kamil Konieczny
>>
>> Add enable regulators to dev_pm_opp_set_regulators() and disable
>> regulators to dev_pm_opp_put_regulators(). This prepares for
>&
On 10.07.2019 11:00, Krzysztof Kozlowski wrote:
> On Mon, 8 Jul 2019 at 16:12, wrote:
>>
>> From: Kamil Konieczny
>>
>> Hi,
>>
>> The main purpose of this patch series is to add coupled regulators for
>> Exynos5422/5800 to keep constrain on voltage di
"
(strcmp) from [] (of_property_match_string+0x58/0xd0)
...
(devm_clk_get) from [] (s5p_aes_probe+0xd4/0x4a0)
(s5p_aes_probe) from [] (platform_drv_probe+0x6c/0xa4)
Fix this by setting array clk_names size to 2.
Fixes: 0918f18c7179 ("crypto: s5p - add AES support for Exynos5433")
Reported-by: Krzysztof K
Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 50
1 file changed, 46 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto
Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
SubSystem) IP.
Signed-off-by: Kamil Konieczny
---
.../bindings/crypto/samsung-slimsss.txt | 19 +++
1 file changed, 19 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto
Add DT node for SlimSSS (aka Slim SecuritySubSystem) in Exynos5433 SoC.
The users can use compatibility "samsung,exynos5433-slim-sss".
Signed-off-by: Kamil Konieczny
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm6
n add that Exynos5433 has both slimSSS and SSS IPs.
Kamil Konieczny (3):
arm64: dts: exynos: add SlimSSS for Exynos5433
dt-bindings: crypto: document Exynos5433 SlimSSS
crypto: s5p: add AES support for Exynos5433
.../bindings/crypto/samsung-slimsss.txt | 19 +++
arch/arm64/boot/
Fix bug "s5p-sss crypto driver doesn't set next AES-CBC IV". While at this,
fix also AES-CTR mode. Tested on Odroid U3 with Eric Biggers branch
"iv-out-testing".
Signed-off-by: Kamil Konieczny
Reported-by: Eric Biggers
---
Changes since v1:
- reworded Subject and commi
Fix bug "s5p-sss crypto driver doesn't set next AES-CBC IV". This should
also fix AES-CTR mode. Tested on Odroid U3 with Eric Biggers branch
"iv-out-testing".
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 8
1 file changed, 8 insertions(+)
di
Hi,
On 30.01.2019 17:51, Rob Herring wrote:
> On Thu, Jan 24, 2019 at 04:45:20PM +0100, Kamil Konieczny wrote:
>> Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
>> SubSystem) IP.
>>
>> Reviewed-by: Krzysztof Kozlowski
>&g
f
struct samsung_aes_variant
Changes since v1:
- address Krzysztof Kozlowski review: add missing comma in struct
definition, add goto for error code path, correct indentation,
in documentation add that Exynos5433 has both slimSSS and SSS IPs.
Kamil Konieczny (3):
arm64: dts: exynos: add SlimSSS for Exyno
Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
SubSystem) IP.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Kamil Konieczny
---
.../devicetree/bindings/crypto/samsung-sss.txt | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a
Add DT node for SlimSSS (aka Slim SecuritySubSystem) in Exynos5433 SoC.
The users can use compatibility "samsung,exynos5433-slim-sss".
Signed-off-by: Kamil Konieczny
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm6
Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 50
1 file changed, 46 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto
On 24.01.2019 15:39, Krzysztof Kozlowski wrote:
> On Thu, 24 Jan 2019 at 15:34, Kamil Konieczny
> wrote:
>>
>>
>>
>> On 24.01.2019 14:37, Corentin Labbe wrote:
>>> On Wed, Jan 23, 2019 at 05:55:33PM +0100, Kamil Konieczny wrote:
>>>> Add AES cryp
On 24.01.2019 14:37, Corentin Labbe wrote:
> On Wed, Jan 23, 2019 at 05:55:33PM +0100, Kamil Konieczny wrote:
>> Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
>>
>> Signed-off-by: Kamil Konieczny
>> ---
>&g
Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
SubSystem) IP.
Signed-off-by: Kamil Konieczny
---
.../devicetree/bindings/crypto/samsung-sss.txt | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings
error code path, correct indentation,
in documentation add that Exynos5433 has both slimSSS and SSS IPs.
Kamil Konieczny (3):
arm64: dts: exynos: add SlimSSS for Exynos5433
dt-bindings: crypto: document Exynos5433 SlimSSS
crypto: s5p: add AES support for Exynos5433
.../bindings/crypto/samsung
Add DT node for SlimSSS (aka Slim SecuritySubSystem) in Exynos5433 SoC.
The users can use compatibility "samsung,exynos5433-slim-sss".
Signed-off-by: Kamil Konieczny
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm6
Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 50
1 file changed, 46 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p
On 23.01.2019 08:59, Krzysztof Kozlowski wrote:
> On Tue, 22 Jan 2019 at 16:26, Kamil Konieczny
> wrote:
>>
>> Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
>> SubSystem) IP.
>>
>> Signed-off-by: Kamil Konieczny
>> ---
Hi Krzysztof,
On 23.01.2019 08:59, Krzysztof Kozlowski wrote:
> On Tue, 22 Jan 2019 at 16:26, Kamil Konieczny
> wrote:
>>
>> Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
>> SubSystem) IP.
>>
>> Signed-off-by: Kamil Konieczny
>&
Hi Krzysztof,
On 23.01.2019 09:13, Krzysztof Kozlowski wrote:
> On Tue, 22 Jan 2019 at 16:26, Kamil Konieczny
> wrote:
>>
>> Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
>>
>> Signed-off-by: Kamil Konieczny
>> [...]
>>
Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/s5p-sss.c | 50
1 file changed, 46 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p
Add DT node for SlimSSS (aka Slim SecuritySubSystem) in Exynos5433 SoC.
The users can use compatibility "samsung,exynos5433-slim-sss".
Signed-off-by: Kamil Konieczny
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm6
Add slimSSS node to DT and crypto AES support for Exynos5433. Tested on
Exynos5433 board with crypto run-time self tests and with tcrypt with
command insmod tcrypt.ko mode=500 sec=1
Kamil Konieczny (3):
arm64: dts: exynos: add SlimSSS for Exynos5433
dt-bindings: crypto: document Exynos5433
Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
SubSystem) IP.
Signed-off-by: Kamil Konieczny
---
.../devicetree/bindings/crypto/samsung-sss.txt | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings
Add imem clocks for exynos5433. This will enable to use crypto Slim
Security SubSystem (in short SlimSSS) IP block.
Acked-by: Chanwoo Choi
Signed-off-by: Kamil Konieczny
---
drivers/clk/samsung/clk-exynos5433.c | 32
1 file changed, 32 insertions(+)
diff --git a
Add imem clocks for exynos5433. This will enable to use crypto Slim
Security SubSystem (in short SlimSSS) IP block.
Signed-off-by: Kamil Konieczny
---
drivers/clk/samsung/clk-exynos5433.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/clk/samsung/clk
Add imem clocks for exynos5433. This will enable to use crypto Security
SubSystem (in short SSS) and SlimSSS IP blocks.
Signed-off-by: Kamil Konieczny
---
drivers/clk/samsung/clk-exynos5433.c | 193 +
include/dt-bindings/clock/exynos5433.h | 55 +++
2 files
Add imem clock for exynos5433. This will enable to use crypto Security
SubSystem (in short SSS) and SlimSSS IP blocks.
Signed-off-by: Kamil Konieczny
---
drivers/clk/samsung/clk-exynos5433.c | 189 +
include/dt-bindings/clock/exynos5433.h | 55 +++
2 files changed
Hi,
Thank you for your review, see below for answers and questions.
On 21.11.2018 13:39, Chanwoo Choi wrote:
> Hi,
>
> On 2018년 11월 21일 21:05, Kamil Konieczny wrote:
>> Add imem clock for exynos5433.
>
> It is diffcult to understand the meaning of 'imem' withou
Hi,
> On 2018년 11월 21일 21:05, Kamil Konieczny wrote:
>> Add imem clock for exynos5433.
>
> It is diffcult to understand the meaning of 'imem' without the description.
> Please add more detailed description as the patch2 description.
> [...]
Thank you for
Add imem clock for exynos5433.
Signed-off-by: Kamil Konieczny
---
drivers/clk/samsung/clk-exynos5433.c | 123 +
include/dt-bindings/clock/exynos5433.h | 55 +++
2 files changed, 178 insertions(+)
diff --git a/drivers/clk/samsung/clk-exynos5433.c
b/drivers
> prefixes has no bearing on its value.
>
> The signature length, however was incorrect, which is a problem for RSA
> implementations that need it to be exactly correct (like AMD CCP).
>
> Signed-off-by: Maciej S. Szmigiero
your e-mail address looks incorrect
[...]
--
B
mind the resource allocation and
> clean-up.
> +No resources related to request objects should remain allocated after a call
--
> +to .init() or .update(), since there might be no chance to free them.
is it for crypto api users or for drivers ?
the creator of request context is re
gt;
> /* Assumes SPU-M messages are in big endian */
> void spum_dump_msg_hdr(u8 *buf, unsigned int buf_len)
> diff --git a/drivers/crypto/bcm/spu.h b/drivers/crypto/bcm/spu.h
> index f252367..71cf6b5 100644
> --- a/drivers/crypto/bcm/spu.h
> +++ b/drivers/crypto/bcm/spu.h
> @@ -111,7 +111,7 @@ enum aead_type {
> AEAD_TYPE_LAST
> };
>
> -extern char *hash_alg_name[HASH_ALG_LAST];
> +extern const char * const hash_alg_name[HASH_ALG_LAST];
>
> struct spu_request_opts {
> bool is_inbound;
>
--
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland
Prevent improper use of req->result field in ahash update, init, export and
import functions in drivers code. A driver should use ahash request context
if it needs to save internal state.
Signed-off-by: Kamil Konieczny
---
version 2:
Change req->digest to req->result, as pointed o
On 06.03.2018 19:04, Tom Lendacky wrote:
> On 3/6/2018 5:45 AM, Kamil Konieczny wrote:
>> Prevent improper use of req->digest field in ahash update, init, export and
>
> Shouldn't that be req->result (here and below)?
Yes, it should, I will send version 2 soon,
thank
Prevent improper use of req->digest field in ahash update, init, export and
import functions in drivers code. A driver should use ahash request context
if it needs to save internal state.
Signed-off-by: Kamil Konieczny
---
include/crypto/hash.h | 11 +++
1 file changed, 7 inserti
On 16.02.2018 15:54, Boris Brezillon wrote:
> Adding back all the people that were Cc-ed on the initial email.
>
> On Fri, 16 Feb 2018 15:18:21 +0100
> Kamil Konieczny wrote:
>
>> On 16.02.2018 15:00, Boris Brezillon wrote:
>>> On Fri, 16 Feb 2018 12:21:53 +0
On 15.02.2018 19:32, Marek Vasut wrote:
> On 02/15/2018 07:06 PM, Kamil Konieczny wrote:
>>
>>
>> On 15.02.2018 18:06, Marek Vasut wrote:
>>> On 02/15/2018 06:00 PM, Kamil Konieczny wrote:
>>>>
>>>>
>>>> On 15.02.2018 17:27,
On 15.02.2018 18:06, Marek Vasut wrote:
> On 02/15/2018 06:00 PM, Kamil Konieczny wrote:
>>
>>
>> On 15.02.2018 17:27, Marek Vasut wrote:
>>> On 02/15/2018 04:41 PM, Herbert Xu wrote:
>>>> On Thu, Jan 18, 2018 at 07:33:59PM +0100, Kamil Konieczny wrot
On 15.02.2018 17:27, Marek Vasut wrote:
> On 02/15/2018 04:41 PM, Herbert Xu wrote:
>> On Thu, Jan 18, 2018 at 07:33:59PM +0100, Kamil Konieczny wrote:
>>> First four patches add empty hash export and import functions to each
>>> driver,
>>> with the same b
In AES-ECB mode crypt is done with key only, so any use of IV
can cause kernel Oops. Use IV only in AES-CBC and AES-CTR.
Signed-off-by: Kamil Konieczny
Reported-by: Anand Moon
Reviewed-by: Krzysztof Kozlowski
Tested-by: Anand Moon
Cc: sta...@vger.kernel.org # can be applied after commit
In AES-ECB mode crypt is done with key only, so any use of IV
can cause kernel Oops. Use IV only in AES-CBC and AES-CTR.
Signed-off-by: Kamil Konieczny
Reported-by: Anand Moon
Reviewed-by: Krzysztof Kozlowski
Tested-by: Anand Moon
Cc: sta...@vger.kernel.org
Fixes: 8f9702aad138 ("crypto
On 06.02.2018 17:48, Anand Moon wrote:
> Hi Kamil,
>
> Thanks for providing the fix to this issue.
>
> On 5 February 2018 at 23:10, Kamil Konieczny
> wrote:
>>
>> In AES-ECB mode crypt is done with key only, so any use of IV
>> can cause kernel Oops, as repo
In AES-ECB mode crypt is done with key only, so any use of IV
can cause kernel Oops, as reported by Anand Moon.
Fixed it by using IV only in AES-CBC and AES-CTR.
Signed-off-by: Kamil Konieczny
Reported-by: Anand Moon
---
Tested on Odroid XU4/HC1, kernel 4.15 with following command:
fallocate
On 19.01.2018 11:08, Marek Vasut wrote:
> On 01/19/2018 10:53 AM, Kamil Konieczny wrote:
>> On 18.01.2018 22:31, Marek Vasut wrote:
>>> On 01/18/2018 07:34 PM, Kamil Konieczny wrote:
>>>> Export and import are mandatory in async hash. As drivers were
>>&
On 18.01.2018 22:31, Marek Vasut wrote:
> On 01/18/2018 07:34 PM, Kamil Konieczny wrote:
>> Export and import are mandatory in async hash. As drivers were
>> rewritten, drop empty wrappers and correct init of ahash transformation.
>
> Are you moving checks from the core
7; will be enabled.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/bfin_crc.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/crypto/bfin_crc.c b/drivers/crypto/bfin_crc.c
index a118b9bed669..65a8e07835e8 100644
--- a/drivers/crypto/bfin_crc.c
+++ b/drivers/crypto/
7;
will be enabled.
Signed-off-by: Kamil Konieczny
Acked-by: Linus Walleij
---
drivers/crypto/ux500/hash/hash_core.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/crypto/ux500/hash/hash_core.c
b/drivers/crypto/ux500/hash/hash_core.c
index 9acccad26928..2d0a677bc
Export and import are mandatory in async hash. As drivers were
rewritten, drop empty wrappers and correct init of ahash transformation.
Signed-off-by: Kamil Konieczny
---
crypto/ahash.c | 18 ++
1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/crypto/ahash.c b
7;
will be enabled.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/n2_core.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/crypto/n2_core.c b/drivers/crypto/n2_core.c
index 662e709812cc..80e9c842aad4 100644
--- a/drivers/crypto/n2_core.c
+++ b/drivers/crypto/n2_core.c
7;
will be enabled.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/mxs-dcp.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/crypto/mxs-dcp.c b/drivers/crypto/mxs-dcp.c
index 764be3e6933c..a10c418d4e5c 100644
--- a/drivers/crypto/mxs-dcp.c
+++ b/drivers/crypto
unreleated patches
make commit message more descriptive
Kamil Konieczny (5):
crypto: mxs-dcp: Add empty hash export and import
crypto: n2_core: Add empty hash export and import
crypto: ux500/hash: Add empty export and import
crypto: bfin_crc: Add empty hash export and import
crypto: ahash.c
Please drop this as I will resend it as part of patchset.
On 16.01.2018 17:32, Kamil Konieczny wrote:
> Crypto framework will require async hash export/import, so add empty
> functions to prevent OOPS.
>
> Signed-off-by: Kamil Konieczny
> ---
> drivers/crypto/ux500/has
Please drop this as I will resend it as part of patchset.
On 16.01.2018 17:16, Kamil Konieczny wrote:
> Crypto framework will require async hash export/import, so add empty
> functions to prevent OOPS.
>
> Signed-off-by: Kamil Konieczny
> ---
> drivers/crypto/mxs-dcp.c | 14 +
Please drop this as I will resend it as part of patchset.
On 16.01.2018 17:18, Kamil Konieczny wrote:
> Crypto framework will require async hash export/import, so add empty
> functions to prevent OOPS.
>
> Signed-off-by: Kamil Konieczny
> ---
> drivers/crypto/n2_core.c | 12
On 18.01.2018 11:06, Linus Walleij wrote:
> On Tue, Jan 16, 2018 at 5:32 PM, Kamil Konieczny
> wrote:
>
>> Crypto framework will require async hash export/import, so add empty
>> functions to prevent OOPS.
>>
>> Signed-off-by: Kamil Konieczny
>
> Acke
On 16.01.2018 19:38, Kamil Konieczny wrote:
> Export and import were optional in async hash. As most drivers were
> rewritten, they become mandatory now, so correct init of ahash
> transformation.
>
> Signed-off-by: Kamil Konieczny
Please drop this patch, as there is one more dr
Export and import were optional in async hash. As most drivers were
rewritten, they become mandatory now, so correct init of ahash
transformation.
Signed-off-by: Kamil Konieczny
---
This is resend of previous patch. As Bartlomiej Zolnierkiewicz pointed out,
there are still three crypto drivers
On 16.01.2018 18:28, Fabio Estevam wrote:
> Hi Kamil,
>
> On Tue, Jan 16, 2018 at 2:16 PM, Kamil Konieczny
> wrote:
>> Crypto framework will require async hash export/import, so add empty
>> functions to prevent OOPS.
>
> Which Oops exactly are you getting?
N
On 16.01.2018 17:56, Marek Vasut wrote:
> On 01/16/2018 05:16 PM, Kamil Konieczny wrote:
>> Crypto framework will require async hash export/import, so add empty
>> functions to prevent OOPS.
>
> Shouldn't this be handled on the subsystem level with some
>
Crypto framework will require async hash export/import, so add empty
functions to prevent OOPS.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/ux500/hash/hash_core.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/crypto/ux500/hash/hash_core.c
b/drivers
Crypto framework will require async hash export/import, so add empty
functions to prevent OOPS.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/n2_core.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/crypto/n2_core.c b/drivers/crypto/n2_core.c
index 662e709812cc
Crypto framework will require async hash export/import, so add empty
functions to prevent OOPS.
Signed-off-by: Kamil Konieczny
---
drivers/crypto/mxs-dcp.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/crypto/mxs-dcp.c b/drivers/crypto/mxs-dcp.c
index 764be3e6933c
Async hash operations can use result pointer in final/finup/digest,
but not in init/update/export/import, so test it for misuse.
Signed-off-by: Kamil Konieczny
---
Tested with crypto run-time self test on Odroid-U3 with Exynos 4412 CPU
with insmod s5p-sss.ko
crypto/testmgr.c | 39
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