':
phy-tegra-usb.c:(.text+0x1dd4): undefined reference to `clk_get_parent'
Reported-by: kernel test robot
Signed-off-by: Krzysztof Kozlowski
Acked-by John Crispin
---
arch/mips/ralink/clk.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/mips/ralink/clk.c b
: John Crispin
Thanks !
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-realtek-rtl.c | 180 ++
2 files changed, 181 insertions(+)
create mode 100644 drivers/irqchip/irq-realtek-rtl.c
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip
ontroller to only ignore the system reset, so all
reset lines with index greater than 0 are considered valid.
Signed-off-by: Sander Vanheule
Acked-by: John Crispin
---
This patch was tested on a TP-Link EAP235-Wall, with an MT7621DA SoC.
The bootloader on this device would leave reset line 2
On 04.01.21 14:17, Bert Vermeulen wrote:
This is a standard IRQ driver with only status and mask registers.
The mapping from SoC interrupts (18-31) to MIPS core interrupts is
done via an interrupt-map in device tree.
Signed-off-by: Bert Vermeulen
Signed-off-by: John Crispin
---
drivers
multiple bssid beacons aswell as EMA ones.
Signed-off-by: Aloka Dixit
Signed-off-by: John Crispin
---
include/net/cfg80211.h | 33 +
include/uapi/linux/nl80211.h | 21 +
net/wireless/nl80211.c | 34
.
The patch also makes sure that when a parent is closed, its children are
also closed.
Signed-off-by: Aloka Dixit
Signed-off-by: John Crispin
---
include/net/mac80211.h | 28 +-
net/mac80211/cfg.c | 53 ++
net/mac80211/debugfs.c | 1
As a non-transmitting interface does not broadcast a beacon, we do not want
to allow channel switch announcements. They need to be triggered on the
transmitting interface.
Signed-off-by: Aloka Dixit
Signed-off-by: John Crispin
---
net/mac80211/cfg.c | 3 +++
1 file changed, 3 insertions
Changes in V4
* move multiple bssid config from add_interface to start_ap
* add ema support
John Crispin (4):
nl80211: add basic multiple bssid support
mac80211: add multiple bssid support to interface handling
mac80211: add multiple bssid/EMA support to beacon handling
mac80211: don&#
: Aloka Dixit
Signed-off-by: John Crispin
---
include/net/mac80211.h | 90 +
net/mac80211/cfg.c | 57 +-
net/mac80211/ieee80211_i.h | 2 +
net/mac80211/tx.c | 157 +
4 files changed, 286 insertions(+), 20
oops, CC'ed the wrong ML, sorry ...
On 09.10.20 12:13, John Crispin wrote:
Changes in V4
* move multiple bssid config from add_interface to start_ap
* add ema support
John Crispin (4):
nl80211: add basic multiple bssid support
mac80211: add multiple bssid support to interface han
On 17.07.20 22:39, Florian Fainelli wrote:
On 7/17/2020 1:29 PM, Matthew Hagan wrote:
On 16/07/2020 23:09, Jakub Kicinski wrote:
On Mon, 13 Jul 2020 21:50:26 +0100 Matthew Hagan wrote:
Add names and decriptions of additional PORT0_PAD_CTRL properties.
Signed-off-by: Matthew Hagan
---
D
On 17.07.20 22:29, Matthew Hagan wrote:
On 16/07/2020 23:09, Jakub Kicinski wrote:
On Mon, 13 Jul 2020 21:50:26 +0100 Matthew Hagan wrote:
Add names and decriptions of additional PORT0_PAD_CTRL properties.
Signed-off-by: Matthew Hagan
---
Documentation/devicetree/bindings/net/dsa/qca8k.t
On 03.05.20 22:18, Robert Marko wrote:
Add a driver to setup the USB PHY-s on Qualcom m IPQ40xx series SoCs.
The driver sets up HS and SS phys.
Signed-off-by: John Crispin
Signed-off-by: Robert Marko
Cc: Luka Perkov
Thanks for pushing these patches upstream !
On 27/07/2019 19:53, Martin Blumenstingl wrote:
+ * Copyright (C) 2011-2012 John Crispin
could you change that to j...@phrozen.org please
John
Acked-by: John Crispin
se that a device enables conntrack helper via
command "echo 1 > /proc/sys/net/netfilter/nf_conntrack_helper",
the status of IPS_HELPER_BIT will not present any change, and
consequently it loses the checking ability in the context.
Signed-off-by: Henry Yen
Reviewed-by: Ryder Lee
Tes
refore, we also have to swap the order of registering the pinctrl
driver and registering the gpio chip.
You also have to add the "gpio-ranges" property to the pinctrl device
node to get it finally working.
Signed-off-by: Martin Schiller
Patch applied unless John Crispin has objections,
On 14/11/2018 13:47, Thierry Reding wrote:
On Tue, Nov 13, 2018 at 10:08:22AM +0800, Ryder Lee wrote:
The flag 'has_clks' and related checks are superfluous as the CCF
subsystem does this for you.
Both of these mechanisms aren't equivalent. While CCF can deal with
optional clocks, what the ha
On 05/09/18 08:51, Mathias Kresin wrote:
From: Tobias Wolf
Set the PCI controller of_node such that PCI devices can be
instantiated via device tree.
Signed-off-by: Tobias Wolf
Signed-off-by: Mathias Kresin
Acked-by: John Crispin
---
arch/mips/pci/pci-rt2880.c | 2 ++
1 file
he asked me to verify his
proposed patch which i just did. I can confirm the the patch fixes the issue
on 4.14.67 and Greg should add it to the stable queue please.
Tested-by: John Crispin
Thanks,
John
This series adds a PHY driver for the Qualcomm Dakota SoC
Changes V1->V2
* fix the compat string inside the binding doc
* fix up the reset names inside the binding doc
* reflect the above changes in the driver and dts/i files
John Crispin (3):
dt-bindings: phy-qcom-ipq4019-usb: add bind
This patch adds the binding documentation for the HS/SS USB PHY found
inside Qualcomm Dakota SoCs.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: John Crispin
---
.../bindings/phy/phy-qcom-ipq4019-usb.txt | 21 +
1 file changed, 21 insertions
Add a driver to setup the USB phy on Qualcom Dakota SoCs.
The driver sets up HS and SS phys. In case of HS some magic values need to
be written to magic offsets. These were taken from the SDK driver.
Signed-off-by: John Crispin
---
drivers/phy/qualcomm/Kconfig| 7 +
drivers
This patch makes USB work on the Dakota EVB.
Signed-off-by: John Crispin
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 +++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 76 +++
2 files changed, 96 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019
This patch adds the binding documentation for the HS/SS USB PHY found
inside Qualcom Dakota SoCs.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: John Crispin
---
.../bindings/phy/phy-qcom-ipq4019-usb.txt | 21 +
1 file changed, 21 insertions
This patch makes USB work on the Dakota EVB.
Signed-off-by: John Crispin
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 +++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 76 +++
2 files changed, 96 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019
Add a driver to setup the USB phy on Qualcom Dakota SoCs.
The driver sets up HS and SS phys. In case of HS some magic values need to
be written to magic offsets. These were taken from the SDK driver.
Signed-off-by: John Crispin
---
drivers/phy/qualcomm/Kconfig| 7 +
drivers
On 10/07/18 07:09, Ryder Lee wrote:
Cleanup binding document to get rid of unsupported reference boards
for MT7623N.
Cc: John Crispin
Cc: Sean Wang
Signed-off-by: Ryder Lee
Acked-by: John Crispin
---
Documentation/devicetree/bindings/arm/mediatek.txt | 3 ---
1 file changed, 3
On 10/07/18 07:09, Ryder Lee wrote:
Normally, we didn't release this kind of baord to user. This specific
board exists only in the early stage of development inside MediaTek -
and that may confuse peoples.
Hence this patch removes related files accordingly.
Cc: John Crispin
Cc: Sean
arch/mips/ath79/irq.c.
Signed-off-by: John Crispin
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ath79-intc.c | 108 +++
2 files changed, 109 insertions(+)
create mode 100644 drivers/irqchip/irq-ath79-intc.c
diff --git a/drivers/irqchip
On 15/03/18 21:12, NeilBrown wrote:
On Thu, Mar 15 2018, John Crispin wrote:
On 15/03/18 11:48, Dan Carpenter wrote:
This all seems fine. Generally the requirements for staging are that it
has a TODO, someone to work on it, and it doesn't break the build. But
some of the patches
On 15/03/18 11:48, Dan Carpenter wrote:
This all seems fine. Generally the requirements for staging are that it
has a TODO, someone to work on it, and it doesn't break the build. But
some of the patches don't have commit message and those are required and
some of the commit messages are just
Hi,
comments inline
On 01/09/17 16:53, Harvey Hunt wrote:
Previously, mt7620.c defined the clocks for uarts with the names
uartlite, uart1 and uart2. Rename them to serial{0,1,2} and update
the devicetree node names.
Signed-off-by: Harvey Hunt
Cc: devicet...@vger.kernel.org
Cc: linux-m...@l
)
Signed-off-by: Arnd Bergmann
Acked-by: John Crispin
gregkh: can you fold this into the commit sitting inside usb-next ?
---
drivers/phy/ralink/phy-ralink-usb.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/phy/ralink/phy-ralink-usb.c
b/drive
On 10/08/17 08:42, Eric Dumazet wrote:
On Wed, 2017-08-09 at 22:52 -0700, David Miller wrote:
From: John Crispin
Date: Wed, 9 Aug 2017 14:41:15 +0200
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this is that skb_hash will
named 'dsa_ptr'
ops = skb->dev->dsa_ptr->tag_ops;
^
make[3]: *** [net/core/flow_dissector.o] Error 1
Signed-off-by: John Crispin
---
net/core/flow_dissector.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c
On 10/08/17 08:42, Eric Dumazet wrote:
On Wed, 2017-08-09 at 22:52 -0700, David Miller wrote:
From: John Crispin
Date: Wed, 9 Aug 2017 14:41:15 +0200
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this is that skb_hash will
We need to access this struct from within the flow_dissector to fix
dissection for packets coming in on DSA devices.
Signed-off-by: Muciri Gatimu
Signed-off-by: Shashidhar Lakkavalli
Signed-off-by: John Crispin
---
include/net/dsa.h | 7 +++
net/dsa/dsa_priv.h | 7 ---
2 files
-by: John Crispin
---
net/core/flow_dissector.c | 12
1 file changed, 12 insertions(+)
diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c
index 0cc672aba1f0..5b5be9577257 100644
--- a/net/core/flow_dissector.c
+++ b/net/core/flow_dissector.c
@@ -4,6 +4,7 @@
#incl
ter
John Crispin (4):
net-next: dsa: move struct dsa_device_ops to the global header file
net-next: dsa: add flow_dissect callback to struct dsa_device_ops
net-next: tag_mtk: add flow_dissect callback to the ops struct
net-next: dsa: fix flow dissection
include/net/dsa.h |
hashing function properly.
Signed-off-by: Muciri Gatimu
Signed-off-by: Shashidhar Lakkavalli
Signed-off-by: John Crispin
---
net/dsa/tag_mtk.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/net/dsa/tag_mtk.c b/net/dsa/tag_mtk.c
index 2f32b7ea3365
offset of the network header.
Signed-off-by: Muciri Gatimu
Signed-off-by: Shashidhar Lakkavalli
Signed-off-by: John Crispin
---
include/net/dsa.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/net/dsa.h b/include/net/dsa.h
index 65d7804c6f69..7f46b521313e 100644
--- a/include
The MT7623 has several DMA rings. Inside the SW path, the core will use
the PDMA when receiving traffic. While bringing up the HW path we noticed
that the PPE requires the QDMA RX to also be brought up as it uses this
ring internally for its flow scheduling.
John Crispin (2):
net-next: mediatek
Trivial patch fixing 2 typos.
Signed-off-by: John Crispin
---
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 4594862e5a9b
This patch is in preparation for adding HW flow and QoS offloading. For
those features to work, the driver needs to bring up the first QDMA RX
ring. This ring is used by the PPE offloading HW.
Signed-off-by: John Crisp in
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 36 +
: Shashidhar Lakkavalli
Signed-off-by: Muciri Gatimu
Signed-off-by: John Crispin
---
drivers/net/dsa/mt7530.c | 38 ++
drivers/net/dsa/mt7530.h | 1 +
2 files changed, 39 insertions(+)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index
Hi Harvey,
Thanks for picking up my stale patch. small comment inline ...
On 03/08/17 12:32, Harvey Hunt wrote:
From: John Crispin
Add a driver to setup the USB phy on Mediatek/Ralink SoCs.
The driver is trivial and only sets up power and host mode.
Signed-off-by: John Crispin
Signed-off
On 02/08/17 09:19, Zhi Mao wrote:
Hi John, Matthais & Thierry,
Just a gentle ping on this issue again.
Do you have any update?
Regards,
Zhi
Hi Zhi,
looks good to me
Acked-by: John Crispin
John
and submitting a lot of patches for the driver while
Nelson was looking into the aspects more on hardware additions and details
such as introducing PDMA with Hardware LRO to the driver. Also update
John's up-to-date mail address in the patch.
Cc: John Crispin
Signed-off-by: Sean Wang
Signe
On 26/07/17 17:10, Andrew Lunn wrote:
On Fri, Jul 21, 2017 at 10:58:12AM +0200, John Crispin wrote:
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this is that skb_hash will call the
flow_dissector. At this point the skb still
On 21/07/17 17:56, Paolo Abeni wrote:
Hi,
On Fri, 2017-07-21 at 17:20 +0200, John Crispin wrote:
In order to make HW flow offloading work in latest MediaTek silicon we need
to propagate part of the RX DMS descriptor to the upper layers populating
the flow offload engines HW tables. This
the required information and make it persistent for the lifecycle of the
skb and its clones.
Signed-off-by: John Crispin
---
include/linux/skbuff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 4093552be1de..db9576cd946b 100644
--- a
still using NF hooks and
I plan to rebase it and send it upstream once the flow table offloading
patches that folks are working on are upstream.
I am right now trying to get rid of the remaning hacks in the code and
wanted to know if this series would be a feasible solution.
John
John Crispin
is later required by the upper layers to populate the flow offloading
engines HW tables properly. This patch sets the skb_shared_info's dma_desc
field so that we can use the value later on.
Signed-off-by: John Crispin
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 4
1 file chang
The MT7530 inserts the 4 magic header in between the 802.3 address and
protocol field. The patch defines these header such that the flow_disector
can properly parse the packet and thus allows hashing to function properly.
Signed-off-by: John Crispin
---
net/dsa/tag_mtk.c | 6 --
1 file
We need to access this struct from within the flow_dissector to fix
dissection for packets coming in on DSA devices.
Signed-off-by: John Crispin
---
include/net/dsa.h | 7 +++
net/dsa/dsa_priv.h | 7 ---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/include/net/dsa.h b
the dsa tag driver thus fixing dissection, hashing and RPS.
Signed-off-by: John Crispin
---
net/core/flow_dissector.c | 12
1 file changed, 12 insertions(+)
diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c
index fc5fc4594c90..1268ae75c3b3 100644
--- a/net/c
Adding these 2 new fields allows a DSA device to indicate the offsets of
the 802.3 header caused by the insertion of the switches tag.
Signed-off-by: John Crispin
---
include/net/dsa.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/net/dsa.h b/include/net/dsa.h
index
situation happening.
Signed-off-by: Sean Wang
Thanks, i ran into the same problem last week and was going to send a
fix shortly.
Acked-by: John Crispin
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/ethernet/mediatek
On 23/06/17 07:08, Zhi Mao wrote:
change in v2:
1. add error check for enable colock control flow
2. use "goto err_clk(main/top)" coding style, for preparing clk error case
3. remove comments inline /*===*/
4. move "PWM_CLK_DIV_MAX" modification to its own patch
5. move pwm source clock selecti
hn
On Wed, 2017-06-21 at 20:22 +0800, John Crispin wrote:
On 21/06/17 10:11, Zhi Mao wrote:
> support multiple chip(MT2712, MT7622, MT7623)
This patch does more than add extra SoC support. It also
* adds PWM_CLK_DIV_MAX which really should go into its own patch
* adds mtk_pwm_com_reg which s
ds
Zhi
Hi Zhi,
I just had another look and noticed that the CON registers are not at a
fixed offset of 0x40 for the new pwm8 register so having 2) inside this
patch makes sense. please explain in the description that this is the case
John
On Wed, 2017-06-21 at 20:22 +0800, John Cri
On 21/06/17 10:11, Zhi Mao wrote:
support multiple chip(MT2712, MT7622, MT7623)
This patch does more than add extra SoC support. It also
* adds PWM_CLK_DIV_MAX which really should go into its own patch
* adds mtk_pwm_com_reg which should also go into its own patch
more comments inline
Sign
1 file changed, 43 insertions(+), 26 deletions(-)
diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
index 5c11bc7..c803ff6 100644
--- a/drivers/pwm/pwm-mediatek.c
+++ b/drivers/pwm/pwm-mediatek.c
@@ -2,6 +2,7 @@
* Mediatek Pulse Width Modulator driver
*
* Copyright (C) 201
On 20/06/17 08:54, Zhi Mao wrote:
1.fix clock control
- prepare top/main clk in mtk_pwm_probe() function,
it will increase power consumption
and in original code these clocks is only prepeare but never enabled
- pwm clock should be enabled before setting pwm registers
in function
next-20170530]
[cannot apply to v4.12-rc3]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/John-Crispin/Documentation-devicetree-add-multiple-cpu-port-DSA-binding/20170530-224954
config: x86_64
dle to the host interface it
connects to. Each user port can have a phandle to a cpu port which
should be used for traffic between the port and the CPU. Thus simple
load sharing over the two CPU ports can be achieved.
Signed-off-by: John Crispin
---
include/net/dsa.h | 21 -
net/
to connect to an external PHY.
Signed-off-by: John Crispin
---
drivers/net/dsa/mt7530.c | 45 +
drivers/net/dsa/mt7530.h | 1 -
2 files changed, 29 insertions(+), 17 deletions(-)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index
Extend the DSA binding documentation, adding the new property required
when there is more than one CPU port attached to the switch.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: John Crispin
---
Documentation/devicetree/bindings/net/dsa/dsa.txt | 61 ++-
1
On 01/05/17 09:54, sean.w...@mediatek.com wrote:
From: Sean Wang
mt7623 pinctrl hardware can be compatible with mt2701 driver,
so the patch lets the pinctrl on mt7623 SoC reuse the driver
and deletes those redundant ones.
Cc: John Crispin
Signed-off-by: Sean Wang
Acked-by: John Crispin
On 23/03/17 15:09, Felix Fietkau wrote:
On 2017-03-23 09:06, Sean Wang wrote:
Hi Andrew,
The purpose for the regmap table registered is to
provide a way which helps us to look up a specific
register on the switch through regmap-debugfs.
And not all ranges of register is defined
so I only
On 13/03/17 17:11, sean.w...@mediatek.com wrote:
From: Sean Wang
MT7530 is a 7-ports Gigabit Ethernet Switch that could be found on
Mediatek router platforms such as MT7623A or MT7623N which includes 7-port
Gigabit Ethernet MAC and 5-port Gigabit Ethernet PHY. Among these ports,
The port from
ned-off-by: André Draszik
I was under the impression that I had sent this patch already, maybe it
got lost somewhere along the line
Acked-by: John Crispin
> ---
> arch/mips/ralink/mt7620.c | 18 +-
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --g
On 08/02/2017 21:50, Brian Norris wrote:
> On Thu, Dec 29, 2016 at 05:43:02PM +0100, Boris Brezillon wrote:
>> On Tue, 20 Dec 2016 20:03:26 +0100
>> John Crispin wrote:
>>
>>> This patch updates my email address as I no longer have access to the old
>>> o
uadspi.txt
> @@ -1,7 +1,13 @@
> * Serial NOR flash controller for MTK MT81xx (and similar)
>
> Required properties:
> -- compatible: should be "mediatek,mt8173-nor";
> +- compatible: The possible values are:
> + "mediate
On 24/01/2017 11:31, Boris Brezillon wrote:
> On Sun, 22 Jan 2017 10:36:40 +0800
> Guochun Mao wrote:
>
>> Hi,
>> On Thu, 2017-01-19 at 08:18 -0600, Rob Herring wrote:
>>> On Thu, Jan 19, 2017 at 2:14 AM, Boris Brezillon
One last question and I'm done: is something like that acceptable?
Hi Erin,
small comment inline
On 13/01/2017 09:42, Erin Lo wrote:
> From: Sean Wang
>
> Add ethernet device node for MT2701.
>
> Signed-off-by: Sean Wang
> Signed-off-by: Erin Lo
> ---
> arch/arm/boot/dts/mt2701-evb.dts | 40
>
> arch/arm/boot/dts/m
Hi Andreas,
had a look last night why the ethernet dtsi was not added and it
obviously was not added as we were waiting for the clk-mt2701 to be
merged. the ethernet dtsi will have phandles pointing at the clk nodes
which did not exist at the time. same is true for the PWM code.
i sat down last n
(resend, hit the wrong reply button)
On 10/01/2017 10:48, Andreas Färber wrote:
> Hi,
>
> Am 10.01.2017 um 08:00 schrieb John Crispin:
>> On 08/01/2017 14:30, Andreas Färber wrote:
>>>
>>> Andreas Färber (4):
>>> Documentation: devicetree: Add ve
On 08/01/2017 14:30, Andreas Färber wrote:
>
> Andreas Färber (4):
> Documentation: devicetree: Add vendor prefix for AsiaRF
> Documentation: devicetree: arm: mediatek: Add Geek Force board
> ARM: dts: mt7623: Add Geek Force config
> MAINTAINERS: Extend ARM/Mediatek SoC support section
>
On 23/12/2016 00:52, Colin King wrote:
> From: Colin Ian King
>
> ralink_soc sould be assigned to RT3883_SOC, replace incorrect
> comparision with assignment.
>
> Signed-off-by: Colin Ian King
Acked-by: John Crispin
i thought i had sent this fix upstream ages ago. luck
From: Felix Fietkau
The sign-file tool failed to build against libressl. Fix this by extending
the PKCS7 check and thus making sign-file link against libressl without an
error.
Signed-off-by: John Crispin
Signed-off-by: Felix Fietkau
---
scripts/sign-file.c |4 +++-
1 file changed, 3
From: Imre Kaloz
This patch splits up the compile flags between ppc40x and ppc44x.
Signed-off-by: John Crispin
Signed-off-by: Imre Kaloz
---
arch/powerpc/Makefile |3 ++-
arch/powerpc/boot/Makefile |6 +++---
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch
From: Felix Fietkau
many embedded boards have a disconnected TTL level serial which can
generate some garbage that can lead to spurious false sysrq detects.
Signed-off-by: John Crispin
Signed-off-by: Felix Fietkau
---
include/linux/serial_core.h |2 +-
lib/Kconfig.debug | 10
On 21/12/2016 15:26, Christoph Hellwig wrote:
> On Wed, Dec 21, 2016 at 02:11:25PM +0100, John Crispin wrote:
>> I can turn it into an enable patch that is selected by default.
>>
>> The current patch disables all those quirks that are used for x86/PC
>> style machines
On 21/12/2016 11:27, Cyrille Pitchen wrote:
> Hi all,
>
> Le 21/12/2016 à 08:23, John Crispin a écrit :
>> From: André Valentin
>>
>> This patch adds support for a new macronix spi flash chip. We have had this
>> patch inside our tree for a while and people a
On 21/12/2016 13:22, Christoph Hellwig wrote:
> On Wed, Dec 21, 2016 at 08:53:04AM +0100, John Crispin wrote:
>> This patch has been lingering inside the OpenWrt for some years. I am not
>> sure if this is the best way to remove the quirks from the build. Let me
>> know if y
On 21/12/2016 11:07, Marek Vasut wrote:
> On 12/21/2016 09:18 AM, John Crispin wrote:
>> Hi André
>>
>> could you test if it also works when enabling SECT_4K please ?
>
> Yes, please test, thanks.
>
> btw please do stop top-posting.
>
>> John
&g
>
> André
>
> Am 21.12.2016 um 08:33 schrieb Marek Vasut:
>> On 12/21/2016 08:23 AM, John Crispin wrote:
>>> From: André Valentin
>>>
>>> This patch adds support for a new macronix spi flash chip. We have had this
>>> patch inside our t
/Ralink router with this option enabled
it will reduce the size of an uncompressed uImage by 12KB.
Signed-off-by: John Crispin
Signed-off-by: Gabor Juhos
---
Hi Bjorn,
This patch has been lingering inside the OpenWrt for some years. I am not
sure if this is the best way to remove the quirks from
On 21/12/2016 08:33, Marek Vasut wrote:
> On 12/21/2016 08:23 AM, John Crispin wrote:
>> From: André Valentin
>>
>> This patch adds support for a new macronix spi flash chip. We have had this
>> patch inside our tree for a while and people are actively usin
From: André Valentin
This patch adds support for a new macronix spi flash chip. We have had this
patch inside our tree for a while and people are actively using routers
with this chip.
Signed-off-by: John Crispin
Signed-off-by: André Valentin
---
Changes in V2
* add description
* add SECT_4K
From: "Larry D. Pinney"
Add Support for the ESMT_F25L32QA and ESMT_F25L64QA
These are 4MB and 8MB SPI NOR Chips from Elite Semiconductor Memory
Technology
Acked-by: Marek Vasut
Signed-off-by: John Crispin
Signed-off-by: Larry D. Pinney
---
drivers/mtd/spi-nor/spi-nor.c |2
From: Ash Benz
This patch adds support for a new macronix spi flash chip. We have had this
patch inside our tree for a while and people are actively using routers
with this chip.
Signed-off-by: John Crispin
Signed-off-by: Ash Benz
---
Changes in V2
* add description
drivers/mtd/spi-nor/spi
These have been lingering inside the owrt and lede trees for a while.
André Valentin (1):
mtd: spi-nor: add support for macronix mx25u3235f
Ash Benz (1):
mtd: spi-nor: add support for macronix mx25u25635f
Larry D. Pinney (1):
mtd: spi-nor: add support for ESMT_f25l32qa and ESMT_f25l64qa
From: "Larry D. Pinney"
Add Support for the ESMT_F25L32QA and ESMT_F25L64QA
These are 4MB and 8MB SPI NOR Chips from Elite Semiconductor Memory
Technology
Signed-off-by: John Crispin
Signed-off-by: Larry D. Pinney
---
Sorry, forgot to add this to the series I sent earlier
drive
This patch updates my email address as I no longer have access to the old
one.
Signed-off-by: John Crispin
---
arch/arm/boot/dts/mt7623-evb.dts |2 +-
arch/arm/boot/dts/mt7623.dtsi|2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/mt7623-evb.dts
From: Ash Benz
Signed-off-by: John Crispin
Signed-off-by: Ash Benz
---
drivers/mtd/spi-nor/spi-nor.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index d0fc165..171adb3 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b
These have been lingering inside the owrt/lede tree for a while.
André Valentin (1):
mtd: spi-nor: add support for mx25u3235f
Ash Benz (1):
mtd: spi-nor: add support for macronix mx25u25635f
drivers/mtd/spi-nor/spi-nor.c |2 ++
1 file changed, 2 insertions(+)
--
1.7.10.4
From: André Valentin
Signed-off-by: John Crispin
Signed-off-by: André Valentin
---
drivers/mtd/spi-nor/spi-nor.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 171adb3..f9a41dc 100644
--- a/drivers/mtd/spi-nor/spi
1 - 100 of 477 matches
Mail list logo
