Hi,
Flavio Suligoi 於 2020/12/15 下午 11:06 寫道:
we produce some x86 boards with multistandard RS232/422/485 ports
and, to have this feature, in some of these boards, we use a
Fintek uart or superIO.
So this additional info "extra_name" can be useful for
a quick check if the serial ports are multist
Hi,
Greg Kroah-Hartman 於 2020/12/14 下午 09:42 寫道:
pdata->pid = chip;
+
+ pr_info("%s%s%s Fintek %s\n",
+ uart->port.dev ? dev_name(uart->port.dev) : "",
+ uart->port.dev ? ": " : "",
+ uart->port.name,
+ chip_name);
Drivers,
Hi Geert,
Geert Uytterhoeven 於 2020/6/3 下午 03:13 寫道:
Hi Ji-Ze,
If devres_head is not empty, you have a serious problem on your system,
as those resources may be in an unknown state (e.g. freed but still in
use). While I had missed the probe_count imbalance when implementing
the original change
? do.writev+0x6a/0xll0
? do.writev+0x6a/0xll0
? sigprocmask+0x6f/Oxa0
__64_sys_reboot+0xle/0x20
do_syscall_64+0x57/0xlb0
Fixes: 7c35e699c88b ("driver core: Print device when resources present in
really_probe()")
Signed-off-by: Ji-Ze Hong (Peter
Bit3: IRQ_MODE1
Level/Low: IRQ_MODE0:0, IRQ_MODE1:0
Edge/High: IRQ_MODE0:1, IRQ_MODE1:0
Signed-off-by: Ji-Ze Hong (Peter Hong)
Cc: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/driver
:[LEN][Data.][LSR]
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 131 ++--
1 file changed, 127 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index e4db0aec9af0..36a17aedc2ae 100644
The Fintek F81534A series contains 3 GPIOs per UART and The max GPIOs
is 12x3 = 36 GPIOs and this patch will implements GPIO device as a
gpiochip to control all GPIO pins even transforms to transceiver pins.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 249
Use devm_kzalloc() to replace kzalloc().
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index b42b3738a768..e4db0aec9af0 100644
Extract LSR handler to function.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 53 +
1 file changed, 30 insertions(+), 23 deletions(-)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index 43fa1f0716b7
bulk layout change:
F81232: [LSR(1Byte)+DATA(1Byte)][LSR(1Byte)+DATA(1Byte)]...
F81534A:[LEN][Data.][LSR]
We'll try to do some code refacting before add F81534A series.
Ji-Ze Hong (Peter Hong) (7):
USB: serial: f81232: Extract LSR handler
USB: seri
)
to enable all available serial ports.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 135 +++-
1 file changed, 134 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index 01cb5a5e
GPIO function publicly to control Tranceiver privately use.
We'll default set to 0/0/1 for control transceiver to RS232 mode.
Otherwise, If the serial port is not active, the 3 pins is in GPIO mode
and controlled by global GPIO device with VID/PID: 2c42/16f8.
Signed-off-by: Ji-Ze Hong (
Add tx_empty() function for F81232.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index c07d376c743d..b42b3738a768 100644
--- a/drivers/usb
Hi Johan,
Johan Hovold 於 2019/8/28 下午 11:02 寫道:
On Thu, Jun 06, 2019 at 10:54:13AM +0800, Ji-Ze Hong (Peter Hong) wrote:
The Fintek F81534A series is contains 1 HUB / 1 GPIO device / n UARTs,
but the UART is default disable and need enabled by GPIO device(2c42/16F8).
When F81534A plug to host
Hi,
Greg KH 於 2019/8/23 上午 05:15 寫道:
Andy Shevchenko 於 2019/8/16 下午 07:26 寫道:
We have 8250_fintek.
Isn't it a right place to add these?
The 8250_fintek implements PNP device with id PNP0501.
Should I also implements PCIe device in this file?
Does it use the same logic? If so, that makes s
Hi,
Andy Shevchenko 於 2019/8/16 下午 07:26 寫道:
On Fri, Aug 16, 2019 at 01:27:29PM +0800, Ji-Ze Hong (Peter Hong) wrote:
Fintek F81504A/508A/512A is PCIE to 4/8/12 UARTs device. It's support
IO/MMIO/PCIE conf to access all functions. The old F81504/508/512 is
only support IO.
We
Fintek F81504A/508A/512A is PCIE to 4/8/12 UARTs device. It's support
IO/MMIO/PCIE conf to access all functions. The old F81504/508/512 is
only support IO.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_pci.c | 121 +
1 file ch
Hi,
Saeed Mahameed 於 2019/7/24 上午 05:38 寫道:
On Mon, 2019-07-22 at 14:22 +0800, Ji-Ze Hong (Peter Hong) wrote:
This patch add support for Fintek PCIE to 2 CAN controller support
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
Changelog:
v2:
1: Fix comment on the spinlock with write
This patch add support for Fintek PCIE to 2 CAN controller support
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
v3:
1: Fix module parameter "internal_clk" default from 1 to true.
2: Remove non-usable pcim_iounmap().
v2:
1: Fix comment on the spinlock with wr
Hi Marc,
Marc Kleine-Budde 於 2019/7/22 下午 04:15 寫道:
On 7/22/19 8:22 AM, Ji-Ze Hong (Peter Hong) wrote: >> +/* Probe F81601 based
device for the SJA1000 chips and register each
+ * available CAN channel to SJA1000 Socket-CAN subsystem.
+ */
+static int f81601_pci_add_card(struct pci_dev
This patch add support for Fintek PCIE to 2 CAN controller support
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
Changelog:
v2:
1: Fix comment on the spinlock with write access.
2: Use ARRAY_SIZE instead of F81601_PCI_MAX_CHAN.
3: Check the strap pin outside the loop
This patch add support for Fintek PCIE to 2 CAN controller support
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/net/can/sja1000/Kconfig | 8 ++
drivers/net/can/sja1000/Makefile | 1 +
drivers/net/can/sja1000/f81601.c | 223 +++
3 files changed, 232
Force F81534A series UARTs with RS232 mode in port_probe().
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index 84efcc66aa56..75dfc0b9ef30
Use devm_kzalloc() to replace kzalloc().
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index 7d1ec8f9d168..708d85c7d822 100644
The Fintek F81534A series contains 3 GPIOs per UART and The max GPIOs
is 12x3 = 36 GPIOs.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 210
1 file changed, 210 insertions(+)
diff --git a/drivers/usb/serial/f81232.c b
1Byte)]...
F81534A:[LEN][Data.][LSR]
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 153 +---
1 file changed, 144 insertions(+), 9 deletions(-)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
timeout. (F81534A_CTRL_RETRY * F81534A_CTRL_TIMER)
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 356 +++-
1 file changed, 355 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f
Add tx_empty() function for F81232 & F81534A series.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index e9470fb0d691..7d1ec8f9d168 10
s*4 cache)
2. up to 3MBits baudrate.
3. 3x GPIOs per port to control transceiver.
4. UART devices need enabled by GPIO device register.
Ji-Ze Hong (Peter Hong) (6):
USB: serial: f81232: Add F81534A support
USB: serial: f81232: Force F81534A with RS232 mode
USB: serial: f8
when overrun and flush the worker on close() &
suspend().
Cc: Oliver Neukum
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
V6:
1: Add deferred_lsr_work_needed to re-trigger when f81232_resume()
v5:
1: Source code base revert to v3 and remove all v4 changes.
2: Add se
Oliver Neukum 於 2019/4/1 下午 04:34 寫道:
On Mo, 2019-04-01 at 14:00 +0800, Ji-Ze Hong (Peter Hong) wrote:
Hi,
I am afraid there is a race condiion in this code.
@@ -315,6 +318,7 @@ static void f81232_process_read_urb(struct urb *urb)
if (lsr & UART_LS
Implement Fintek F81232 break on/off with LCR register.
It's the same with 16550A LCR register layout.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 29 +++--
1 file changed, 23 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/s
Fix error bit operation in watchdog_start()
Fixes: 14b24a88a3660 ("watchdog: f71808e_wdt: Add F81866 support")
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/watchdog/f71808e_wdt.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/driver
Separate declaration and assignment in watchdog_start()
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/watchdog/f71808e_wdt.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c
index 9a1c761258ce
Guenter Roeck 於 2019/3/22 下午 09:06 寫道:
On 3/21/19 8:36 PM, Ji-Ze Hong (Peter Hong) wrote:
Fix error bit operation in watchdog_start()
Hmm ... does that mean it never worked ? Did you test it this time ?
Sorry for lacking test procedure. I had only test the functional (reset)
, not to test
Fix error bit operation in watchdog_start()
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/watchdog/f71808e_wdt.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c
index 9a1c761258ce..9129485732c7
Hi Johan,
Johan Hovold 於 2018/2/4 上午 09:46 寫道:
On Thu, Feb 01, 2018 at 11:13:01AM +0800, Ji-Ze Hong (Peter Hong) wrote:
Our USB-To-Serial support RI/ RX remote wakeup by Modem, Fax or
other peripherals and we had tested it by following procedure with
device_set_wakeup_enable() enabled:
1
Hi Johan,
Johan Hovold 於 2018/1/30 下午 12:11 寫道:
On Mon, Jan 22, 2018 at 03:58:47PM +0800, Ji-Ze Hong (Peter Hong) wrote:
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index a054f69446fd..f3ee537d643c 100644
--- a/drivers/usb/serial/f81232.c
+++ b/drivers/usb/serial
Hi Johan,
Johan Hovold 於 2018/1/30 上午 11:57 寫道:
On Mon, Jan 22, 2018 at 03:58:45PM +0800, Ji-Ze Hong (Peter Hong) wrote:
The F81232 can do remote wakeup via RX/RI pin with pulse.
This patch will use device_set_wakeup_enable to enable this
feature.
This is a policy decision that should be
Hi Andy,
Andy Shevchenko 於 2018/1/22 下午 10:55 寫道:
On Mon, Jan 22, 2018 at 9:58 AM, Ji-Ze Hong (Peter Hong)
wrote:
The F81232 had 4 clocksource 1.846/18.46/14.77/24MHz and baud rates
can be up to 1.5Mbits with 24MHz.
F81232 Clock registers (106h)
Bit1-0: Clock source selector
Hi Oliver,
Oliver Neukum 於 2018/1/22 下午 06:06 寫道:
+static void f81232_lsr_worker(struct work_struct *work)
+{
+ struct f81232_private *priv;
+ struct usb_serial_port *port;
+ int status;
+ u8 tmp;
+
+ priv = container_of(work, struct f81232_private, lsr_work);
+
when OE.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index 96036f87b1de..46836041c50e 100644
--- a/drivers/usb/serial/f81232.c
+++ b/drivers
The F81232 can do remote wakeup via RX/RI pin with pulse.
This patch will use device_set_wakeup_enable to enable this
feature.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb
: 14.77MHz.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 105 +++-
1 file changed, 94 insertions(+), 11 deletions(-)
diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c
index 46836041c50e..bdd7f337cd5f 100644
--- a
Fix Fintek F81232 bulk_in/out size to 64/16 according to the spec.
http://html.alldatasheet.com/html-pdf/406315/FINTEK/F81232/1762/8/F81232.html
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers
Implement Fintek F81232 break on/off with LCR register.
It's the same with 16550A LCR register layout.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/serial/f8123
1, M2 as 1, 1, 0.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
V3:
1: change reg_mask type from u16 to u8.
2: change space around "{" & "}".
V2:
1: Fix for space between brace.
2: Remain the old pin control method.
Bit4: Auto direction(RTS) control (RTS pin Low when TX)
Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
V3:
1: change some BIT() operation to GENMASK().
2: change some dev_info() to dev_dbg().
V2:
1: Rea
delay with 60ms.
It'll contain BREAK status in LSR.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
V3:
1: Separate old patch into refacting and H/W disable patches.
V2:
1: f81534_check_port_hw_disabled() change return type from int to bool.
2: Add hel
In the original code, We'll read configuration in calc_num_ports()
and read again in attach(). In fact, we can move all content from
attach() to calc_num_ports() to simplify the code.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
V3:
1: First introduced in this series patches.
driver
nable (always on)
Bit2-1: Clock source selector
00: 1.846MHz.
01: 18.46MHz.
10: 24MHz.
11: 14.77MHz.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
V3:
1: Separate UART Enable bit from clock source
: Ji-Ze Hong (Peter Hong)
---
V3:
1: had not noticeable changes.
V2:
1: First introduced in this series patches.
drivers/usb/serial/f81534.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/serial/f81534.c b/drivers/usb/serial/f81534.c
index
Hi Johan,
Johan Hovold 於 2018/1/10 下午 04:49 寫道:
Normally, the communication with F81534 ep0 will take less than 1 sec
(even only some milliseconds), but It maybe take much long time with
huge loading with UART functional.
We had tested it on BurnInTest, 4 ports with 921600bps + MSR status
check
Hi Johan,
Johan Hovold 於 2018/1/9 下午 07:32 寫道:
On Thu, Jan 04, 2018 at 10:29:21AM +0800, Ji-Ze Hong (Peter Hong) wrote:
+ /*
+* We'll make tx frame error when baud rate from 384~500kps. So we'll
+* delay all tx data frame with 1bit.
+*/
+
Hi Johan,
Johan Hovold 於 2018/1/9 下午 07:08 寫道:
On Thu, Jan 04, 2018 at 10:29:17AM +0800, Ji-Ze Hong (Peter Hong) wrote:
The F81532/534 had 4 clocksource 1.846/18.46/14.77/24MHz and baud rates
can be up to 1.5Mbits with 24MHz.
This device may generate data overrun when baud rate setting to
nable (always on)
Bit2-1: Clock source selector
00: 1.846MHz.
01: 18.46MHz.
10: 24MHz.
11: 14.77MHz.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
v2:
1: Add commit message for F81534_USB_TIMEOUT
: Ji-Ze Hong (Peter Hong)
---
V2:
1: First introduced in this series patches.
drivers/usb/serial/f81534.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/usb/serial/f81534.c b/drivers/usb/serial/f81534.c
index a4666171239a..513805eeae6a 100644
--- a/drivers/usb/serial
1, M2 as 1, 1, 0.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
V2:
1: Fix for space between brace.
2: Remain the old pin control method.
drivers/usb/serial/f81534.c | 67 -
1 file changed, 66 insertions(+), 1 deletion(-)
diff --git a/d
delay with 60ms.
It'll contain BREAK status in LSR.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
V2:
1: f81534_check_port_hw_disabled() change return type from int to bool.
2: Add help function f81534_set_phy_port_register() /
f81534_get_phy_port_regi
Bit4: Auto direction(RTS) control (RTS pin Low when TX)
Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
V2:
1: Read the configure data from flash and save it to shadow clock
register.
drivers/usb/serial/f81534.c
Hi Johan,
In this code, I'm only read/write 3 registers of 0x2ae8, 0x2a90, 0x2a80,
but some register will read/write more than once. Should I change the
code from port_probe() to attach() and re-write it as:
1: read the 3 register
2: change them will 12 pin desire value
3
Hi Johan,
Johan Hovold 於 2017/12/19 上午 12:06 寫道:
On Thu, Nov 16, 2017 at 03:46:08PM +0800, Ji-Ze Hong (Peter Hong) wrote:
+static int f81534_set_port_output_pin(struct usb_serial_port *port)
+{
+ struct f81534_serial_private *serial_priv;
+ struct f81534_port_private *port_priv
Bit4: Auto direction(RTS) control (RTS pin Low when TX)
Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81534.c | 54 +++--
1 file changed, 52 insertions(+), 2 dele
delay with 60ms.
It'll contain BREAK status in LSR.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81534.c | 74 +
1 file changed, 74 insertions(+)
diff --git a/drivers/usb/serial/f81534.c b/drivers/usb/serial/f81534.c
index 30
.
10: 24MHz.
11: 14.77MHz.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81534.c | 84 -
1 file changed, 68 insertions(+), 16 deletions(-)
diff --git a/drivers/usb/serial/f81534.c b/drivers/usb/serial
x2a80 bit6
Port 3:
M2: 0x2a90 bit3, M1: 0x2a90 bit2, M0/SD: 0x2a90 bit1
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81534.c | 67 -
1 file changed, 66 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/serial/
ed-by: Lukas Redlinger
Cc: Lukas Redlinger
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_fintek.c
b/drivers/tty/serial/8250/8250_fintek.c
index c41cbb
ey().
Tested on iBASE MI802.
Cc: sta...@vger.kernel.org
Tested-by: Ji-Ze Hong (Peter Hong)
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_fintek.c
b/drivers/tty/serial/8250/
Implement Fintek f81534 break on/off with LCR register.
It's the same with 16550A LCR register layout.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81534.c | 46 +++--
1 file changed, 40 insertions(+), 6 deletions(-)
diff --
rom driver in this situration.
So we'll disable the LSR interrupt in probe() and submit the LSR worker to
clear LSR state when reported LSR error bit with bulk-in data in
f81534_process_per_serial_block().
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/seria
The Fintek F81866/F81216H support high baud rate and it's up to 1.5Mbps
with 24MHz clock source. It's also support 500Kbps via 24MHz clock too.
We'll implements clock source checking in function fintek_8250_set_termios().
Ji-Ze Hong (Peter Hong) (3):
serial: 8250_finte
The F81866 had 4 clocksource 1.8432/18.432/14.769/24MHz and baud rates can
be up to 1.5Mbits with 24MHz. We'll implements the dynamic clocksource in
fintek_8250_set_termios().
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c
This patch is fix the warning reported by smatch as following:
drivers/tty/serial/8250/8250_fintek.c:294 fintek_8250_goto_highspeed()
warn: inconsistent indenting
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
ff-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 32 ++--
1 file changed, 30 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_fintek.c
b/drivers/tty/serial/8250/8250_fintek.c
index 53ea353..f3b622f 100644
--- a/driver
on with
IO resource. So we'll add the resource check for this.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_pci.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_pci.c
b/drivers/tty/serial/8250/8250_pci.
The following 2 patches makes break control available for
Fintek F81232/F81534.
Ji-Ze Hong (Peter Hong) (2):
usb:serial: Implement Fintek F81232 break on/off
usb:serial: Implement Fintek f81534 break on/off
drivers/usb/serial/f81232.c | 40 ++--
drivers
Implement Fintek f81534 break on/off with LCR register
It's the same with 16550A LCR register layout
We'll add a shadow LCR variable to save the final LCR we
had set due to the "read ep0" operations maybe slow down all
the serial ports performance.
Signed-off-by: Ji
Implement Fintek F81232 break on/off with LCR register,
it's the same with 16550A LCR register layout.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/usb/serial/f81232.c | 40 ++--
1 file changed, 34 insertions(+), 6 deletions(-)
diff --git a/driver
Hi Johan,
Johan Hovold 於 2016/11/24 下午 11:04 寫道:
On Mon, Nov 14, 2016 at 01:37:59PM +0800, Ji-Ze Hong (Peter Hong) wrote:
This driver is for Fintek F81532/F81534 USB to Serial Ports IC.
+ }
+
+ if (size_bulk_out != F81534_WRITE_BUFFER_SIZE ||
+ size_bulk_in
1-to-4 serial ports IC
2. Support Baudrate from B50 to B115200.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
Changelog:
V12
1. Max TX change from 100 to 124 bytes.
2. Add probe() to verify endpoints & packet size.
3. Rename function names.
set/get_normal_register(
Hi Johan,
Johan Hovold 於 2016/11/2 下午 08:37 寫道:
On Fri, Oct 14, 2016 at 04:20:46PM +0800, Ji-Ze Hong (Peter Hong) wrote:
Reviewed-by: Johan Hovold
You must never add other peoples' Reviewed-by tags unless you've
explicitly been given permission to do so (e.g. "fix this min
l try to mask the parent AER
interrupt to skip it and preserve generate uncorrectable erro interrupt
normally.
Tested and verified on Ganlot PGB-8130 industrial gaming PCB
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/pci/quirks.c| 37 +
include/
onal after suspend/resume (S3, D0->D3->D0) on
Skylake platform.
The first patch will use parent AER interrupt mask to prevent generating
correctable error interrupt, the and second will prevent the IC malfunctional
after D3.
Ji-Ze Hong (Peter Hong) (2):
PCI: Add quirk for Fintek F81504/5
Fintek F81504/508/512 PCIe-to-UART/GPIO will failed to work on Intel
Skylake platform PEG PCIe port after D0->D3->D0.
This patch will prevent it into D3 mode.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/pci/quirks.c | 15 +++
1 file changed, 15 insertions(+)
diff -
1-to-4 serial ports IC
2. Support Baudrate from B50 to B115200.
Reviewed-by: Johan Hovold
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
Changelog:
V11
1. Reduce F81534_MAX_BUS_RETRY from 2000 to 20. We are only using
internal SPI bus to read flash when attach() & calc_num_ports()
() and
fintek_8250_exit_key() usage.
Suggested-by: Ricardo Ribalda Delgado
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 45 +--
1 file changed, 22 insertions(+), 23 deletions(-)
diff --git a/drivers/tty/serial/8250
mode (always on)
Level/Low: IRQ_MODE0:0
Edge/High: IRQ_MODE0:1
The following list is brief descriptions of F81865:
F81865 (0704)
9Bit(not implements with mainline)
RS485(implemented)
Suggested-by: Ricardo Ribalda Delgado
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial
= 32Byte. It can be reduce the RX
incoming interrupts.
Suggested-by: Ricardo Ribalda Delgado
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 29 ++---
1 file changed, 26 insertions(+), 3 deletions(-)
diff --git a/drivers/tty/serial/8250
operation with lot of outb()/inb().
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 73 ++-
1 file changed, 38 insertions(+), 35 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_fintek.c
b/drivers/tty/serial/8250
g. Suggest by Ricardo Ribalda Delgado.
Ji-Ze Hong (Peter Hong) (6):
serial: 8250_fintek: Refactoring read/write method
serial: 8250_fintek: Set IRQ Mode when port probed
serial: 8250_fintek: Set maximum FIFO of F81216H
serial: 8250_fintek: Add F81216 Support
serial: 8250_fintek: Add F81866
ented)
F81216AD (0216)
9Bit(not implements with mainline)
RS485(implemented)
F81216 (0208)
basically 16550A
Suggested-by: Ricardo Ribalda Delgado
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 26 --
1 file change
RS485, 128Bytes FIFO (implemented)
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 74 ---
1 file changed, 68 insertions(+), 6 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_fintek.c
b/drivers/tty/serial/8250/8250_fintek.c
Hi Ricardo,
Ricardo Ribalda Delgado 於 2016/9/1 下午 07:22 寫道:
memcpy(pdata, &probe_data, sizeof(probe_data));
- uart->port.rs485_config = fintek_8250_rs485_config;
Maybe just:
if (pdata->id != CHIP_ID_F81216)
uart->port.rs485_config = fintek_8250_rs485_config;
Instead of th
Hi Ricardo, Greg,
Ricardo Ribalda Delgado 於 2016/9/1 下午 07:17 寫道:
On one previous patch you almost rewrote theset_irq_mode function and
added the prototype. It might be a good moment to move the whole
function up.
I had try with merge the following 2 patches in local,
1: serial: 8250_fintek:
Hi Ricardo,
Ricardo Ribalda Delgado 於 2016/9/1 下午 07:16 寫道:
+static void fintek_8250_set_max_fifo(struct fintek_8250 *pdata)
+{
+ switch (pdata->pid) {
+ default: /* Default 16Bytes FIFO */
+ return;
+
+ case CHIP_ID_F81216H: /* 128Bytes FIFO */
+ si
RS485, 128Bytes FIFO (implemented)
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 75 ---
1 file changed, 69 insertions(+), 6 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_fintek.c
b/drivers/tty/serial/8250/8250_fintek.c
mode (always on)
Level/Low: IRQ_MODE0:0
Edge/High: IRQ_MODE0:1
The following list is brief descriptions of F81865:
F81865 (0704)
9Bit(not implements with mainline)
RS485(implemented)
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 11 +--
1
operation with lot of outb()/inb().
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 73 ++-
1 file changed, 38 insertions(+), 35 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_fintek.c
b/drivers/tty/serial/8250
()/fintek_8250_exit_key() usage.
Suggested-by: Ricardo Ribalda Delgado
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 36 ++-
1 file changed, 19 insertions(+), 17 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_fintek.c
b
We change the position of fintek_8250_set_irq_mode() above the
find_base_port() to eliminate the prototype define.
Signed-off-by: Ji-Ze Hong (Peter Hong)
---
drivers/tty/serial/8250/8250_fintek.c | 19 ---
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/drivers
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