Re: [PATCH v3] lib/bch: Remove VLA usage

2018-06-01 Thread Ivan Djelic
ns, shown by Ivan Djelic: > > little-endian, type sizes: int=4 long=8 longlong=8 > cpu: Intel(R) Core(TM) i5 CPU         650  @ 3.20GHz > calibration: iter=4.9143µs niter=2034 nsamples=200 m=13 t=4 > >   Buffer allocation

Re: [PATCH v2] lib/bch: Remove VLA usage

2018-05-31 Thread Ivan Djelic
ns, shown by Ivan Djelic: > > little-endian, type sizes: int=4 long=8 longlong=8 > cpu: Intel(R) Core(TM) i5 CPU         650  @ 3.20GHz > calibration: iter=4.9143µs niter=2034 nsamples=200 m=13 t=4 > >   Buffer allocation

Re: [PATCH] lib/bch: Remove VLA usage

2018-05-30 Thread Ivan Djelic
On Tue, May 29, 2018 at 03:42:07PM -0700, Kees Cook wrote: > In the quest to remove all stack VLA usage from the kernel[1], this removes > the on-stack working buffers in favor of pre-allocated working buffers > (which were already used in other places). Since these routines must > already be seria

Re: MTD NAND BCH support for 24 bits/1K of ECC correction?

2013-03-29 Thread Ivan Djelic
On Thu, Mar 28, 2013 at 10:23:01PM +, Aaron Williams wrote: > Hi all, > > I am trying to clean up our OCTEON NAND flash driver in the Linux kernel > and enable support for multi-bit ECC using BCH and am having some > issues. I am able to successfully work with NAND flash that requires 4 > b

Re: [PATCH 4/4] mtd: nand: omap2: Add data correction support

2012-10-11 Thread Ivan Djelic
On Thu, Oct 11, 2012 at 06:27:13AM +0100, Philip, Avinash wrote: (...) > > Another simple strategy could use the fact that you add a 14th zero byte to > > the 13 BCH bytes for RBL compatibility: > > RBL compatibility (14th byte) is applicable only for BCH8 ecc scheme. > > So I am planning adding

Re: [PATCH 4/4] mtd: nand: omap2: Add data correction support

2012-10-10 Thread Ivan Djelic
On Tue, Oct 09, 2012 at 01:36:50PM +0100, Philip, Avinash wrote: (...) > > There are at least 2 potential problems when reading an erased page with > > bitflips: > > > > 1. bitflip in data area and no bitflip in spare area (all 0xff) > > Your code will not perform any ECC correction. > > UBIFS do

Re: [PATCH 4/4] mtd: nand: omap2: Add data correction support

2012-10-05 Thread Ivan Djelic
On Fri, Oct 05, 2012 at 09:51:50AM +0100, Philip, Avinash wrote: > On Thu, Oct 04, 2012 at 15:51:03, Philip, Avinash wrote: > > On Thu, Oct 04, 2012 at 00:50:45, Ivan Djelic wrote: > > > On Wed, Oct 03, 2012 at 03:29:49PM +0100, Philip, Avinash wrote: > > > > EL

Re: [PATCH 3/4] ARM: OMAP2: gpmc: Add support for BCH ECC scheme

2012-10-04 Thread Ivan Djelic
On Thu, Oct 04, 2012 at 09:03:42AM +0100, Philip, Avinash wrote: (...) > > > +int gpmc_calculate_ecc_bch(int cs, const u_char *dat, u_char *ecc) > > > +{ > > > + int i, eccbchtsel; > > > + u32 nsectors, reg, bch_val1, bch_val2, bch_val3, bch_val4; > > > + > > > + if (gpmc_ecc_used != cs) > > > +

Re: [PATCH 4/4] mtd: nand: omap2: Add data correction support

2012-10-03 Thread Ivan Djelic
On Wed, Oct 03, 2012 at 03:29:49PM +0100, Philip, Avinash wrote: > ELM module can be used for error correction of BCH 4 & 8 bit. Also > support read & write page in one shot by adding custom read_page & > write_page methods. This helps in optimizing code. > > New structure member "is_elm_used" is

Re: [PATCH 3/4] ARM: OMAP2: gpmc: Add support for BCH ECC scheme

2012-10-03 Thread Ivan Djelic
On Wed, Oct 03, 2012 at 03:29:48PM +0100, Philip, Avinash wrote: > Add support for BCH ECC scheme to gpmc driver and also enabling multi > sector read/write. This helps in doing single shot NAND page read and > write. > > ECC engine configurations > BCH 4 bit support > 1. write => ECC engine confi