Re: [PATCH v1 3/3] KEYS: trusted: Introduce support for NXP CAAM-based trusted keys

2021-03-21 Thread Horia Geantă
On 3/16/2021 7:02 PM, Ahmad Fatoum wrote: [...] > +struct trusted_key_ops caam_trusted_key_ops = { > + .migratable = 0, /* non-migratable */ > + .init = trusted_caam_init, > + .seal = trusted_caam_seal, > + .unseal = trusted_caam_unseal, > + .exit = trusted_caam_exit, > +}; caam

Re: [PATCH v1 1/3] crypto: caam - add in-kernel interface for blob generator

2021-03-21 Thread Horia Geantă
On 3/16/2021 7:01 PM, Ahmad Fatoum wrote: > +int caam_encap_blob(struct caam_blob_priv *priv, const char *keymod, > + void *input, void *output, size_t length) > +{ > + u32 *desc; > + struct device *jrdev = &priv->jrdev; > + dma_addr_t dma_in, dma_out; > + struct caa

Re: [PATCH v1 0/3] KEYS: trusted: Introduce support for NXP CAAM-based trusted keys

2021-03-21 Thread Horia Geantă
On 3/16/2021 7:02 PM, Ahmad Fatoum wrote: > The Cryptographic Acceleration and Assurance Module (CAAM) is an IP core > built into many newer i.MX and QorIQ SoCs by NXP. > > Its blob mechanism can AES encrypt/decrypt user data using a unique > never-disclosed device-specific key. There has been mul

Re: [PATCH 07/10] crypto: caam: caampkc: Provide the name of the function and provide missing descriptions

2021-03-21 Thread Horia Geantă
aamalg_qi2.c:87: warning: Function parameter or member > 'xts_key_fallback' not described in 'caam_ctx' > drivers/crypto/caam/caamalg_qi2.c:87: warning: Function parameter or member > 'fallback' not described in 'caam_ctx' > > Cc: "Horia Ge

[PATCH] ARM: dts: ls1021a: mark crypto engine dma coherent

2021-03-07 Thread Horia Geantă
Crypto engine (CAAM) on LS1021A platform is configured HW-coherent, mark accordingly the DT node. Signed-off-by: Horia Geantă --- arch/arm/boot/dts/ls1021a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 007dd2bd0595

[PATCH 3/3] arm64: dts: ls1012a: mark crypto engine dma coherent

2021-03-07 Thread Horia Geantă
4: dts: ls1012a: add crypto node") Signed-off-by: Horia Geantă --- arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index 7de6b376d792..9058cfa498

[PATCH 2/3] arm64: dts: ls1043a: mark crypto engine dma coherent

2021-03-07 Thread Horia Geantă
4: dts: ls1043a: add crypto node") Link: https://lore.kernel.org/linux-crypto/fe6faa24-d8f7-d18f-adfa-44fa0caa1...@arm.com Signed-off-by: Horia Geantă --- arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043

[PATCH 0/3] arm64: dts: ls: mark crypto engine dma coherent

2021-03-07 Thread Horia Geantă
This patch set adds "dma-coherent" property to the crypto node for NXP Layerscape platforms where the IP (CAAM) is configured HW-coherent. Horia Geantă (3): arm64: dts: ls1046a: mark crypto engine dma coherent arm64: dts: ls1043a: mark crypto engine dma coherent arm64: dts: ls1

[PATCH 1/3] arm64: dts: ls1046a: mark crypto engine dma coherent

2021-03-07 Thread Horia Geantă
62a5 ("arm64: dts: add QorIQ LS1046A SoC support") Link: https://lore.kernel.org/linux-crypto/fe6faa24-d8f7-d18f-adfa-44fa0caa1...@arm.com Reported-by: Greg Ungerer Reported-by: Sascha Hauer Tested-by: Sascha Hauer Signed-off-by: Horia Geantă --- arch/arm64/boot/dts/freescale/fsl

Re: [PATCH 07/10] crypto: caam: caampkc: Provide the name of the function and provide missing descriptions

2021-03-03 Thread Horia Geantă
aamalg_qi2.c:87: warning: Function parameter or member > 'xts_key_fallback' not described in 'caam_ctx' > drivers/crypto/caam/caamalg_qi2.c:87: warning: Function parameter or member > 'fallback' not described in 'caam_ctx' > > Cc: "Horia Ge

Re: [PATCH 15/20] crypto: caam: caamalg_qi2: Supply a couple of 'fallback' related descriptions

2021-02-08 Thread Horia Geantă
:87: warning: Function parameter or member > 'fallback' not described in 'caam_ctx' > > Cc: "Horia Geantă" > Cc: Aymen Sghaier > Cc: Herbert Xu > Cc: "David S. Miller" > Cc: linux-cry...@vger.kernel.org > Signed-off-by: Lee Jones >

Re: [PATCH 14/20] crypto: caam: caampkc: Provide the name of the function

2021-02-08 Thread Horia Geantă
On 2/4/2021 1:10 PM, Lee Jones wrote: > Fixes the following W=1 kernel build warning(s): > > drivers/crypto/caam/caampkc.c:199: warning: expecting prototype for from a > given scatterlist(). Prototype was for caam_rsa_count_leading_zeros() instead > > Cc: "Horia Geant

Re: [PATCH v2] crypto: caam - Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE

2021-02-02 Thread Horia Geantă
gt; should be defined with DEFINE_DEBUGFS_ATTRIBUTE. > > Reported-by: Abaci Robot > Signed-off-by: Jiapeng Chong Reviewed-by: Horia Geantă Thanks, Horia

Re: [PATCH] crypto: caam -Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE

2021-02-01 Thread Horia Geantă
gt; should be defined with DEFINE_DEBUGFS_ATTRIBUTE. > > Reported-by: Abaci Robot > Signed-off-by: Jiapeng Chong Reviewed-by: Horia Geantă Patch title nitpick: s/crypto: caam -Replace/crypto: caam - Replace Thanks, Horia

Re: [PATCH 0/5] crypto: caam - avoid allocating memory at crypto request runtime

2020-12-10 Thread Horia Geantă
On 12/3/2020 3:35 AM, Iuliana Prodan (OSS) wrote: > From: Iuliana Prodan > > This series removes CRYPTO_ALG_ALLOCATES_MEMORY flag and > allocates the memory needed by the driver, to fulfil a > request, within the crypto request object. > The extra size needed for base extended descriptor, hw > de

Re: [RFC PATCH 0/4] crypto: add CRYPTO_TFM_REQ_DMA flag

2020-12-07 Thread Horia Geantă
On 11/26/2020 9:09 AM, Ard Biesheuvel wrote: > On Wed, 25 Nov 2020 at 22:39, Iuliana Prodan wrote: >> >> On 11/25/2020 11:16 PM, Ard Biesheuvel wrote: >>> On Wed, 25 Nov 2020 at 22:14, Iuliana Prodan (OSS) >>> wrote: From: Iuliana Prodan Add the option to allocate the crypto

Re: [PATCH] random: Don't freeze in add_hwgenerator_randomness() if stopping kthread

2020-12-02 Thread Horia Geantă
On 11/17/2019 2:57 AM, Herbert Xu wrote: > On Sun, Nov 17, 2019 at 12:01:20AM +0100, Maciej S. Szmigiero wrote: >> >> If a reader (user space) task is frozen then it is no longer waiting >> on this waitqueue - at least if I understand correctly how the freezer >> works for user space tasks, that is

crypto: caam/qi - simplify error path for context allocation

2020-11-12 Thread Horia Geantă
- >8 -- Subject: [PATCH] crypto: caam/qi - simplify error path for context allocation Wang Qing reports that IS_ERR_OR_NULL() should be matched with PTR_ERR_OR_ZERO(), not PTR_ERR(). As it turns out, the error path always returns an error code, i.e. NULL is never returned. Update the code accord

[PATCH] crypto: caam - fix printing on xts fallback allocation error path

2020-11-01 Thread Horia Geantă
quot;crypto: caam/jr - add fallback for XTS with more than 8B IV") Fixes: 83e8aa912138 ("crypto: caam/qi - add fallback for XTS with more than 8B IV") Fixes: 36e2d7cfdcf1 ("crypto: caam/qi2 - add fallback for XTS with more than 8B IV") Signed-off-by: Horia Geant

[PATCH] crypto: arm/aes-neonbs - fix usage of cbc(aes) fallback

2020-10-28 Thread Horia Geantă
algorithm. Fixes: 00b99ad2bac2 ("crypto: arm/aes-neonbs - Use generic cbc encryption path") Signed-off-by: Horia Geantă --- arch/arm/crypto/aes-neonbs-glue.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/crypto/aes-neonbs-glue.c b/arch/arm/crypto/

Re: [PATCH] crypto: arm/aes-neonbs - fix usage of cbc(aes) fallback

2020-10-28 Thread Horia Geantă
On 10/28/2020 11:07 AM, Ard Biesheuvel wrote: > On Wed, 28 Oct 2020 at 10:03, Horia Geantă wrote: >> >> Loading the module deadlocks since: >> -local cbc(aes) implementation needs a fallback and >> -crypto API tries to find one but the request_module() resolves

Re: [PATCH v2] crypto: caam - enable crypto-engine retry mechanism

2020-10-26 Thread Horia Geantă
d for the > non-crypto-API requests that are not passed through crypto-engine). > > The callback for do_batch_requests is NULL, since CAAM > doesn't support linked requests. > > Signed-off-by: Iuliana Prodan Reviewed-by: Horia Geantă Thanks, Horia

Re: [PATCH] crypto: caam - enable crypto-engine retry mechanism

2020-10-26 Thread Horia Geantă
On 10/26/2020 7:11 PM, Iuliana Prodan wrote: > On 10/26/2020 5:36 PM, Horia Geantă wrote: >> On 10/21/2020 11:07 PM, Iuliana Prodan wrote: [...] >>> +#define CRYPTO_ENGINE_MAX_QLEN (2 * (JOBR_DEPTH - THRESHOLD)) >>> + >> What's the logic behind multiplying by

Re: [PATCH] crypto: caam - enable crypto-engine retry mechanism

2020-10-26 Thread Horia Geantă
On 10/21/2020 11:07 PM, Iuliana Prodan wrote: > Use the new crypto_engine_alloc_init_and_set() function to > initialize crypto-engine and enable retry mechanism. > > Set the maximum size for crypto-engine software queue based on > Job Ring size (JOBR_DEPTH) and a threshold (reserved for the > non-

Re: [PATCH v3 00/10] crypto: caam - xts(aes) updates

2020-09-23 Thread Horia Geantă
c.c | 27 --- > drivers/crypto/caam/caamalg_qi.c | 94 +--- > drivers/crypto/caam/caamalg_qi2.c | 111 ++--- > drivers/crypto/caam/caamalg_qi2.h | 2 + > 6 files changed, 293 insertions(+), 38 deletions(-) > For the series: Reviewed-by: Horia Geantă Thanks, Horia

Re: [PATCH v2 00/12] crypto: caam - xts(aes) updates

2020-09-21 Thread Horia Geantă
On 9/21/2020 10:32 AM, Andrei Botila (OSS) wrote: > From: Andrei Botila > > This patch series fixes some problems in CAAM's implementation of xts(aes): > - CAAM until Era 9 can't process XTS with 16B IV > - CAAM can only process in hardware XTS key lengths of 16B and 32B > - These hardware lim

Re: [PATCH v2 01/12] crypto: caam/jr - add fallback for XTS with more than 8B IV

2020-09-21 Thread Horia Geantă
On 9/21/2020 10:32 AM, Andrei Botila (OSS) wrote: > +static bool xts_skcipher_ivsize(struct skcipher_request *req) > +{ > + struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req); > + unsigned int ivsize = crypto_skcipher_ivsize(skcipher); > + u64 size = 0; > + > + size = ge

Re: [PATCH 2/2] crypto: caam - support tagged keys for skcipher algorithms

2020-09-21 Thread Horia Geantă
On 9/16/2020 12:50 AM, Richard Weinberger wrote: > - Ursprüngliche Mail - >> Von: "horia geanta" How to use it with cryptsetup? I'm asking because it is not clear to me why you are not implementing a new kernel key type (KEYS subsystem) to utilize tagged keys. Many

Re: [PATCH -next v2] crypto: caam: Convert to DEFINE_SHOW_ATTRIBUTE

2020-09-20 Thread Horia Geantă
On 9/18/2020 4:30 AM, Qinglang Miao wrote: > Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. > > Signed-off-by: Qinglang Miao Reviewed-by: Horia Geantă Thanks, Horia

Re: [PATCH 2/2] crypto: caam - support tagged keys for skcipher algorithms

2020-09-15 Thread Horia Geantă
On 9/14/2020 9:38 AM, Richard Weinberger wrote: > On Thu, Jul 16, 2020 at 4:12 PM Richard Weinberger > wrote: >> >> On Mon, Jul 13, 2020 at 12:09 AM Iuliana Prodan >> wrote: >>> >>> Tagged keys are keys that contain metadata indicating what >>> they are and how to handle them using tag_object AP

Re: [PATCH RESEND 1/9] crypto: caam/jr - add fallback for XTS with more than 8B IV

2020-09-15 Thread Horia Geantă
On 9/15/2020 1:26 PM, Ard Biesheuvel wrote: > On Tue, 15 Sep 2020 at 13:02, Horia Geantă wrote: >> >> On 9/14/2020 9:20 PM, Ard Biesheuvel wrote: >>> On Mon, 14 Sep 2020 at 20:12, Horia Geantă wrote: >>>> >>>> On 9/14/2020 7:28 PM, Ard Biesheuvel

Re: [PATCH RESEND 1/9] crypto: caam/jr - add fallback for XTS with more than 8B IV

2020-09-15 Thread Horia Geantă
On 9/14/2020 9:20 PM, Ard Biesheuvel wrote: > On Mon, 14 Sep 2020 at 20:12, Horia Geantă wrote: >> >> On 9/14/2020 7:28 PM, Ard Biesheuvel wrote: >>> On Mon, 14 Sep 2020 at 19:24, Horia Geantă wrote: >>>> >>>> On 9/9/2020 1:10 AM, Herbert Xu wrote

Re: [PATCH RESEND 1/9] crypto: caam/jr - add fallback for XTS with more than 8B IV

2020-09-14 Thread Horia Geantă
On 9/14/2020 7:28 PM, Ard Biesheuvel wrote: > On Mon, 14 Sep 2020 at 19:24, Horia Geantă wrote: >> >> On 9/9/2020 1:10 AM, Herbert Xu wrote: >>> On Tue, Sep 08, 2020 at 01:35:04PM +0300, Horia Geantă wrote: >>>> >>>>> Just go with the get_unal

Re: [PATCH RESEND 1/9] crypto: caam/jr - add fallback for XTS with more than 8B IV

2020-09-14 Thread Horia Geantă
On 9/9/2020 1:10 AM, Herbert Xu wrote: > On Tue, Sep 08, 2020 at 01:35:04PM +0300, Horia Geantă wrote: >> >>> Just go with the get_unaligned unconditionally. >> >> Won't this lead to sub-optimal code for ARMv7 >> in case the IV is aligned? > > If thi

Re: [PATCH RESEND 1/9] crypto: caam/jr - add fallback for XTS with more than 8B IV

2020-09-08 Thread Horia Geantă
On 8/21/2020 6:47 AM, Herbert Xu wrote: > On Thu, Aug 06, 2020 at 07:35:43PM +0300, Andrei Botila wrote: >> >> +static bool xts_skcipher_ivsize(struct skcipher_request *req) >> +{ >> +struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req); >> +unsigned int ivsize = crypto_skcipher_i

Re: [PATCH RESEND 1/9] crypto: caam/jr - add fallback for XTS with more than 8B IV

2020-08-21 Thread Horia Geantă
On 8/21/2020 6:47 AM, Herbert Xu wrote: > On Tue, Aug 11, 2020 at 05:30:41PM +0300, Horia Geantă wrote: >> >>> + if (IS_ERR(fallback)) { >>> + pr_err("Failed to allocate %s fallback: %ld\n", >>> +

Re: [PATCH 19/22] crypto: inside-secure - add check for xts input length equal to zero

2020-08-11 Thread Horia Geantă
On 8/10/2020 8:03 PM, Eric Biggers wrote: > On Mon, Aug 10, 2020 at 05:33:39PM +0300, Horia Geantă wrote: >> On 8/10/2020 4:45 PM, Herbert Xu wrote: >>> On Mon, Aug 10, 2020 at 10:20:20AM +, Van Leeuwen, Pascal wrote: >>>> >>>> With all due respect

Re: [PATCH RESEND 4/9] crypto: caam/jr - add support for more XTS key lengths

2020-08-11 Thread Horia Geantă
On 8/6/2020 7:36 PM, Andrei Botila (OSS) wrote: > @@ -1790,7 +1792,9 @@ static inline int skcipher_crypt(struct > skcipher_request *req, bool encrypt) > if (!req->cryptlen) > return 0; > > - if (ctx->fallback && xts_skcipher_ivsize(req)) { > + if (ctx->fallback && (xt

Re: [PATCH RESEND 1/9] crypto: caam/jr - add fallback for XTS with more than 8B IV

2020-08-11 Thread Horia Geantă
On 8/6/2020 7:36 PM, Andrei Botila (OSS) wrote: > @@ -3344,12 +3382,30 @@ static int caam_cra_init(struct crypto_skcipher *tfm) > struct caam_skcipher_alg *caam_alg = > container_of(alg, typeof(*caam_alg), skcipher); > struct caam_ctx *ctx = crypto_skcipher_ctx(tfm); > +

Re: [PATCH 19/22] crypto: inside-secure - add check for xts input length equal to zero

2020-08-10 Thread Horia Geantă
On 8/10/2020 4:45 PM, Herbert Xu wrote: > On Mon, Aug 10, 2020 at 10:20:20AM +, Van Leeuwen, Pascal wrote: >> >> With all due respect, but this makes no sense. > > I agree. This is a lot of churn for no gain. > I would say the gain is that all skcipher algorithms would behave the same when i

[PATCH] ARM: multi_v7_defconfig: enable caam crypto module

2020-07-27 Thread Horia Geantă
caam crypto module is included in several ARMv7-based SoCs from i.MX, Layerscape, Vybrid families. Signed-off-by: Horia Geantă --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig

[PATCH v3 1/3] dt-bindings: crypto: fsl-sec4: add snvs clock to pwrkey

2020-07-23 Thread Horia Geantă
enabled). Also see commit ec2a844ef7c1 ("ARM: dts: imx7s: add snvs rtc clock") for a similar fix. Signed-off-by: André Draszik Acked-by: Rob Herring Reviewed-by: Horia Geantă Signed-off-by: Horia Geantă --- .../devicetree/bindings/crypto/fsl-sec4.txt | 17 +

[PATCH v3 2/3] Input: snvs_pwrkey - enable snvs clock as needed

2020-07-23 Thread Horia Geantă
er. Signed-off-by: André Draszik Reviewed-by: Horia Geantă Signed-off-by: Horia Geantă --- drivers/input/keyboard/snvs_pwrkey.c | 28 +++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/input/keyboard/snvs_pwrkey.c b/drivers/input/keyboard/snvs_pw

[PATCH v3 3/3] Input: snvs_pwrkey - only IRQ_HANDLED for our own events

2020-07-23 Thread Horia Geantă
ystem will assume the interrupt was handled successfully even though it wasn't at all. Signed-off-by: André Draszik Reviewed-by: Horia Geantă Signed-off-by: Horia Geantă --- drivers/input/keyboard/snvs_pwrkey.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git

[PATCH v3 0/3] input: i.MX snvs powerkey updates

2020-07-23 Thread Horia Geantă
Hi Herbert, Dmitry, This is a resend of v2 patches 1,5,6 that were not picked up https://lore.kernel.org/linux-input/20200225161201.1975-1-...@andred.net with collecting Acked-by, Reviewed-by. I skipped Robin's Reviewed-by since I prefer avoiding misintepreting the discussion between him and Andr

Re: [PATCH 6/7] crypto: caam - add more RNG hw error codes

2020-07-22 Thread Horia Geantă
On 7/22/2020 3:15 PM, Horia Geantă wrote: > In some cases, e.g. when TRNG is not properly configured, > the RNG module could issue a "Hardware error" at runtime. > > "Continuos check" error is emitted when some of the BISTs fail. > > Signed-off-by: Horia

[PATCH 5/7] crypto: caam/jr - remove incorrect reference to caam_jr_register()

2020-07-22 Thread Horia Geantă
From: Dan Douglass caam_jr_register() function is no longer part of the driver since commit 6dad41158db6 ("crypto: caam - Remove unused functions from Job Ring") This patch removes a comment referencing the function. Signed-off-by: Dan Douglass Signed-off-by: Horia Geantă --- driv

[PATCH 3/7] crypto: caam/qi2 - create ahash shared descriptors only once

2020-07-22 Thread Horia Geantă
am/jr top-level library) commit 9a2537d0ebc9 ("crypto: caam - create ahash shared descriptors only once") Signed-off-by: Horia Geantă --- drivers/crypto/caam/caamalg_qi2.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/caam/caamalg_qi2.c b/driv

[PATCH 7/7] crypto: caam/qi2 - add module alias

2020-07-22 Thread Horia Geantă
Add a module alias, to enable udev-based module autoloading: $ modinfo -F alias drivers/crypto/caam/dpaa2_caam.ko fsl-mc:v1957ddpseci Signed-off-by: Horia Geantă --- drivers/crypto/caam/caamalg_qi2.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/crypto/caam/caamalg_qi2.c b

[PATCH 1/7] crypto: caam - remove deadcode on 32-bit platforms

2020-07-22 Thread Horia Geantă
From: Franck LENORMAND When building on a platform with a 32bit DMA address, taking the upper 32 bits makes no sense. Signed-off-by: Franck LENORMAND Signed-off-by: Horia Geantă --- drivers/crypto/caam/regs.h | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a

[PATCH 6/7] crypto: caam - add more RNG hw error codes

2020-07-22 Thread Horia Geantă
In some cases, e.g. when TRNG is not properly configured, the RNG module could issue a "Hardware error" at runtime. "Continuos check" error is emitted when some of the BISTs fail. Signed-off-by: Horia Geantă Signed-off-by: Horia Geantă --- drivers/crypto/caam/error.c | 3

[PATCH 2/7] crypto: caam/qi2 - fix error reporting for caam_hash_alloc

2020-07-22 Thread Horia Geantă
Fix error reporting when preparation of an hmac algorithm for registration fails: print the hmac algorithm name, not the unkeyed hash algorithm name. Signed-off-by: Horia Geantă --- drivers/crypto/caam/caamalg_qi2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers

[PATCH 4/7] crypto: caam - silence .setkey in case of bad key length

2020-07-22 Thread Horia Geantă
In case of bad key length, driver emits "key size mismatch" messages, but only for xts(aes) algorithms. Reduce verbosity by making them visible only when debugging. This way crypto fuzz testing log cleans up a bit. Signed-off-by: Horia Geantă --- drivers/crypto/caam/caamalg

[PATCH 0/7] crypto: caam - updates for 5.9

2020-07-22 Thread Horia Geantă
Horia Geantă (5): crypto: caam/qi2 - fix error reporting for caam_hash_alloc crypto: caam/qi2 - create ahash shared descriptors only once crypto: caam - silence .setkey in case of bad key length crypto: caam - add more RNG hw error codes crypto: caam/qi2 - add module alias drivers/crypto

Re: [PATCH -next] crypto: caam: Convert to DEFINE_SHOW_ATTRIBUTE

2020-07-20 Thread Horia Geantă
On 7/16/2020 12:00 PM, Qinglang Miao wrote: > From: Liu Shixin > > Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. > > Signed-off-by: Liu Shixin Reviewed-by: Horia Geantă This patch depends on linux-next commit 4d4901c6d748 ("seq_file: switch over direct seq_

Re: [PATCH 2/2] crypto: caam - support tagged keys for skcipher algorithms

2020-07-16 Thread Horia Geantă
On 7/16/2020 2:53 PM, Herbert Xu wrote: > On Thu, Jul 16, 2020 at 01:35:51PM +0300, Horia Geantă wrote: >> >> This patch set adds support only for some AES-based algorithms. >> However, going further the plan is to add all keyed algorithms >> supported by caam. >>

Re: [PATCH 2/2] crypto: caam - support tagged keys for skcipher algorithms

2020-07-16 Thread Horia Geantă
On 7/16/2020 10:36 AM, Herbert Xu wrote: > On Mon, Jul 13, 2020 at 01:05:36AM +0300, Iuliana Prodan wrote: >> Tagged keys are keys that contain metadata indicating what >> they are and how to handle them using tag_object API. >> >> Add support, for tagged keys, to skcipher algorithms by >> adding n

Re: [PATCH 1/2] crypto: caam - add tag object functionality

2020-07-16 Thread Horia Geantă
> - retrieve metadata: get tag object header configuration, black key > configuration or tag object data. > > This API expects that the object (the actual data) from a tag object > to be a buffer (defined by address and size). > > Signed-off-by: Franck LENORMAND Signed-off-b

[PATCH v4 2/5] ARM: dts: imx6sl: fix rng node

2020-07-15 Thread Horia Geantă
imx6sl SoC") Signed-off-by: Horia Geantă --- arch/arm/boot/dts/imx6sl.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 1c7180f28539..91a8c54d5e11 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/

[PATCH v4 3/5] ARM: dts: imx6sll: add rng

2020-07-15 Thread Horia Geantă
Add node for the RNGB block. Signed-off-by: Horia Geantă --- arch/arm/boot/dts/imx6sll.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi index fb5d3bc50c6b..0b622201a1f3 100644 --- a/arch/arm/boot/dts/imx6sll.dtsi

[PATCH v4 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs

2020-07-15 Thread Horia Geantă
) crypto accelerator and this block and RNGB are independent. Signed-off-by: Horia Geantă Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt b/Documentation/devicet

[PATCH v4 4/5] ARM: dts: imx6ull: add rng

2020-07-15 Thread Horia Geantă
Add node for the RNGB block. Signed-off-by: Horia Geantă Reviewed-by: Marco Felsch --- arch/arm/boot/dts/imx6ull.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index fcde7f77ae42..9bf67490ac49 100644 --- a/arch

[PATCH v4 5/5] hwrng: imx-rngc: enable driver for i.MX6

2020-07-15 Thread Horia Geantă
i.MX6 SL, SLL, ULL, ULZ SoCs have an RNGB block. Since imx-rngc driver supports also rngb, let's enable it for these SoCs too. Signed-off-by: Horia Geantă Reviewed-by: Martin Kaiser Reviewed-by: Marco Felsch --- drivers/char/hw_random/Kconfig | 2 +- 1 file changed, 1 insertion(

[PATCH v4 0/5] hwrng: add support for i.MX6 rngb

2020-07-15 Thread Horia Geantă
with "fsl,imx25-rngb" -collected Reviewed-by v2 -update rngb DT binding with compatible strings for i.MX6 SoCs Horia Geantă (5): dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs ARM: dts: imx6sl: fix rng node ARM: dts: imx6sll: add rng ARM: dts: imx6ull: add rng hwrng: imx

Re: [PATCH v3 5/5] hwrng: imx-rngc: enable driver for i.MX6

2020-07-14 Thread Horia Geantă
On 7/14/2020 3:48 PM, Arnd Bergmann wrote: > On Tue, Jul 14, 2020 at 2:39 PM Horia Geantă wrote: >> diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig >> index 8478eb757f3c..98f95a09ce55 100644 >> --- a/drivers/char/hw_random/Kconfig >> +

[PATCH v3 5/5] hwrng: imx-rngc: enable driver for i.MX6

2020-07-14 Thread Horia Geantă
i.MX6 SL, SLL, ULL, ULZ SoCs have an RNGB block. Since imx-rngc driver supports also rngb, let's enable it for these SoCs too. Signed-off-by: Horia Geantă Reviewed-by: Martin Kaiser Reviewed-by: Marco Felsch --- drivers/char/hw_random/Kconfig| 2 +- drivers/char/hw_random/imx-rngc.

[PATCH v3 2/5] ARM: dts: imx6sl: fix rng node

2020-07-14 Thread Horia Geantă
imx6sl SoC") Signed-off-by: Horia Geantă --- arch/arm/boot/dts/imx6sl.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 1c7180f28539..91a8c54d5e11 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/

[PATCH v3 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs

2020-07-14 Thread Horia Geantă
) crypto accelerator and this block and RNGB are independent. Signed-off-by: Horia Geantă --- Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt b/Documentation/devicetree/bindings/r

[PATCH v3 4/5] ARM: dts: imx6ull: add rng

2020-07-14 Thread Horia Geantă
Add node for the RNGB block. Signed-off-by: Horia Geantă Reviewed-by: Marco Felsch --- arch/arm/boot/dts/imx6ull.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index fcde7f77ae42..9bf67490ac49 100644 --- a/arch

[PATCH v3 0/5] hwrng: add support for i.MX6 rngb

2020-07-14 Thread Horia Geantă
2 -update rngb DT binding with compatible strings for i.MX6 SoCs Horia Geantă (5): dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs ARM: dts: imx6sl: fix rng node ARM: dts: imx6sll: add rng ARM: dts: imx6ull: add rng hwrng: imx-rngc: enable driver for i.MX6 Documentation/devicetre

[PATCH v3 3/5] ARM: dts: imx6sll: add rng

2020-07-14 Thread Horia Geantă
Add node for the RNGB block. Signed-off-by: Horia Geantă --- arch/arm/boot/dts/imx6sll.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi index fb5d3bc50c6b..0b622201a1f3 100644 --- a/arch/arm/boot/dts/imx6sll.dtsi

Re: [PATCH v2 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs

2020-07-14 Thread Horia Geantă
On 7/14/2020 3:03 AM, Rob Herring wrote: > On Sun, Jun 21, 2020 at 05:56:54PM +0300, Horia Geantă wrote: >> RNGB block is found in some i.MX6 SoCs - 6SL, 6SLL, 6ULL, 6ULZ. >> Add corresponding compatible strings. >> >> Note: >> >> Several NXP SoC from Q

Re: [PATCH V3 0/3] ARM: imx: move cpu code to drivers/soc/imx

2020-07-05 Thread Horia Geantă
On 7/3/2020 3:25 PM, Peng Fan wrote: > Sorry to break LS1021A. But I wonder why i.MX code would affect LS? > imx_soc_device_init() was modified to be called for all SoCs under ARCH_MXC. multi_v7_defconfig, which is used for LS1021A, selects ARCH_MXC. Previously imx_soc_device_init() was called on

Re: [PATCH V3 0/3] ARM: imx: move cpu code to drivers/soc/imx

2020-07-03 Thread Horia Geantă
On 5/20/2020 9:01 AM, Peng Fan wrote: > From: Peng Fan > > V3: > Rebased to latest next tree > Resolved the conflicts with vf610 soc patch > > V2: > Keep i.MX1/2/3/5 cpu type for completness > Correct return value in patch 1/3 > use CONFIG_ARM to guard compile soc-imx.c in patch 3/3 > > V1

[PATCH v2 2/5] ARM: dts: imx6sl: fix rng node

2020-06-21 Thread Horia Geantă
imx6sl SoC") Signed-off-by: Horia Geantă --- arch/arm/boot/dts/imx6sl.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 911d8cf77f2c..0339a46fa71c 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/

[PATCH v2 0/5] hwrng: add support for i.MX6 rngb

2020-06-21 Thread Horia Geantă
nternally relying on RNGB as source of randomness. On the other hand, the i.MX6 SoCs with RNGB have a DCP (Data Co-Processor) crypto accelerator and this block and RNGB are independent. Changelog: -update rngb DT binding with compatible strings for i.MX6 SoCs Horia Geantă (5): dt-bindings: rng

[PATCH v2 4/5] ARM: dts: imx6ull: add rng

2020-06-21 Thread Horia Geantă
Add node for the RNGB block. Signed-off-by: Horia Geantă --- arch/arm/boot/dts/imx6ull.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index fcde7f77ae42..9bf67490ac49 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi

[PATCH v2 3/5] ARM: dts: imx6sll: add rng

2020-06-21 Thread Horia Geantă
Add node for the RNGB block. Signed-off-by: Horia Geantă --- arch/arm/boot/dts/imx6sll.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi index edd3abb9a9f1..1c5dbccca013 100644 --- a/arch/arm/boot/dts/imx6sll.dtsi

[PATCH v2 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs

2020-06-21 Thread Horia Geantă
) crypto accelerator and this block and RNGB are independent. Signed-off-by: Horia Geantă --- Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt b/Documentation/devicetree/bindings/r

[PATCH v2 5/5] hwrng: imx-rngc: enable driver for i.MX6

2020-06-21 Thread Horia Geantă
i.MX6 SL, SLL, ULL, ULZ SoCs have an RNGB block. Since imx-rngc driver supports also rngb, let's enable it for these SoCs too. Signed-off-by: Horia Geantă --- drivers/char/hw_random/Kconfig| 2 +- drivers/char/hw_random/imx-rngc.c | 3 +++ 2 files changed, 4 insertions(+), 1 del

Re: [PATCH 4/4] hwrng: imx-rngc: enable driver for i.MX6

2020-06-21 Thread Horia Geantă
On 6/20/2020 12:49 AM, Fabio Estevam wrote: > On Fri, Jun 19, 2020 at 6:46 PM Fabio Estevam wrote: > >> If in the future more SoCs will use this IP, then we will need to keep >> extending this list over and over again. >> >> Maybe you could use: >> >> depends on MACH_IMX || COMPILE_TEST > > MACH

[PATCH 2/4] ARM: dts: imx6sll: add rng

2020-06-19 Thread Horia Geantă
Add node for the RNGB block. Signed-off-by: Horia Geantă --- arch/arm/boot/dts/imx6sll.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi index edd3abb9a9f1..e634cd45086b 100644 --- a/arch/arm/boot/dts/imx6sll.dtsi

[PATCH 4/4] hwrng: imx-rngc: enable driver for i.MX6

2020-06-19 Thread Horia Geantă
i.MX6 SL, SLL, ULL, ULZ SoCs have an RNGB block. Since imx-rngc driver supports also rngb, let's enable it for these SoCs too. Signed-off-by: Horia Geantă --- drivers/char/hw_random/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/char/hw_random/Kcon

[PATCH 3/4] ARM: dts: imx6ull: add rng

2020-06-19 Thread Horia Geantă
Add node for the RNGB block. Signed-off-by: Horia Geantă --- arch/arm/boot/dts/imx6ull.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index fcde7f77ae42..70cc098adeee 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi

[PATCH 0/4] hwrng: add support for i.MX6 rngb

2020-06-19 Thread Horia Geantă
;s tightly related to the caam "job ring" interface. Horia Geantă (4): ARM: dts: imx6sl: fix rng node ARM: dts: imx6sll: add rng ARM: dts: imx6ull: add rng hwrng: imx-rngc: enable driver for i.MX6 arch/arm/boot/dts/imx6sl.dtsi | 2 ++ arch/arm/boot/dts/imx6sll.dtsi | 7 ++

[PATCH 1/4] ARM: dts: imx6sl: fix rng node

2020-06-19 Thread Horia Geantă
for imx6sl SoC") Signed-off-by: Horia Geantă --- arch/arm/boot/dts/imx6sl.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 911d8cf77f2c..1f0f250ee175 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/

Re: [PATCH] crypto: caam/qi2: remove redundant assignment to ret

2020-06-18 Thread Horia Geantă
On 6/18/2020 2:00 PM, Herbert Xu wrote: > On Thu, Jun 18, 2020 at 01:54:55PM +0300, Horia Geantă wrote: >> >> The proper fix would be updating the ahash_finup_no_ctx() function >> to return the specific error code: >> return ret; >> instead of returning -ENOM

Re: [PATCH] crypto: caam/qi2: remove redundant assignment to ret

2020-06-18 Thread Horia Geantă
On 6/11/2020 6:39 PM, Colin King wrote: > From: Colin Ian King > > The variable ret is being assigned a value that is never read, the > error exit path via label 'unmap' returns -ENOMEM anyhow, so assigning > ret with -ENOMEM is redundamt. > > Addresses-Coverity: ("Unused value") > Signed-off-by

Re: [PATCH] crypto: caam/qi2: remove redundant assignment to ret

2020-06-18 Thread Horia Geantă
On 6/18/2020 10:58 AM, Herbert Xu wrote: > On Thu, Jun 11, 2020 at 04:39:34PM +0100, Colin King wrote: >> From: Colin Ian King >> >> The variable ret is being assigned a value that is never read, the >> error exit path via label 'unmap' returns -ENOMEM anyhow, so assigning >> ret with -ENOMEM is r

Re: [PATCH v2 1/1] crypto: caam - fix typos

2020-06-04 Thread Horia Geantă
On 6/4/2020 1:40 PM, Heinrich Schuchardt wrote: > Fix CAAM related typos. > > Signed-off-by: Heinrich Schuchardt Reviewed-by: Horia Geantă Thanks, Horia

Re: [PATCH 1/1] crypto: caam - fix typo

2020-06-04 Thread Horia Geantă
On 6/4/2020 5:41 AM, Heinrich Schuchardt wrote: > %s/suppying/supplying/ > This is good since it's not detected by the default kernel spellchecker. Would you be willing to append also the detected typos? CHECK: 'interrrupt' may be misspelled - perhaps 'interrupt'? #57: FILE: drivers/crypto/caam/

Re: [PATCH v2] crypto: caam/qi2 - add support for dpseci_reset()

2020-06-03 Thread Horia Geantă
On 6/3/2020 11:47 AM, Andrei Botila (OSS) wrote: > From: Andrei Botila > > Add support for dpseci_reset() command for DPSECI objects. > For DPSECI DPAA2 objects with version lower than v5.4 reset command > was broken in MC f/w. > > Signed-off-by: Andrei Botila Revi

Re: [PATCH] crypto: caam - add clock info for VFxxx SoCs

2020-06-02 Thread Horia Geantă
On 6/2/2020 2:07 AM, Andrey Smirnov wrote: > Add a small bit of plumbing necessary to use CAAM on VFxxx SoCs. > > Signed-off-by: Andrey Smirnov > Cc: Chris Healy > Cc: Horia Geantă > Cc: Herbert Xu > Cc: Fabio Estevam > Cc: linux-...@nxp.com > Cc: linux-cry...@

Re: [PATCH] crypto: caam/qi2 - add support for dpseci_reset()

2020-05-28 Thread Horia Geantă
On 5/28/2020 2:05 PM, Andrei Botila (OSS) wrote: > @@ -4698,6 +4698,9 @@ static void dpaa2_dpseci_free(struct dpaa2_caam_priv > *priv) > struct device *dev = priv->dev; > struct fsl_mc_device *ls_dev = to_fsl_mc_device(dev); > > + if (DPSECI_VER(priv->major_ver, priv->minor_ver)

Re: [PATCH] crypto: engine - do not requeue in case of fatal error

2020-05-20 Thread Horia Geantă
ore, these errors might be fatal error, so we shouldn’t > requeue the request. This will just be pass back and forth between > crypto-engine and hardware. > > Fixes: 6a89f492f8e5 ("crypto: engine - support for parallel requests based on > retry mechanism") > Signed-of

Re: [PATCH] crypto: caam - make soc match data optional

2020-05-18 Thread Horia Geantă
dingly, and so will CAAM driver and DT node. I don't have a board at hand, so patch below is not tested. Horia -- >8 -- Subject: [PATCH] clk: imx: vf610: add CAAM clock According to Vybrid Security RM, CCM_CCGR11[CG176] can be used to gate CAAM ipg clock. Signed-off-by: Hori

[PATCH] arm64: dts: ls1028a: add crypto node

2019-06-10 Thread Horia Geantă
LS1028A has a SEC v5.0 compatible security engine. Signed-off-by: Horia Geantă --- Tested with "arm-smmu.disable_bypass=0" kernel boot parameter, since ICID (Isolation Context ID, out of which ARM SMMU stream ID is derived) programming and DT fix-up support hasn't been adde

[PATCH RESEND v3] crypto: caam - add missing put_device() call

2019-03-01 Thread Horia Geantă
add ablkcipher and authenc algorithms") Reviewed-by: Horia Geantă Signed-off-by: Wen Yang --- Looks like previous versions, for some unknown reason, did not reach the mailing lists. Resending v3 with the addition of a 2nd Fixes and Reviewed-by tags, cf. https://lkml.org/lkml/2019/2/11/383

[PATCH] soc: fsl: guts: make fsl_guts_get_svr() static

2019-02-21 Thread Horia Geantă
The export of fsl_guts_get_svr() is a left-over, it's currently used only internally and users needing SoC information should use the generic soc_device infrastructure. Signed-off-by: Horia Geantă --- drivers/soc/fsl/guts.c | 3 +-- include/linux/fsl/guts.h | 2 -- 2 files chang

[PATCH RESEND] crypto: caam - move shared symbols in a common location

2019-01-10 Thread Horia Geantă
d by these drivers in a common location. The only existing possibility is error.c file (note that naming doesn't help and should probably change). Fixes: 52813ab24959 ("crypto: caam/qi2 - avoid double export") Reported-by: Arnd Bergmann Signed-off-by: Horia Geantă --- Resending to fi

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