Hi Sascha,
On Tue, Sep 29, 2020 at 03:30:05AM +0200, Sasha Levin wrote:
> From: Helmut Grohne
>
> [ Upstream commit edecfa98f602a597666e3c5cab2677ada38d93c5 ]
>
> Documentation/devicetree/bindings/net/dsa/dsa.txt says that the phy-mode
> property should be specified on port n
Hi,
On Tue, Jul 30, 2019 at 05:43:37AM -0600, Naga Sureshkumar Relli wrote:
> Add driver for arm pl353 static memory controller nand interface.
> This controller is used in Xilinx Zynq SoC for interfacing the
> NAND flash memory.
Is there a reason that you dropped me from the Cc list? If you Cc m
uot;)
Link: https://lore.kernel.org/lkml/20190618120719.a4kgyiuljm5uivfq@laureti-dev/
Link:
https://lore.kernel.org/lkml/alpine.deb.2.21.1908152227590.1...@nanos.tec.linutronix.de/
Signed-off-by: Helmut Grohne
---
drivers/clocksource/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Hi T
This reverts commit dfc82faad72520769ca146f857e65c23632eed5a.
The commit effectively makes ARM_TIMER_SP804 depend on COMPILE_TEST,
which makes it unselectable for practical uses.
Link: https://lore.kernel.org/lkml/20190618120719.a4kgyiuljm5uivfq@laureti-dev/
Signed-off-by: Helmut Grohne
Thank you for the quick update.
On Tue, Jun 25, 2019 at 06:46:30AM +0200, Naga Sureshkumar Relli wrote:
> -> Tested Micron MT29F2G08ABAEAWP (On-die capable) and AMD/Spansion S34ML01G1.
I tested the v17 series with the MT29F2G08ABAEAWP. I can now mount
existing jffs2 volumes without issues.
When
On Tue, Jun 25, 2019 at 06:46:29AM +0200, Naga Sureshkumar Relli wrote:
> --- a/drivers/mtd/nand/raw/nand_micron.c
> +++ b/drivers/mtd/nand/raw/nand_micron.c
> @@ -500,8 +500,11 @@ static int micron_nand_init(struct nand_chip *chip)
> chip->ecc.size = 512;
> chip->ecc.st
Hi,
On Mon, Jun 17, 2019 at 02:50:02AM -0600, Naga Sureshkumar Relli wrote:
> Add driver for arm pl353 static memory controller nand interface with
> HW ECC support. This controller is used in Xilinx Zynq SoC for
> interfacing the NAND flash memory.
Thank you for the update.
> -> Tested Micron M
On Thu, May 09, 2019 at 01:10:35PM +0200, Daniel Lezcano wrote:
> From: David Abdurachmanov
>
> This is only used on arm and arm64 platforms. Add COMPILE_TEST option.
This patch breaks selecting CONFIG_ARM_TIMER_SP804 here. I don't quite
understand why, but commit dfc82faad72520769ca146f857e65c2
Hi Naga,
On Thu, Jun 13, 2019 at 10:18:00AM +, Naga Sureshkumar Relli wrote:
> I spent much of time to address all your comments.
> All are addressed and tested. except the above one(address offset calculation)
> I didn't see any issue with the address calculation.
Let me first point out that
On Mon, Apr 29, 2019 at 11:31:14AM +, Naga Sureshkumar Relli wrote:
> But just wanted to know, do you see issues with these __force and __iomem
> castings?
I only see a minor issue: They're (deliberately) lengthy. Using many of
them diverts attention of the reader. Therefore, my proposal atte
On Wed, Apr 24, 2019 at 05:04:38AM +, Naga Sureshkumar Relli wrote:
> > You previously used cond_resched (via nand_wait_ready) here. Why did you
> > change it to
> > cpu_relax()?
> I just replicated the pl353_wait_for_ecc_done() API definition.
> But did you see any issue with this?
> Anyway I
Without much knowledge of the nand framework, I attempted reviewing the
code. Hope this helps.
Helmut
On Mon, Apr 15, 2019 at 04:40:13PM +0530, Naga Sureshkumar Relli wrote:
> diff --git a/drivers/mtd/nand/raw/pl353_nand.c
> b/drivers/mtd/nand/raw/pl353_nand.c
> new file mode 100644
> index
WARNING: This driver might brick the hardware. See below.
Hi Naga,
On Mon, Apr 15, 2019 at 04:40:13PM +0530, Naga Sureshkumar Relli wrote:
> Changes in v14:
> - Removed legacy hooks as per Miquel comments
Thank you for the update.
> +static inline int pl353_wait_for_dev_ready(struct nand_chip
Hi Naga,
On Wed, Mar 27, 2019 at 09:13:59AM +, Naga Sureshkumar Relli wrote:
> It's a on-die ECC capable device. Did u mentioned nand-ecc-mode = "on-die" in
> dts.
> The same part I tested by mentioning "on-die" property in dts and it worked
> for me.
> Please share the dts entries for NAND.
On Sat, Feb 09, 2019 at 12:07:27PM +0530, Naga Sureshkumar Relli wrote:
> +static void pl353_nfc_force_byte_access(struct nand_chip *chip,
> + bool force_8bit)
> +{
> + struct pl353_nand_controller *xnfc =
> + container_of(chip, struct pl353_nand_
On Tue, Aug 07, 2018 at 11:10:14AM +0530, Naga Sureshkumar Relli wrote:
> Add driver for arm pl353 static memory controller nand interface with
> HW ECC support. This controller is used in Xilinx Zynq SoC for
> interfacing the NAND flash memory.
>
> Signed-off-by: Naga Sureshkumar Relli
> ---
> C
On Wed, Mar 07, 2018 at 04:39:47PM +0100, Arnd Bergmann wrote:
> - Helmut Grohne has done the work to add tile-gx to debian
>rebootstrap, and send several patches, as seen in
>https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=823167
>However, I could find no informa
Hi,
I didn't find out whom to report this bug to and thus report to
linux-kernel@vger.kernel.org as described in
http://kernel.org/pub/linux/docs/lkml/reporting-bugs.html.
I'm posting from outside, so please CC me.
[1] The description about seccomp is outdated in some arch/*/Kconfig
files.
18 matches
Mail list logo
