L-2.0-only
> /*
> - * Hisilicon SoC reset code
> + * HiSilicon SoC reset code
>*
> - * Copyright (c) 2014 Hisilicon Ltd.
> + * Copyright (c) 2014 HiSilicon Ltd.
>* Copyright (c) 2014 Linaro Ltd.
>*
>* Author: Haojian Zhuang
>
Acked-by: Haojian Zhuang
yright (c) 2012-2013 Hisilicon Ltd.
> + * Copyright (c) 2012-2013 HiSilicon Ltd.
>* Copyright (c) 2012-2013 Linaro Ltd.
>*
>* Author: Haojian Zhuang
> diff --git a/arch/arm/mach-hisi/hotplug.c b/arch/arm/mach-hisi/hotplug.c
> index 5c5f255..c517941 100644
> -
/am33xx-l4.dtsi | 2 +-
> drivers/pinctrl/pinctrl-single.c | 11 +--
> include/dt-bindings/pinctrl/omap.h | 2 +-
> 3 files changed, 11 insertions(+), 4 deletions(-)
>
> --
> 2.25.1
>
Acked-by: Haojian Zhuang
,
> nconfs, sizeof(struct pcs_conf_vals),
> @@ -1056,9 +1056,12 @@ static int pcs_parse_one_pinctrl_entry(struct
> pcs_device *pcs,
>
> if (PCS_HAS_PINCONF && function) {
> res = pcs_parse_pinconf(pcs, np, function, map);
> - if (res)
> + if (res == 0)
> + *num_maps = 2;
> + else if (res == -ENOTSUPP)
> + *num_maps = 1;
> + else
> goto free_pingroups;
> - *num_maps = 2;
> } else {
> *num_maps = 1;
> }
> --
> 2.25.1
Tested-by: Haojian Zhuang
On Tue, 2015-08-25 at 16:37 +0100, Leif Lindholm wrote:
> On Tue, Aug 25, 2015 at 04:51:22PM +0200, Ard Biesheuvel wrote:
> > >>Arm kernel should either fetch memory information from
> > >>efi or DT.
> > >
> > > Absolutely.
> > >
> > >>Currently arm kernel fetch both efi memory informat
On Wed, 2015-08-26 at 00:00 +0800, Leo Yan wrote:
> On Tue, Aug 25, 2015 at 09:43:14PM +0800, Haojian Zhuang wrote:
> > On Tue, 2015-08-25 at 11:42 +0100, Mark Rutland wrote:
> > > > > Are you then going to hack GRUB, release a special HiKey version of
> > >
On Tue, 2015-08-25 at 11:42 +0100, Mark Rutland wrote:
> > > Are you then going to hack GRUB, release a special HiKey version of
> > > GRUB, not support any other versions, and still can your firmware
> > > UEFI?
> >
> > I don't need to hack GRUB at all.
>
> Then it is working for you by pure cha
On Tue, 2015-08-25 at 10:46 +0100, Leif Lindholm wrote:
> On Tue, Aug 25, 2015 at 04:13:47PM +0800, Haojian Zhuang wrote:
> > On Mon, 2015-08-24 at 12:49 +0100, Leif Lindholm wrote:
> > > On Mon, Aug 24, 2015 at 06:19:56PM +0800, Haojian Zhuang wrote:
> > > > > If
On Mon, 2015-08-24 at 12:49 +0100, Leif Lindholm wrote:
> On Mon, Aug 24, 2015 at 06:19:56PM +0800, Haojian Zhuang wrote:
> > > If your EFI memory map describes the memory as mappable, it is wrong.
> >
> > When kernel is working, kernel will create its own page table base
On Mon, 2015-08-24 at 13:48 +0100, Mark Rutland wrote:
> > > > > I don't see why you need reserved-memory here, given you're not
> > > > > referring to
> > > > > these regions by phandle anyway.
> > > >
> > > > - Now we have enabled EFI_STUB, so the memory node will be removed in
> > > > kernel
On Mon, 2015-08-24 at 10:51 +0100, Mark Rutland wrote:
> On Mon, Aug 24, 2015 at 10:18:45AM +0100, Leo Yan wrote:
> > Hi Mark,
> >
> > On Fri, Aug 21, 2015 at 07:40:59PM +0100, Mark Rutland wrote:
> > > On Wed, Aug 19, 2015 at 10:37:35AM +0100, Leo Yan wrote:
> > > > On Hi6220, below memory region
atch set:
> https://github.com/96boards/documentation/wiki/UEFI
>
> Changes v4:
> * Rebase to kernel 4.1-rc1
> * Delete "arm,cortex-a15-gic" from the gic node in dts
>
Acked-by: Haojian Zhuang
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onfig and defconfig
> arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
> clk: hi6220: Document devicetree bindings for hi6220 clock
> clk: hi6220: Clock driver support for Hisilicon hi6220 SoC
> arm64: dts: Add dts files for Hisilicon Hi6220 SoC
>
>
On Tue, Feb 3, 2015 at 9:21 PM, Linus Walleij wrote:
> On Wed, Jan 28, 2015 at 3:30 AM, Chao Xie wrote:
>
>> From: Chao Xie
>>
>> For some old PXA series, they used PXA GPIO driver.
>> The IP of GPIO changes since PXA988 which is Marvell MMP
>> series.
>> It will use new way to control the GPIO
It will be refined as each CPU probes its ID.
> */
> for (i = 0; i < NR_HIP04_CPU_IF; i++)
> - hip04_cpu_map[i] = 0xff;
> + hip04_cpu_map[i] = 0x;
>
> /*
> * Find out how many interrupts are supported.
&g
On Fri, Nov 28, 2014 at 9:30 PM, Robert Jarzmik wrote:
> Thomas Gleixner writes:
>
>> So what is the relationship between installing that chained handler
>> and that gpio-pxa probe stuff?
> The relation is in gpio-pxa probe, look at the extract of pxa_gpio_probe() :
> pxa_gpio_probe()
>
On Tue, Nov 4, 2014 at 8:46 PM, Zhou Wang wrote:
> This patchset adds the support for NAND controller of hisilicon hip04 Soc.
> The NAND controller IP was developed by hisilicon and needs a new driver to
> support it. This patchset is based on v3.18-rc1. I have tested that NAND flash
> controller
On 13 November 2014 08:35, Mike Turquette wrote:
> Quoting Haojian Zhuang (2014-11-04 00:15:55)
>> On Fri, Oct 31, 2014 at 10:13 AM, Chao Xie wrote:
>> > From: Chao Xie
>> >
>> > The patch set focuses at support device tree for clock.
>> >
>> &
quot;
>
> /* clock parent list */
> -static const char *timer0_mux_p[] __initdata = { "osc32k", "timerclk01", };
Acked-by: Haojian Zhuang
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|1 +
> drivers/mtd/nand/hisi504_nand.c| 846
>
> 4 files changed, 892 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mtd/hisi504-nand.txt
> create mode 100644 drivers/mtd/nand/hisi504_nan
create mode 100644 drivers/clk/mmp/clk-of-mmp2.c
> create mode 100644 drivers/clk/mmp/clk-of-pxa168.c
> create mode 100644 drivers/clk/mmp/clk-of-pxa910.c
> create mode 100644 drivers/clk/mmp/clk.c
> create mode 100644 drivers/clk/mmp/reset.c
> create mode 100644 drivers/clk/mm
+
> 2 files changed, 76 insertions(+)
>
Acked-by: Haojian Zhuang
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Please read the FAQ at http://www.tux.org/lkml/
On Thu, Oct 23, 2014 at 10:04 PM, Zhou Wang wrote:
> Signed-off-by: Zhou Wang
> ---
> drivers/mtd/nand/Kconfig|5 +
> drivers/mtd/nand/Makefile |1 +
> drivers/mtd/nand/hisi504_nand.c | 836
> +++
> 3 files changed, 842 insertions(+)
>
On 5 September 2014 07:07, Paul Bolle wrote:
> On Thu, 2014-06-19 at 17:00 +0800, Haojian Zhuang wrote:
>> On 19 June 2014 16:50, Paul Bolle wrote:
>> > 0) Commit d3e6573c48f4 ("clk: hip04: add clock driver") was included in
>> > v3.15. That clock driver is b
On 26 August 2014 12:38, Chao Xie wrote:
> From: Chao Xie
>
> The patch set focuses at support device tree for clock.
>
> The first part of the patches
> clk: mmp: add prefix "mmp" for structures defined for clk-frac
> clk: mmp: add spin lock for clk-frac
> clk: mmp: add init callback for c
extension. If it needs to extend
a bitmap, it still check whether the allocation exceeding the total
size, not current bitmap size. So change the condition from
mapping->bits to PAGE_SIZE.
Signed-off-by: Haojian Zhuang
---
arch/arm/mm/dma-mapping.c | 8
1 file changed, 4 insertions(+)
d(CONFIG_SPI_PXA2XX_MASTER)
> +#if IS_ENABLED(CONFIG_SPI_PXA2XX)
> static struct pxa2xx_spi_master corgi_spi_info = {
> .num_chipselect = 3,
> };
> --
> 1.9.0
>
Acked-by: Haojian Zhuang
--
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6 @@ static struct map_desc common_io_desc[] __initdata = {
>
> void __init pxa_map_io(void)
> {
> + debug_ll_io_init();
> iotable_init(ARRAY_AND_SIZE(common_io_desc));
> }
> --
> 1.9.0.rc3.12.gbc97e2d
>
Acked-by: Haojian Zhuang
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To unsubscribe from this li
@ (see Errata 38 ...hangs when entering self-refresh mode)
>
> @ force address lines low by reading at physical address 0
> ldr r3, [r2]
> --
> 1.9.0.rc3.12.gbc97e2d
>
Acked-by: Haojian Zhuang
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Wei Xu
> +L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
> +W: www.hisilicon.com
> +S: Supported
> +T: git git://github.com/hisilicon/linux-hisi.git
> +F: arch/arm/mach-hisi/
> +
> ARM/HP JORNADA 7XX MACHINE SUPPORT
> M: K
iff --git a/arch/arm/mach-pxa/time.c b/drivers/clocksource/pxa_timer.c
> similarity index 100%
> rename from arch/arm/mach-pxa/time.c
> rename to drivers/clocksource/pxa_timer.c
> --
> 2.0.0.rc2
>
Acked-by: Haojian Zhuang
Acked for all these three patches.
Regards
Haojian
--
To un
On 19 June 2014 16:50, Paul Bolle wrote:
> 0) Commit d3e6573c48f4 ("clk: hip04: add clock driver") was included in
> v3.15. That clock driver is built only if CONFIG_ARCH_HIP04 is set.
>
> And commit 5efaf09021a5 ("clk: hisi: add clk-hix5hd2.c") was included in
> v3.16-rc1. And that driver is buil
off-by: Jean Delvare
> Cc: Chris Ball
> Cc: Ulf Hansson
> Cc: Eric Miao
> Cc: Haojian Zhuang
> ---
> Changes since v1:
> * Rebased on kernel 3.16-rc1
>
> drivers/mmc/host/Kconfig |2 ++
> 1 file changed, 2 insertions(+)
>
> --- linux-3.16-rc1.
o the gpiolib irqchip helpers
> and rid some code. Just saying.
>
> Yours,
> Linus Walleij
Acked-by: Haojian Zhuang
Yes, it's worth to rid some irqchip code.
Regards
Haojian
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gt; #ifdef CONFIG_OF
> -static struct of_device_id sa1100_rtc_dt_ids[] = {
> +static const struct of_device_id sa1100_rtc_dt_ids[] = {
> { .compatible = "mrvl,sa1100-rtc", },
> { .compatible = "mrvl,mmp-rtc", },
> {}
> --
> 1.7.10.
On 24 April 2014 02:52, Rob Herring wrote:
> On Mon, Apr 21, 2014 at 8:35 PM, Haojian Zhuang
> wrote:
>> If gpio base number isn't specified, the gpio base will be find from
>> the end of gpio number. In order to keep with schematics, use alias
>> to get the ID of g
On 23 April 2014 21:21, Linus Walleij wrote:
> On Tue, Apr 22, 2014 at 3:35 AM, Haojian Zhuang
> wrote:
>
>> If gpio base number isn't specified, the gpio base will be find from
>> the end of gpio number. In order to keep with schematics, use alias
>> to get the I
Use gpio alias to identify the index of gpio chip. Then we can keep the
same gpio number as schematics. Otherwise, gpio number is countered from
bottom to top.
Signed-off-by: Haojian Zhuang
---
arch/arm/boot/dts/hi3620.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff
If gpio base number isn't specified, the gpio base will be find from
the end of gpio number. In order to keep with schematics, use alias
to get the ID of gpio chip.
Signed-off-by: Haojian Zhuang
---
.../devicetree/bindings/gpio/gpio-pl061.txt| 31 ++
drivers
On 6 April 2014 18:28, Paul Bolle wrote:
> On Fri, 2014-04-04 at 10:47 -0700, Mike Turquette wrote:
>> Haojian Zhuang (3):
>> [...]
>> clk: hip04: add clock driver
>
> This clock driver is only built if CONFIG_ARCH_HIP04 is set. But I
> couldn't f
o.dev.platform_data = &ttc_usb_pdata;
> platform_device_register(&pxa168_device_u2o);
> #endif
>
> -#ifdef CONFIG_USB_EHCI_MV_U2O
> +#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O)
> pxa168_device_u2oehci.dev.platform_data = &ttc_usb_pdata;
> platform_d
On Thu, Feb 27, 2014 at 9:37 AM, Chao Xie wrote:
> On Mon, Feb 24, 2014 at 7:31 PM, Thomas Gleixner wrote:
>> On Mon, 24 Feb 2014, Haojian Zhuang wrote:
>>
>>> On Mon, Feb 24, 2014 at 2:07 PM, Chao Xie wrote:
>>> > On Mon, Feb 24, 2014 at 7:17 AM, Uwe Kleine-
pm8607.c
> +++ b/drivers/regulator/88pm8607.c
> @@ -2,7 +2,7 @@
> * Regulators driver for Marvell 88PM8607
> *
> * Copyright (C) 2009 Marvell International Ltd.
> - * Haojian Zhuang
> + * Haojian Zhuang
> *
> * This program is free software; you can r
On Mon, Feb 24, 2014 at 2:07 PM, Chao Xie wrote:
> On Mon, Feb 24, 2014 at 7:17 AM, Uwe Kleine-König
> wrote:
>> Hi Thomas,
>>
>> On Sun, Feb 23, 2014 at 09:40:13PM -, Thomas Gleixner wrote:
>>> The pm-mmp2 and pm-pxa910 power management related irq_set_wake
>>> callbacks fiddle pointlessly w
On Fri, Dec 6, 2013 at 6:46 PM, Neil Zhang wrote:
> For example, arm64 doesn't have mach/irq.h.
>
> Signed-off-by: Neil Zhang
> Acked-by: Haojian Zhuang
> ---
> drivers/irqchip/irq-mmp.c |2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --g
On 12/10/2013 01:43 AM, Eric Miao wrote:
Haojian, could you help take this via your tree to arm-soc?
Applied.
Thanks
Haojian
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On 12/11/2013 02:31 AM, Marek Vasut wrote:
On Tuesday, December 10, 2013 at 11:48:59 AM, Daniel Mack wrote:
On 12/10/2013 09:43 AM, Haojian Zhuang wrote:
On 12/10/2013 12:39 PM, Sergei Ianovich wrote:
Erratum 71 of PXA270M Processor Family Specification Update
(April 19, 2010) explains that
On 12/10/2013 12:39 PM, Sergei Ianovich wrote:
Erratum 71 of PXA270M Processor Family Specification Update
(April 19, 2010) explains that watchdog reset time is just
8us insead of 10ms in EMTS.
If SDRAM is not reset, it causes memory bus congestion and
the device hangs. We put SDRAM in selfresh
On Thu, Dec 5, 2013 at 10:00 AM, Dan Williams wrote:
> On Wed, Dec 4, 2013 at 5:36 PM, Qiao Zhou wrote:
>> sram driver can be used by many chips besides CPU_MMP2, and so build
>> it alone. Also need to select MMP_SRAM for MMP_TDMA driver.
>>
>> Reported-by: Dan Williams
>> Signed-off-by: Qiao Zh
On Wed, Dec 4, 2013 at 4:21 PM, Qiao Zhou wrote:
> V1 -> V0:
> No need for help text for MMP_SRAM in Kconfig and move it into MMP_TDMA
> text in Kconfig.
>
> Qiao Zhou (2):
> arm: mmp: build sram driver alone
> dma: mmp-tdma: select sram driver
>
> arch/arm/mach-mmp/Kconfig |3 +++
> arc
On Wed, Dec 4, 2013 at 6:26 PM, Daniel Mack wrote:
> On 12/04/2013 11:22 AM, Thierry Reding wrote:
>> The conf and of_id variables are assigned but never used, so they may as
>> well just be removed.
>>
>> Signed-off-by: Thierry Reding
>
> Acked-by: Daniel Mack
>
>> ---
>> arch/arm/mach-pxa/irq
c b/drivers/irqchip/irq-mmp.c
> index 2cb7cd0..470c5de 100644
> --- a/drivers/irqchip/irq-mmp.c
> +++ b/drivers/irqchip/irq-mmp.c
> @@ -22,7 +22,7 @@
> #include
>
> #include
> -#include
> +#include
>
> #include "irqchip.h"
>
> --
> 1.7.9.5
>
On Fri, Oct 11, 2013 at 4:23 PM, Neil Zhang wrote:
> Some of the Marvell SoCs use GIC as its interrupt controller,and ICU
> only used as wakeup logic. When AP subsystem is powered off, GIC will
> lose its context, the PMU will need ICU to wakeup the AP subsystem.
> So add wakeup entry for such kin
clock
node tries to get its parent with the invalid index. It will only cause
accessing memory beyond border.
Signed-off-by: Haojian Zhuang
---
drivers/clk/clk-mux.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 4f96ff
v->dev, sizeof(struct pm860x_rtc_info),
> GFP_KERNEL);
> --
> 1.7.10.4
>
>
Acked-by: Haojian Zhuang
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road ...
>
> Then I have a lesser comment on patch #4 since it makes it possible
> for this pin controller to support wake-up interrupt, as I don't see how
> this plays out with front-end GPIO controllers, but let's discuss that
> in the context of that patch.
>
> Yo
On 31 August 2013 04:06, Stephen Warren wrote:
> On 08/29/2013 07:45 PM, Haojian Zhuang wrote:
>> On 22 August 2013 13:53, Mike Turquette wrote:
>>> Device Tree binding for the basic clock gate, plus the setup function to
>>> register the clock. Based on the e
On 22 August 2013 13:53, Mike Turquette wrote:
> Device Tree binding for the basic clock gate, plus the setup function to
> register the clock. Based on the existing fixed-clock binding.
>
> A different approach to this was proposed in 2012[1] and a similar
> binding was proposed more recently[2]
devices supported
> by this driver.
>
> Signed-off-by: Graeme Smecher
> Cc: Grant Likely
> Cc: Haojian Zhuang
> ---
> drivers/gpio/gpio-pca953x.c | 11 ---
> 1 file changed, 11 deletions(-)
>
> diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca
On Fri, Jul 12, 2013 at 11:10 PM, Daniel Drake wrote:
> On Thu, Jul 11, 2013 at 5:54 PM, Haojian Zhuang
> wrote:
>>> Well, Daniel Drake spoke up for OLPC. Does that count?
>>
>> We don't know they used DT on Marvell MMP2/MMP3. So they don't have DTS file
>
On Thu, Jul 11, 2013 at 5:50 AM, Jason Cooper wrote:
> On Wed, Jul 10, 2013 at 10:08:50PM +0800, Haojian Zhuang wrote:
>> On Wed, Jul 10, 2013 at 8:24 PM, Jason Cooper wrote:
>> > On Wed, Jul 10, 2013 at 04:19:46PM +0800, Haojian Zhuang wrote:
>> >> On Tue, Jul 9,
On Thu, Jul 11, 2013 at 7:23 PM, Neil Zhang wrote:
> Haojian,
>
>
>> -Original Message-
>> From: Haojian Zhuang [mailto:haojian.zhu...@gmail.com]
>> Sent: 2013年7月10日 13:59
>> To: Arnd Bergmann
>> Cc: Thomas Petazzoni; Neil Zhang; Grant Likely;
>&g
On Wed, Jul 10, 2013 at 8:24 PM, Jason Cooper wrote:
> On Wed, Jul 10, 2013 at 04:19:46PM +0800, Haojian Zhuang wrote:
>> On Tue, Jul 9, 2013 at 8:49 PM, Jason Cooper wrote:
>> > Neil,
>> >
>> > On Tue, Jul 09, 2013 at 02:42:44PM +0800, Neil Zhang wrote:
&g
On Tue, Jul 9, 2013 at 8:49 PM, Jason Cooper wrote:
> Neil,
>
> On Tue, Jul 09, 2013 at 02:42:44PM +0800, Neil Zhang wrote:
>> The documented vendor prefix for Marvell is 'marvell', not 'mrvl', so
>> let's change it.
>>
>> Signed-off-by: Neil Zhang
>> ---
>> .../devicetree/bindings/arm/mrvl/intc
On Wed, Jul 10, 2013 at 5:16 AM, Arnd Bergmann wrote:
> On Tuesday 09 July 2013, Thomas Petazzoni wrote:
>> Dear Neil Zhang,
>>
>> On Tue, 9 Jul 2013 14:42:45 +0800, Neil Zhang wrote:
>> > support CLOCKSOURCE OF DECLARE for mmp timer.
>> >
>> > Signed-off-by: Neil Zhang
>> > ---
>> > arch/arm/ma
On 21 June 2013 14:14, Mike Turquette wrote:
> Device Tree binding for the basic clock multiplexer, plus the setup
> function to register the clock. Based on the existing fixed-clock
> binding.
>
> Includes minor beautification of clk-provider.h where some whitespace is
> added and of_fixed_facto
On Sat, Jun 8, 2013 at 5:21 PM, Russell King - ARM Linux
wrote:
> On Sat, Jun 08, 2013 at 09:57:17AM +0100, Jonathan Cameron wrote:
>> At least one Arm subarch (pxa) does no provide an implementation of this
>> function. As far as I can see there is no way for a driver wishing to use
>> it to det
On 8 June 2013 03:18, Stephen Warren wrote:
> On 06/06/2013 09:30 AM, Christian Ruppert wrote:
>> On Thu, Jun 06, 2013 at 10:32:21PM +0800, Haojian Zhuang wrote:
>>> On 6 June 2013 22:11, Christian Ruppert
>>> wrote:
>>>> On Wed, Jun 05, 2013 at 09:44:27A
On 7 June 2013 20:27, Heiko Stübner wrote:
> Am Freitag, 7. Juni 2013, 13:46:32 schrieb Linus Walleij:
>> On Thu, Jun 6, 2013 at 9:08 PM, Heiko Stübner wrote:
>> > There exist platforms, namely at least all Rockchip Cortex-A9 based ones,
>> > that don't use the paradigm of reading-changing-writin
On 7 June 2013 19:32, Christian Ruppert wrote:
> On Fri, Jun 07, 2013 at 08:00:57AM +0800, Haojian Zhuang wrote:
>> On 6 June 2013 23:30, Christian Ruppert wrote:
>> > On Thu, Jun 06, 2013 at 10:32:21PM +0800, Haojian Zhuang wrote:
>> >> On 6 June 2013 22:11, C
On 6 June 2013 23:30, Christian Ruppert wrote:
> On Thu, Jun 06, 2013 at 10:32:21PM +0800, Haojian Zhuang wrote:
>> On 6 June 2013 22:11, Christian Ruppert wrote:
>> > On Wed, Jun 05, 2013 at 09:44:27AM +0800, Haojian Zhuang wrote:
>> >> On 3 June 2013 20:30, C
On 6 June 2013 22:11, Christian Ruppert wrote:
> On Wed, Jun 05, 2013 at 09:44:27AM +0800, Haojian Zhuang wrote:
>> On 3 June 2013 20:30, Christian Ruppert wrote:
>> > OK, here's a simplified example of what we would like to do (this seems
>> > pretty common so I
+++--
> drivers/clk/spear/spear6xx_clock.c | 35 +--
> drivers/clk/sunxi/clk-sunxi.c| 3 +-
> drivers/clk/tegra/clk-tegra114.c | 36 ++-
> drivers/clk/tegra/clk-tegra20.c | 6 +-
> drivers/clk/tegra/clk-tegra30.c | 33 ++-
> drivers/clk/versatile/clk-ve
On Tue, May 21, 2013 at 10:08 PM, Manjunathappa, Prakash
wrote:
> Take care to name pin names as
> register-offset.bit-pos-of-pin-in-register in case configuring multiple
> pins in register.
>
> Signed-off-by: Manjunathappa, Prakash
> ---
Acked-by: Haojian Zhuang
--
To uns
04),
>
> Signed-off-by: Manjunathappa, Prakash
> Reported-by: Lad, Prabhakar
> Tested-by: Lad, Prabhakar
Excuse me for response late.
Acked-by: Haojian Zhuang
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On 3 June 2013 20:30, Christian Ruppert wrote:
> OK, here's a simplified example of what we would like to do (this seems
> pretty common so I suppose there is a way I haven't understood). Our
> situation is slightly more complex but for the purpose of discussion
> let's assume a chip with 8 pins w
On 24 May 2013 17:03, Linus Walleij wrote:
> On Tue, May 21, 2013 at 4:07 PM, Manjunathappa, Prakash
> wrote:
>
>> Based function-mask and submask preoperties patch allocates and registers
>> pins.
>> Patch is fixes the issue reported and discussed here:
>> http://www.spinics.net/lists/arm-kerne
On 24 May 2013 19:50, Christian Ruppert wrote:
> Hello Haojian,
>
> On Thu, May 23, 2013 at 03:43:27PM +0800, Haojian Zhuang wrote:
>> On 22 May 2013 22:28, Christian Ruppert wrote:
>> >
>> > On Mon, May 20, 2013 at 10:10:33AM +0200, Linus Walleij wrote:
>&
dy have this?)
> >
> > Now I'm ever more confused ... we already have this :-)
> >
> > It's not even pinctrl-simple-centric it is completely generic.
> > The code is in drivers/gpio/gpiolib-of.c.
> >
> > It was written by Shiraz Hashin and Haoj
Remove these drivers too.
>
> Signed-off-by: Paul Bolle
Acked-by: Haojian Zhuang
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On 7 May 2013 20:57, Wei Yongjun wrote:
> On 05/07/2013 08:11 PM, Haojian Zhuang wrote:
>> On 7 May 2013 20:06, Wei Yongjun wrote:
>>> From: Wei Yongjun
>>>
>>> Fix to return a negative error code from the error handling
>>> case ins
On 7 May 2013 20:06, Wei Yongjun wrote:
> From: Wei Yongjun
>
> Fix to return a negative error code from the error handling
> case instead of 0, as done elsewhere in this function.
>
> Introduced by commit 9dddb4df90d136429b6d6ddefceb49a9b93f6cd1
> (pinctrl: single: support generic pinconf)
>
> S
re attention, but do not feel like I know
>> enough about it or have any means to test it to weigh in.
>>
>> Thanks,
>> Robin
>>
>>
>> commit 47ec340cb8e232671e7c4a4689ff32c3bdf329da
>> Author: Qing Xu
>> Date: Mon Feb 4 23:40:45 2013 +0800
>&g
On Tue, May 7, 2013 at 9:17 AM, Chao Xie wrote:
> the pxa95x rtc need access PBSR register before write to RTTR, RCNR, RDCR,
> and RYCR registers.
>
> Signed-off-by: Chao Xie
> ---
Do we really need this for other SoC? PXA95x is removed already since
it's a block on supporting
multi-platform &
On Sun, Apr 21, 2013 at 5:43 PM, Tim Sander wrote:
> Hi
>
> I am currently trying to get pinmuxing working on a beaglebone board with an
> offtree driver. This is for a custom handbuild hardware so i guess there is no
> point in bringing this mainline.
>
> While this is havyly patched 3.8.4 versio
On Fri, Apr 19, 2013 at 10:09 PM, Russell King - ARM Linux
wrote:
> On Sat, Apr 13, 2013 at 09:08:12PM +0800, Haojian Zhuang wrote:
>> On Thu, Apr 11, 2013 at 11:39 AM, Neil Zhang wrote:
>> > + /*
>> > +* Synchronise with the boot thread.
>> >
>> > From: Haojian Zhuang [mailto:haojian.zhu...@gmail.com]
>> > Sent: 2013年4月13日 20:50
>> > To: Neil Zhang
>> > Cc: Grant Likely; linux-arm-ker...@lists.infradead.org;
>> > linux-kernel@vger.kernel.org; Chao Xie
>> > Subject: Re: [PATCH 1/4]
On 13 April 2013 22:46, Jonghwan Choi wrote:
> From: Haojian Zhuang
>
> This patch looks like it should be in the 3.8-stable tree, should we apply
> it?
>
It could be merged into 3.8-stable tree.
Regards
Haojian
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On Thu, Apr 11, 2013 at 11:39 AM, Neil Zhang wrote:
> Add SMP support for pxa988.
>
> Signed-off-by: Neil Zhang
> Signed-off-by: Chao Xie
> ---
> arch/arm/mach-mmp/Makefile |4 +
> arch/arm/mach-mmp/common.h |2 +
> arch/arm/mach-mmp/headsmp.S | 104 ++
> arch
mp/mmpx-dt.c
>
> diff --git a/arch/arm/boot/dts/pxa988-dkb.dts
> b/arch/arm/boot/dts/pxa988-dkb.dts
> new file mode 100644
> index 000..2cee3ed
> --- /dev/null
> +++ b/arch/arm/boot/dts/pxa988-dkb.dts
> @@ -0,0 +1,36 @@
> +/*
> + * Copyright (C) 2012 Marvell Te
On Thu, Apr 11, 2013 at 11:37 AM, Neil Zhang wrote:
> Move some of the function declaration to head file.
>
> Signed-off-by: Neil Zhang
> Signed-off-by: Chao Xie
> ---
> arch/arm/mach-mmp/common.h |3 +++
> arch/arm/mach-mmp/mmp-dt.c |3 ---
> arch/arm/mach-mmp/mmp2-dt.c |3 ---
>
On Thu, Apr 11, 2013 at 11:37 AM, Neil Zhang wrote:
> From: Chao Xie
>
> PXA988 will use GIC as its interrupt controller, and ICU is used as wakeup
> logic. When AP subsystem is powered off, GIC will lose its context, the
> PMU will need ICU to wakeup the AP subsystem.
> When ICU works as wakeup
make[1]: *** Waiting for unfinished jobs
It's caused by CONFIG_GPIOLIB isn't enabled for some platform. So
add the dependence on pinctrl_ready_for_gpio_range().
Signed-off-by: Haojian Zhuang
---
drivers/pinctrl/core.c |8
1 file changed, 8 insertions(+)
diff --git a/drivers
On 14 March 2013 03:03, Linus Walleij wrote:
> On Wed, Mar 13, 2013 at 9:23 AM, Haojian Zhuang
> wrote:
>
>> pinctrl-pxa driver doesn't support well on DT mode. Now pinctrl-single
>> could support DT mode & pin configuration. Use pinctrl-single driver to
>&
pcs_pinconf_set() is always using "arg << shift" to configure two
parameters case. But pcs_add_conf2() didn't remove shift for config
argument. So correct it.
Signed-off-by: Haojian Zhuang
---
drivers/pinctrl/pinctrl-single.c | 16
1 file changed, 8 inser
On 4 March 2013 17:18, Axel Lin wrote:
> 2013/3/4 Haojian Zhuang :
>> On 4 March 2013 13:47, Axel Lin wrote:
>>> If pcs->is_pinconf is false, it means does not support pinconf.
>>> If pcs->is_pinconf is true, is_generic flag is always true.
>>&
On 4 March 2013 13:47, Axel Lin wrote:
> If pcs->is_pinconf is false, it means does not support pinconf.
> If pcs->is_pinconf is true, is_generic flag is always true.
>
> This patch fixes below build error:
>
> CC [M] drivers/pinctrl/pinctrl-single.o
> drivers/pinctrl/pinctrl-single.c: In funct
f --git a/drivers/video/mmp/fb/mmpfb.c b/drivers/video/mmp/fb/mmpfb.c
> index f34a3a9..6d1fa96 100644
> --- a/drivers/video/mmp/fb/mmpfb.c
> +++ b/drivers/video/mmp/fb/mmpfb.c
> @@ -21,6 +21,7 @@
> */
> #include
> #include
> +#include
> #include "mmpfb.h"
On Sat, Feb 16, 2013 at 2:38 PM, Axel Lin wrote:
> Signed-off-by: Axel Lin
> ---
> drivers/regulator/max8649.c | 39 ++-
> 1 file changed, 6 insertions(+), 33 deletions(-)
>
Reviewed-by: Haojian Zhuang
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On Sat, Feb 16, 2013 at 2:37 PM, Axel Lin wrote:
> Signed-off-by: Axel Lin
> ---
> drivers/regulator/88pm8607.c | 36
> 1 file changed, 4 insertions(+), 32 deletions(-)
>
Reviewed-by: Haojian Zhuang
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