Re: [PATCH v6 2/6] rust: str: implement `Index` for `BStr`

On Tue, 11 Feb 2025 21:24:44 +0100 Andreas Hindborg wrote: > "Gary Guo" writes: > > > On Tue, 11 Feb 2025 16:57:36 +0100 > > Andreas Hindborg wrote: > > > >> The `Index` implementation on `BStr` was lost when we switched `BStr` from > >>

Re: [PATCH v6 5/6] rust: str: add radix prefixed integer parsing functions

On Tue, 11 Feb 2025 21:13:10 +0100 Andreas Hindborg wrote: > "Gary Guo" writes: > > > On Tue, 11 Feb 2025 16:57:39 +0100 > > Andreas Hindborg wrote: > > > >> Add the trait `ParseInt` for parsing string representations of integers > >> wher

Re: [PATCH v6 2/6] rust: str: implement `Index` for `BStr`

On Tue, 11 Feb 2025 16:57:36 +0100 Andreas Hindborg wrote: > The `Index` implementation on `BStr` was lost when we switched `BStr` from > a type alias of `[u8]` to a newtype. This patch adds back `Index` by > implementing `Index` for `BStr` when `Index` would be implemented for > `[u8]`. > > Sig

Re: [PATCH v6 5/6] rust: str: add radix prefixed integer parsing functions

On Tue, 11 Feb 2025 16:57:39 +0100 Andreas Hindborg wrote: > Add the trait `ParseInt` for parsing string representations of integers > where the string representations are optionally prefixed by a radix > specifier. Implement the trait for the primitive integer types. > > Signed-off-by: Andreas

Re: [PATCH v4 3/4] rust: str: add radix prefixed integer parsing functions

On Thu, 09 Jan 2025 11:54:58 +0100 Andreas Hindborg wrote: > Add the trait `ParseInt` for parsing string representations of integers > where the string representations are optionally prefixed by a radix > specifier. Implement the trait for the primitive integer types. > > Signed-off-by: Andreas

Re: [PATCH v4 2/4] rust: str: implement `strip_prefix` for `BStr`

On Thu, 09 Jan 2025 11:54:57 +0100 Andreas Hindborg wrote: > Implement `strip_prefix` for `BStr` by deferring to `slice::strip_prefix` > on the underlying `&[u8]`. > > Signed-off-by: Andreas Hindborg Reviewed-by: Gary Guo > > --- > > It is also possible to get

Re: [PATCH v4 1/4] rust: str: implement `PartialEq` for `BStr`

On Thu, 09 Jan 2025 11:54:56 +0100 Andreas Hindborg wrote: > Implement `PartialEq` for `BStr` by comparing underlying byte slices. > > Reviewed-by: Alice Ryhl > Signed-off-by: Andreas Hindborg Reviewed-by: Gary Guo > --- > rust/kernel/str.rs | 6 ++ > 1 file

Re: [PATCH v7 08/16] rust: add devres abstraction

On Thu, 19 Dec 2024 18:04:10 +0100 Danilo Krummrich wrote: > Add a Rust abstraction for the kernel's devres (device resource > management) implementation. > > The Devres type acts as a container to manage the lifetime and > accessibility of device bound resources. Therefore it registers a > devr

Re: [PATCH v7 04/16] rust: add rcu abstraction

On Thu, 19 Dec 2024 18:04:06 +0100 Danilo Krummrich wrote: > From: Wedson Almeida Filho > > Add a simple abstraction to guard critical code sections with an rcu > read lock. > > Reviewed-by: Boqun Feng > Signed-off-by: Wedson Almeida Filho > Co-developed-by: Danilo Krummrich > Signed-off-by

Re: [PATCH v7 01/16] rust: module: add trait `ModuleMetadata`

Signed-off-by: Danilo Krummrich Reviewed-by: Gary Guo > --- > rust/kernel/lib.rs| 6 ++ > rust/macros/module.rs | 4 > 2 files changed, 10 insertions(+) > > diff --git a/rust/kernel/lib.rs b/rust/kernel/lib.rs > index e1065a7551a3..61b82b78b915 100644 > --- a/

Re: [PATCH v7 05/16] rust: types: add `Opaque::pin_init`

ummrich Reviewed-by: Gary Guo > --- > rust/kernel/types.rs | 11 +++ > 1 file changed, 11 insertions(+) > > diff --git a/rust/kernel/types.rs b/rust/kernel/types.rs > index ec6457bb3084..3aea6af9a0bc 100644 > --- a/rust/kernel/types.rs > +++ b/rust/kernel/types.

Re: [PATCH v7 03/16] rust: implement `IdArray`, `IdTable` and `RawDeviceId`

ff-by: Wedson Almeida Filho > Co-developed-by: Gary Guo > Signed-off-by: Gary Guo > Co-developed-by: Fabien Parent > Signed-off-by: Fabien Parent > Signed-off-by: Danilo Krummrich Thank you for converting my prototype to a working patch. There's a nit below. > --- > MAINTAI

Re: [PATCH v7 02/16] rust: implement generic driver registration

On Thu, 19 Dec 2024 18:04:04 +0100 Danilo Krummrich wrote: > Implement the generic `Registration` type and the `RegistrationOps` > trait. > > The `Registration` structure is the common type that represents a driver > registration and is typically bound to the lifetime of a module. However, > it

Re: [PATCH 1/2] compiler.h: Introduce ptr_eq() to preserve address dependency

> Cc: Sebastian Andrzej Siewior > Cc: "Paul E. McKenney" > Cc: Will Deacon > Cc: Peter Zijlstra > Cc: Boqun Feng > Cc: Alan Stern > Cc: John Stultz > Cc: Neeraj Upadhyay > Cc: Linus Torvalds > Cc: Boqun Feng > Cc: Frederic Weisbecker > Cc: Joel

[PATCH 5/5] rust: cleanup unnecessary casts

With `long` mapped to `isize`, `size_t`/`__kernel_size_t` mapped to usize and `char` mapped to `u8`, many of the existing casts are no longer necessary. Signed-off-by: Gary Guo --- rust/kernel/kunit.rs | 10 ++ rust/kernel/print.rs | 4 ++-- rust/kernel/str.rs | 6 +++--- rust

Re: [PATCH v6 2/5] rust: add tracepoint support

on > that is only used when CREATE_RUST_TRACE_POINTS is set. These should not > end up in the final binary so it is not a problem that they sometimes > are emitted without a user. > > Reviewed-by: Carlos Llamas > Signed-off-by: Alice Ryhl Reviewed-by: Gary Guo > --- > include/linux/tracepo

Re: [PATCH v6 1/5] rust: add generic static_key_false

On Thu, 08 Aug 2024 17:23:37 + Alice Ryhl wrote: > Add just enough support for static key so that we can use it from > tracepoints. Tracepoints rely on `static_key_false` even though it is > deprecated, so we add the same functionality to Rust. > > This patch only provides a generic implemen

Re: [PATCH v4 2/2] rust: add tracepoint support

On Fri, 28 Jun 2024 13:23:32 + Alice Ryhl wrote: > Make it possible to have Rust code call into tracepoints defined by C > code. It is still required that the tracepoint is declared in a C > header, and that this header is included in the input to bindgen. > > Signed-off-by: Alice Ryhl The

Re: [PATCH v4 1/2] rust: add static_key_false

gt; Signed-off-by: Alice Ryhl Reviewed-by: Gary Guo > --- > rust/kernel/arch/arm64/jump_label.rs | 34 > rust/kernel/arch/loongarch/jump_label.rs | 35 + > rust/kernel/arch/mod.rs | 24 ++

[PATCH] riscv: fix memmove and optimise memcpy when misalign

this speeds up memcpy 4~5x when src and dest are not co-aligned (which is quite common in networking), and speeds up memmove 1000+x by avoiding trapping to firmware. Signed-off-by: Gary Guo --- arch/riscv/lib/memcpy.S | 223 --- arch/riscv/lib/memmove.S | 176

[PATCH] drivers: net: xilinx_emaclite: remove arch limitation

int and print with %x. Signed-off-by: Gary Guo --- drivers/net/ethernet/xilinx/Kconfig | 1 - drivers/net/ethernet/xilinx/xilinx_emaclite.c | 4 ++-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/xilinx/Kconfig b/drivers/net/ethernet/xilinx/Kconfig

RE: [PATCH v3] RISC-V: Implement ASID allocator

most of them are not addressed. > -Original Message- > From: Anup Patel > Sent: Thursday, April 25, 2019 03:04 > To: Palmer Dabbelt > Cc: Anup Patel ; Albert Ou ; > Gary Guo ; Atish Patra ; Christoph > Hellwig ; Paul Walmsley ; > Mike Rapoport ; linux-ri...@li

Re: [PATCH] riscv: Support non-coherency memory model

On 24/04/2019 06:57, Guo Ren wrote: > Hi Gary, > > On Wed, Apr 24, 2019 at 03:21:14AM +0000, Gary Guo wrote: >>> Look: >>> linux-next git:(riscv_asid_allocator_v2)$ grep GLOBAL arch/riscv -r >>> arch/riscv/include/asm/pgtable-bits.h:#define _PAGE_GLOBAL(

RE: [PATCH] riscv: Support non-coherency memory model

> -Original Message- > From: Guo Ren > Sent: Wednesday, April 24, 2019 03:08 > To: Gary Guo > Cc: Christoph Hellwig ; linux-a...@vger.kernel.org; Palmer > Dabbelt ; Andrew Waterman ; Arnd > Bergmann ; Anup Patel ; Xiang > Xiaoyan ; linux-kernel@vger.ker

Re: [PATCH] riscv: Support non-coherency memory model

On 23/04/2019 16:46, Guo Ren wrote: > On Tue, Apr 23, 2019 at 07:55:48AM +0200, Christoph Hellwig wrote: >> On Tue, Apr 23, 2019 at 08:13:48AM +0800, Guo Ren wrote: We should probably start a working group for this ASAP unless we can get another working group to help taking care of it.

Re: [PATCH v2] RISC-V: Implement ASID allocator

On 28/03/2019 14:13, Anup Patel wrote: > On Thu, Mar 28, 2019 at 7:07 PM Gary Guo wrote: >> >> Hi Anup, >> >> The code still does not use ASID in TLB flush routines. Without this >> added the code does not boot on systems with true ASID support. >>

Re: [PATCH v2] RISC-V: Implement ASID allocator

On 28/03/2019 14:09, Anup Patel wrote: > On Thu, Mar 28, 2019 at 7:07 PM Gary Guo wrote: >> >> Hi Anup, >> >> The code still does not use ASID in TLB flush routines. Without this >> added the code does not boot on systems with true ASID support. > > Can

Re: [PATCH v2] RISC-V: Implement ASID allocator

PU thereby increasing performance. > > This patch is tested on QEMU/virt machine and SiFive Unleashed board. > On QEMU/virt machine, we see 10% (approx) performance improvement with > SW emulated TLBs provided by QEMU. Unfortunately, ASID bits of SATP CSR > are not implemented on

Re: [PATCH] RISC-V: Implement ASID allocator

I think my code already get all the caveats cases covered. The only thing my code is missing is handling the case when ASID is not supported. Maybe it is better to work based on that instead? On 27/03/2019 14:02, Anup Patel wrote: > On Wed, Mar 27, 2019 at 7:12 PM Gary Guo wrote: >> &

Re: [PATCH] RISC-V: Implement ASID allocator

r-prone as well). Best, Gary On 27/03/2019 11:42, Anup Patel wrote: > On Wed, Mar 27, 2019 at 4:57 PM Gary Guo wrote: >> >> Hi Anup, >> >> This won't work in an actual hardware with ASID support. There're more > > Can you elaborate why? > > Thi

Re: [PATCH] RISC-V: Implement ASID allocator

On 27/03/2019 11:42, Anup Patel wrote: > On Wed, Mar 27, 2019 at 4:57 PM Gary Guo wrote: >> >> Hi Anup, >> >> This won't work in an actual hardware with ASID support. There're more > > Can you elaborate why > > > This implementation is based

Re: [PATCH] RISC-V: Implement ASID allocator

but this version has correctness of its ASID code tested on our TLB simulator tool (which unfortunately I can't share right now as it involves with unpublished works). In fact my submit my previous patch series exactly as the basis of this patch. Best, Gary Guo On 27/03/2019 10:02, Anup

RE: [PATCH] RISC-V: Always compile mm/init.c with cmodel=medany

> -Original Message- > From: linux-riscv On Behalf Of Anup > Patel > Sent: Sunday, March 24, 2019 11:08 > To: Palmer Dabbelt ; Albert Ou > Cc: Anup Patel ; linux-kernel@vger.kernel.org; Mike > Rapoport ; Christoph Hellwig ; Atish > Patra ; Paul Walmsley ; > linux-ri...@lists.infradead.