From: Carlos Munoz
Add bindings for Common Ethernet Interface (BGX) block.
Acked-by: Rob Herring
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
.../devicetree/bindings/net/cavium-bgx.txt | 61 ++
1 file changed, 61
Signed-off-by: David Daney
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9a7f76eadae9..b36371ae590f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3259,6 +3259,12 @@ W: http://www.cavium.com
S: Supported
F: drivers/mmc
z (2):
dt-bindings: Add Cavium Octeon Common Ethernet Interface.
netdev: octeon-ethernet: Add Cavium Octeon III support.
David Daney (1):
MAINTAINERS: Add entry for
drivers/net/ethernet/cavium/octeon/octeon3-*
.../devicetree/bindings/net/cavium-bgx.txt |
Previous patch sets USE_ASYNC_IOBDMA to 1 unconditionally. Remove
USE_ASYNC_IOBDMA from all if statements. Remove dead code caused by
the change.
Acked-by: Greg Kroah-Hartman
Signed-off-by: David Daney
---
drivers/staging/octeon/ethernet-defines.h | 6 ---
drivers/staging/octeon/ethernet
the CVMSEG LMTDMA trigger location.
Reviewed-by: James Hogan
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/setup.c | 6 ++
arch/mips/include/asm/octeon/octeon.h | 12 ++--
2 files changed, 16 insertions(+), 2
tion of OCTEON SoCs
(in the staging directory still).
o Verified bisectability of the patch set.
Carlos Munoz (2):
MIPS: Octeon: Enable LMTDMA/LMTST operations.
MIPS: Octeon: Add a global resource manager.
David Daney (2):
MIPS: Octeon: Automatically provision CVMSEG space.
additional lines, defaults to zero.
Signed-off-by: David Daney
Signed-off-by: Carlos Munoz
---
arch/mips/cavium-octeon/Kconfig| 27
arch/mips/cavium-octeon/setup.c| 16 ++--
.../asm/mach-cavium-octeon/kernel-entry-init.h | 20
From: Carlos Munoz
Add a global resource manager to manage tagged pointers within
bootmem allocated memory. This is used by various functional
blocks in the Octeon core like the FPA, Ethernet nexus, etc.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
Signed-off-by: David Daney
---
Changes from v5:
o removed obsolete call to rtc_valid_tm().
Changes from v4:
o Rebased to rtc-next
o Improvements suggested by Alexandre Belloni
o Added Reviewed-by Rob Herring
Changes from v3:
o Add Reviewed-by
o s/dev_err/dev_warn/ in one place
o Remove
other fixes")
Signed-off-by: Colin Ian King
Acked-by: David Daney
---
arch/mips/cavium-octeon/octeon-irq.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/cavium-octeon/octeon-irq.c
b/arch/mips/cavium-octeon/octeon-irq.c
index b993d9f2c9b9..203e1d2a56d5 100644
--- a
Signed-off-by: David Daney
---
Changes from v4:
o Rebased to rtc-next
o Improvements suggested by Alexandre Belloni
o Added Reviewed-by Rob Herring
Changes from v3:
o Add Reviewed-by
o s/dev_err/dev_warn/ in one place
o Remove redundant ','
Changes from v2:
o More code c
On 02/20/2018 03:03 AM, Alexandre Belloni wrote:
[...]
diff --git a/drivers/rtc/rtc-isl12026.c b/drivers/rtc/rtc-isl12026.c
new file mode 100644
index ..29e5bdf96c67
--- /dev/null
+++ b/drivers/rtc/rtc-isl12026.c
@@ -0,0 +1,529 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * An I2C
On 02/16/2018 12:13 PM, Andy Shevchenko wrote:
On Fri, Feb 16, 2018 at 9:44 PM, David Daney wrote:
The ISL12026 is a combination RTC and EEPROM device with I2C
interface. The standard RTC driver interface is provided. The EEPROM
is accessed via the NVMEM interface via the "eeprom0"
The ISL12026 is a combination RTC and EEPROM device with I2C
interface. The standard RTC driver interface is provided. The EEPROM
is accessed via the NVMEM interface via the "eeprom0" directory in the
sysfs entry for the device.
Reviewed-by: Andy Shevchenko
Signed-off-by: D
The ISL12026 is a combination RTC and EEPROM device with I2C
interface. The standard RTC driver interface is provided. The EEPROM
is accessed via the NVMEM interface via the "eeprom0" directory in the
sysfs entry for the device.
Signed-off-by: David Daney
---
Changes from v2:
o
On 02/15/2018 04:45 AM, Andy Shevchenko wrote:
On Wed, Feb 14, 2018 at 2:55 AM, David Daney wrote:
The ISL12026 is a combination RTC and EEPROM device with I2C
interface. The standard RTC driver interface is provided. The EEPROM
is accessed via the NVMEM interface via the "eeprom0"
The ISL12026 is a combination RTC and EEPROM device with I2C
interface. The standard RTC driver interface is provided. The EEPROM
is accessed via the NVMEM interface via the "eeprom0" directory in the
sysfs entry for the device.
Signed-off-by: David Daney
---
Changes from v1:
o Fi
Check with v4.16-rc1. This is duplicate check.
Yes.
+ i2c_unregister_device(priv->nvm_client);
+
+ return 0;
+}
+#ifdef CONFIG_OF
Useless.
+static const struct of_device_id isl12026_dt_match[] = {
+ { .compatible = "isil,isl12026" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, isl12026_dt_match);
+#endif
+
+static const struct i2c_device_id isl12026_id[] = {
+ { "isl12026", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, isl12026_id);
Useless. Use ->probe_new() approach.
+#ifdef CONFIG_OF
Ugly and useless.
+ .of_match_table = of_match_ptr(isl12026_dt_match),
+#endif
Should be better in the next version.
Thanks for the review,
David Daney
On 02/12/2018 10:59 AM, David Daney wrote:
The ISL12026 is a combination RTC and EEPROM device with I2C
interface. The standard RTC driver interface is provided. The EEPROM
is accessed via the NVMEM interface via the "eeprom0" directory in the
sysfs entry for the device.
Signed-off
The ISL12026 is a combination RTC and EEPROM device with I2C
interface. The standard RTC driver interface is provided. The EEPROM
is accessed via the NVMEM interface via the "eeprom0" directory in the
sysfs entry for the device.
Signed-off-by: David Daney
---
.../devicetree/binding
good cleanup/simplification...
Acked-by: David Daney
---
arch/mips/kernel/watch.c | 17 +++--
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/arch/mips/kernel/watch.c b/arch/mips/kernel/watch.c
index 19fcab7348b1..329d2209521d 100644
--- a/arch/mips/kernel/watch.c
On 01/02/2018 03:31 AM, Matt Redfearn wrote:
Currently the bits to be masked when watchhi is read is defined inline
for each register. To avoid this, define the bits once and mask each
register with that value.
Signed-off-by: Matt Redfearn
Acked-by: David Daney
---
arch/mips/kernel
additional lines, defaults to zero.
Signed-off-by: David Daney
Signed-off-by: Carlos Munoz
---
arch/mips/cavium-octeon/Kconfig| 27
arch/mips/cavium-octeon/setup.c| 16 ++--
.../asm/mach-cavium-octeon/kernel-entry-init.h | 20
the CVMSEG LMTDMA trigger location.
Reviewed-by: James Hogan
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/setup.c | 6 ++
arch/mips/include/asm/octeon/octeon.h | 12 ++--
2 files changed, 16 insertions(+), 2
From: Carlos Munoz
Add a global resource manager to manage tagged pointers within
bootmem allocated memory. This is used by various functional
blocks in the Octeon core like the FPA, Ethernet nexus, etc.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
ctory still).
o Verified bisectability of the patch set.
Carlos Munoz (2):
MIPS: Octeon: Enable LMTDMA/LMTST operations.
MIPS: Octeon: Add a global resource manager.
David Daney (2):
MIPS: Octeon: Automatically provision CVMSEG space.
staging: octeon: Remove USE_ASYNC_IOBDMA macro.
Previous patch sets USE_ASYNC_IOBDMA to 1 unconditionally. Remove
USE_ASYNC_IOBDMA from all if statements. Remove dead code caused by
the change.
Acked-by: Greg Kroah-Hartman
Signed-off-by: David Daney
---
drivers/staging/octeon/ethernet-defines.h | 6 ---
drivers/staging/octeon/ethernet
additional lines, defaults to zero.
Signed-off-by: David Daney
Signed-off-by: Carlos Munoz
---
arch/mips/cavium-octeon/Kconfig| 27
arch/mips/cavium-octeon/setup.c| 16 ++--
.../asm/mach-cavium-octeon/kernel-entry-init.h | 20
From: Carlos Munoz
Add bindings for Common Ethernet Interface (BGX) block.
Acked-by: Rob Herring
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
.../devicetree/bindings/net/cavium-bgx.txt | 61 ++
1 file changed, 61
From: Carlos Munoz
Add a global resource manager to manage tagged pointers within
bootmem allocated memory. This is used by various functional
blocks in the Octeon core like the FPA, Ethernet nexus, etc.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
the CVMSEG LMTDMA trigger location.
Reviewed-by: James Hogan
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/setup.c | 6 ++
arch/mips/include/asm/octeon/octeon.h | 12 ++--
2 files changed, 16 insertions(+), 2
Previous patch sets USE_ASYNC_IOBDMA to 1 unconditionally. Remove
USE_ASYNC_IOBDMA from all if statements. Remove dead code caused by
the change.
Acked-by: Greg Kroah-Hartman
Signed-off-by: David Daney
---
drivers/staging/octeon/ethernet-defines.h | 6 ---
drivers/staging/octeon/ethernet
Signed-off-by: David Daney
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 4007fa2e193e..b4bf5b205380 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3249,6 +3249,12 @@ W: http://www.cavium.com
S: Supported
F: drivers/mmc
thernet Interface.
MIPS: Octeon: Enable LMTDMA/LMTST operations.
MIPS: Octeon: Add a global resource manager.
netdev: octeon-ethernet: Add Cavium Octeon III support.
David Daney (3):
MIPS: Octeon: Automatically provision CVMSEG space.
staging: octeon: Remove USE_ASYNC_IOBDMA macro.
M
nditionally, as it is currently
working well on many systems.
Perhaps you could add a module parameter to enable the recovery mode on
probe as an option. Would that work or be acceptable?
Thanks,
David Daney
BR,
Sean Zhang
-Original Message-
From: Jan Glauber [
From: Carlos Munoz
Add bindings for Common Ethernet Interface (BGX) block.
Acked-by: Rob Herring
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
.../devicetree/bindings/net/cavium-bgx.txt | 61 ++
1 file changed, 61
additional lines, defaults to zero.
Signed-off-by: David Daney
Signed-off-by: Carlos Munoz
---
arch/mips/cavium-octeon/Kconfig| 27
arch/mips/cavium-octeon/setup.c| 16 ++--
.../asm/mach-cavium-octeon/kernel-entry-init.h | 20
m Octeon Common Ethernet Interface.
MIPS: Octeon: Enable LMTDMA/LMTST operations.
MIPS: Octeon: Add a global resource manager.
MIPS: Octeon: Add Free Pointer Unit (FPA) support.
netdev: octeon-ethernet: Add Cavium Octeon III support.
David Daney (2):
MIPS: Octeon: Automatically provisi
From: Carlos Munoz
Add a global resource manager to manage tagged pointers within
bootmem allocated memory. This is used by various functional
blocks in the Octeon core like the FPA, Ethernet nexus, etc.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
the CVMSEG LMTDMA trigger location.
Reviewed-by: James Hogan
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/setup.c | 6 ++
arch/mips/include/asm/octeon/octeon.h | 12 ++--
2 files changed, 16 insertions(+), 2
Signed-off-by: David Daney
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 77d819b458a9..5aff6fb41b21 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3249,6 +3249,12 @@ W: http://www.cavium.com
S: Supported
F: drivers/mmc
Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/Kconfig | 8 +
arch/mips/cavium-octeon/Makefile | 1 +
arch/mips/cavium-octeon/octeon-fpa3.c | 363 ++
arch/mips/include/asm/octeon/octeon.h | 1
On 12/01/2017 12:41 PM, Philippe Ombredanne wrote:
David,
On Fri, Dec 1, 2017 at 9:01 PM, David Daney wrote:
On 12/01/2017 11:49 AM, Philippe Ombredanne wrote:
David, Greg,
On Fri, Dec 1, 2017 at 6:42 PM, David Daney
wrote:
On 11/30/2017 11:53 PM, Philippe Ombredanne wrote
On 12/01/2017 11:49 AM, Philippe Ombredanne wrote:
David, Greg,
On Fri, Dec 1, 2017 at 6:42 PM, David Daney wrote:
On 11/30/2017 11:53 PM, Philippe Ombredanne wrote:
[...]
--- /dev/null
+++ b/arch/mips/cavium-octeon/resource-mgr.c
@@ -0,0 +1,371 @@
+// SPDX-License-Identifier: GPL-2.0
On 11/30/2017 11:53 PM, Philippe Ombredanne wrote:
Carlos,
On Thu, Nov 30, 2017 at 11:53 PM, James Hogan wrote:
On Tue, Nov 28, 2017 at 04:55:35PM -0800, David Daney wrote:
From: Carlos Munoz
Add a global resource manager to manage tagged pointers within
bootmem allocated memory. This is
On 11/30/2017 05:06 AM, Miodrag Dinic wrote:
Hi James,
We do have PT_GNU_STACK flags set correctly, this feature is required to
workaround CPU revisions which do not have RIXI support.
RIXI support can be discovered programatically from CP0_Config3.RXI
(cpu_has_rixi in asm/cpu-features.h), so
On 11/30/2017 02:53 PM, James Hogan wrote:
On Tue, Nov 28, 2017 at 04:55:35PM -0800, David Daney wrote:
From: Carlos Munoz
Add a global resource manager to manage tagged pointers within
bootmem allocated memory. This is used by various functional
blocks in the Octeon core like the FPA
On 11/30/2017 02:56 PM, James Hogan wrote:
On Thu, Nov 30, 2017 at 01:49:43PM -0800, David Daney wrote:
On 11/30/2017 01:36 PM, James Hogan wrote:
On Tue, Nov 28, 2017 at 04:55:34PM -0800, David Daney wrote:
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David
On 11/30/2017 01:36 PM, James Hogan wrote:
On Tue, Nov 28, 2017 at 04:55:34PM -0800, David Daney wrote:
From: Carlos Munoz
LMTDMA/LMTST operations move data between cores and I/O devices:
* LMTST operations can send an address and a variable length
(up to 128 bytes) of data to an I/O
On 11/29/2017 12:55 PM, Mathieu Malaterre wrote:
Improve the binding example by removing all the leading 0x to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
How does it fix the warnings? You are not changing the .dts files that
On 11/29/2017 02:56 PM, Andrew Lunn wrote:
On Tue, Nov 28, 2017 at 04:55:39PM -0800, David Daney wrote:
+static int bgx_probe(struct platform_device *pdev)
+{
+ struct mac_platform_data platform_data;
+ const __be32 *reg;
+ u32 port;
+ u64 addr;
+ struct
On 11/29/2017 08:07 AM, Souptick Joarder wrote:
On Wed, Nov 29, 2017 at 4:00 PM, Souptick Joarder wrote:
On Wed, Nov 29, 2017 at 6:25 AM, David Daney wrote:
From: Carlos Munoz
The Cavium OCTEON cn78xx and cn73xx SoCs have network packet I/O
hardware that is significantly different from
On 11/28/2017 06:01 PM, Andrew Lunn wrote:
On Tue, Nov 28, 2017 at 04:55:33PM -0800, David Daney wrote:
From: Carlos Munoz
Add bindings for Common Ethernet Interface (BGX) block.
Acked-by: Rob Herring
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
and then return a
variable length (up to 128 bytes) response from the IOI device.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/setup.c | 6 ++
arch/mips/include/asm/octeon/octeon.h | 12 ++--
2 files changed
additional lines, defaults to zero.
Signed-off-by: David Daney
Signed-off-by: Carlos Munoz
---
arch/mips/cavium-octeon/Kconfig| 27
arch/mips/cavium-octeon/setup.c| 16 ++--
.../asm/mach-cavium-octeon/kernel-entry-init.h | 20
Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/Kconfig | 8 +
arch/mips/cavium-octeon/Makefile | 1 +
arch/mips/cavium-octeon/octeon-fpa3.c | 364 ++
arch/mips/include/asm/octeon/octeon.h | 1
Signed-off-by: David Daney
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index aa71ab52fd76..e9239ff3cf05 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3249,6 +3249,12 @@ W: http://www.cavium.com
S: Supported
F: drivers/mmc
ernet Interface.
MIPS: Octeon: Enable LMTDMA/LMTST operations.
MIPS: Octeon: Add a global resource manager.
MIPS: Octeon: Add Free Pointer Unit (FPA) support.
netdev: octeon-ethernet: Add Cavium Octeon III support.
David Daney (3):
MIPS: Octeon: Automatically provision CVMSEG space.
st
Previous patch sets USE_ASYNC_IOBDMA to 1 unconditionally. Remove
USE_ASYNC_IOBDMA from all if statements. Remove dead code caused by
the change.
Signed-off-by: David Daney
---
drivers/staging/octeon/ethernet-defines.h | 6 ---
drivers/staging/octeon/ethernet-rx.c | 25
From: Carlos Munoz
Add bindings for Common Ethernet Interface (BGX) block.
Acked-by: Rob Herring
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
.../devicetree/bindings/net/cavium-bgx.txt | 61 ++
1 file changed, 61
From: Carlos Munoz
Add a global resource manager to manage tagged pointers within
bootmem allocated memory. This is used by various functional
blocks in the Octeon core like the FPA, Ethernet nexus, etc.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
On 11/21/2017 05:56 AM, Aleksandar Markovic wrote:
From: Miodrag Dinic
Add a new kernel parameter to override the default behavior related
to the decision whether to set up stack as non-executable in function
mips_elf_read_implies_exec().
The new parameter is used to control non executable sta
On 11/15/2017 11:18 AM, Rob Herring wrote:
On Thu, Nov 09, 2017 at 11:29:08AM -0800, David Daney wrote:
From: Carlos Munoz
Add bindings for Common Ethernet Interface (BGX) block.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
.../devicetree
On 11/13/2017 01:17 PM, Tim Harvey wrote:
Mark/Jan,
I have been unsuccessful getting a MCP251x SPI based CAN controller
working on a CN80xx using Linux mainline.
When a register is read from the mcp251x driver the
octeon_spi_do_transfer() gets a spi_message with a single spi_xfer of
len=3, a tx
Previous patch sets USE_ASYNC_IOBDMA to 1 unconditionally. Remove
USE_ASYNC_IOBDMA from all if statements. Remove dead code caused by
the change.
Signed-off-by: David Daney
---
drivers/staging/octeon/ethernet-defines.h | 6 ---
drivers/staging/octeon/ethernet-rx.c | 25
and then return a
variable length (up to 128 bytes) response from the IOI device.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/setup.c | 6 ++
arch/mips/include/asm/octeon/octeon.h | 12 ++--
2 files changed
Signed-off-by: David Daney
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9a24f56e0451..142af33adc35 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3212,6 +3212,12 @@ W: http://www.cavium.com
S: Supported
F: drivers/mmc
Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/Kconfig | 8 +
arch/mips/cavium-octeon/Makefile | 1 +
arch/mips/cavium-octeon/octeon-fpa3.c | 364 ++
arch/mips/include/asm/octeon/octeon.h | 1
additional lines, defaults to zero.
Signed-off-by: David Daney
Signed-off-by: Carlos Munoz
---
arch/mips/cavium-octeon/Kconfig| 27
arch/mips/cavium-octeon/setup.c| 16 ++--
.../asm/mach-cavium-octeon/kernel-entry-init.h | 20
From: Carlos Munoz
Add a global resource manager to manage tagged pointers within
bootmem allocated memory. This is used by various functional
blocks in the Octeon core like the FPA, Ethernet nexus, etc.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
From: Carlos Munoz
Add bindings for Common Ethernet Interface (BGX) block.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
.../devicetree/bindings/net/cavium-bgx.txt | 61 ++
1 file changed, 61 insertions(+)
create mode
pport.
netdev: octeon-ethernet: Add Cavium Octeon III support.
David Daney (3):
MIPS: Octeon: Automatically provision CVMSEG space.
staging: octeon: Remove USE_ASYNC_IOBDMA macro.
MAINTAINERS: Add entry for
drivers/net/ethernet/cavium/octeon/octeon3-*
.../devicetree/bindings/net/cavium-bg
I need to send v3. With this v2 set, there is a small bug in the RX
initialization that causes failure on little-endian kernels.
David.
On 11/08/2017 04:51 PM, David Daney wrote:
We are adding the Cavium OCTEON-III network driver. But since
interacting with the input and output queues is
additional lines, defaults to zero.
Signed-off-by: David Daney
Signed-off-by: Carlos Munoz
---
arch/mips/cavium-octeon/Kconfig| 27
arch/mips/cavium-octeon/setup.c| 16 ++--
.../asm/mach-cavium-octeon/kernel-entry-init.h | 20
Previous patch sets USE_ASYNC_IOBDMA to 1 unconditionally. Remove
USE_ASYNC_IOBDMA from all if statements. Remove dead code caused by
the change.
Signed-off-by: David Daney
---
drivers/staging/octeon/ethernet-defines.h | 6 ---
drivers/staging/octeon/ethernet-rx.c | 25
From: Carlos Munoz
Add a global resource manager to manage tagged pointers within
bootmem allocated memory. This is used by various functional
blocks in the Octeon core like the FPA, Ethernet nexus, etc.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
Signed-off-by: David Daney
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9a24f56e0451..142af33adc35 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3212,6 +3212,12 @@ W: http://www.cavium.com
S: Supported
F: drivers/mmc
Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/Kconfig | 8 +
arch/mips/cavium-octeon/Makefile | 1 +
arch/mips/cavium-octeon/octeon-fpa3.c | 364 ++
arch/mips/include/asm/octeon/octeon.h | 1
From: Carlos Munoz
Add bindings for Common Ethernet Interface (BGX) block.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
.../devicetree/bindings/net/cavium-bgx.txt | 61 ++
1 file changed, 61 insertions(+)
create mode
dt-bindings: Add Cavium Octeon Common Ethernet Interface.
MIPS: Octeon: Enable LMTDMA/LMTST operations.
MIPS: Octeon: Add a global resource manager.
MIPS: Octeon: Add Free Pointer Unit (FPA) support.
netdev: octeon-ethernet: Add Cavium Octeon III support.
David Daney (3):
MIPS: O
and then return a
variable length (up to 128 bytes) response from the IOI device.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/setup.c | 6 ++
arch/mips/include/asm/octeon/octeon.h | 12 ++--
2 files changed
On 11/07/2017 11:07 AM, Aleksey Makarov wrote:
From: Radoslaw Biernacki
This patch adds support for the Precision Time Protocol
Clocks and Timestamping hardware found on Cavium ThunderX
processors.
Signed-off-by: Radoslaw Biernacki
Signed-off-by: Aleksey Makarov
---
drivers/net/ethernet/ca
't know if anyone
is fixing this:
Yes, Steven sent a patch to fix this back on Oct. 2:
https://patchwork.linux-mips.org/patch/17400/
Ralf seems AWOL with respect to this issue.
Perhaps the alternate MIPS maintainer James Hogan can try to get the fix
merged.
David Daney
On 11/02/2017 12:13 PM, Florian Fainelli wrote:
On 11/01/2017 05:36 PM, David Daney wrote:
From: Carlos Munoz
The Cavium OCTEON cn78xx and cn73xx SoCs have network packet I/O
hardware that is significantly different from previous generations of
the family.
Add a new driver for this hardware
On 11/02/2017 11:04 AM, Florian Fainelli wrote:
On 11/02/2017 09:27 AM, David Daney wrote:
On 11/01/2017 08:29 PM, Florian Fainelli wrote:
Le 11/01/17 à 17:36, David Daney a écrit :
From: Carlos Munoz
From the hardware user manual: "The FPA is a unit that maintains
pools of pointe
On 11/02/2017 09:56 AM, Andrew Lunn wrote:
OK, now I think I understand. Yes, the MAC can be hardwired to a switch.
In fact, there are system designs that do exactly that.
We try to handle this case by not having a "phy-handle" property in the
device tree. The link to the remote device (switch
On 11/02/2017 09:10 AM, Andrew Lunn wrote:
On Thu, Nov 02, 2017 at 08:55:33AM -0700, David Daney wrote:
On 11/02/2017 05:43 AM, Andrew Lunn wrote:
[...]
+
+ i = atomic_inc_return(&pki_id);
+ pki_dev = platform_device_register_data(&new_
On 11/01/2017 08:29 PM, Florian Fainelli wrote:
Le 11/01/17 à 17:36, David Daney a écrit :
From: Carlos Munoz
From the hardware user manual: "The FPA is a unit that maintains
pools of pointers to free L2/DRAM memory. To provide QoS, the pools
are referenced indirectly through 1024
On 11/02/2017 05:47 AM, Andrew Lunn wrote:
On Wed, Nov 01, 2017 at 06:09:17PM -0700, Florian Fainelli wrote:
On 11/01/2017 05:36 PM, David Daney wrote:
From: Carlos Munoz
Add bindings for Common Ethernet Interface (BGX) block.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
On 11/02/2017 05:23 AM, Andrew Lunn wrote:
+static void res_mgr_lock(void)
+{
+ unsigned int tmp;
+ u64 lock = (u64)&res_mgr_info->rlock;
+
+ __asm__ __volatile__(
+ ".set noreorder\n"
+ "1: ll %[tmp], 0(%[addr])\n"
+ " bnez %[tmp],
t; MIX packet
processor, or to the "ethernet-mac-pki" PKI/PKO packet processor. The
SoCs supported by these drivers do not contain any hardware that would
be considered an "Ethernet switch".
I'm not sure I fully understand what your question is though, so I may
not have answered it.
David Daney
On 11/01/2017 06:09 PM, Florian Fainelli wrote:
On 11/01/2017 05:36 PM, David Daney wrote:
From: Carlos Munoz
Add bindings for Common Ethernet Interface (BGX) block.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
[snip]
+Properties
Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/Kconfig | 10 +
arch/mips/cavium-octeon/Makefile | 1 +
arch/mips/cavium-octeon/octeon-fpa3.c | 363 ++
arch/mips/include/asm/octeon/octeon.h | 1
From: Carlos Munoz
Add bindings for Common Ethernet Interface (BGX) block.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
.../devicetree/bindings/net/cavium-bgx.txt | 59 ++
1 file changed, 59 insertions(+)
create mode
additional lines, defaults to zero.
Signed-off-by: David Daney
Signed-off-by: Carlos Munoz
---
arch/mips/cavium-octeon/Kconfig| 27
arch/mips/cavium-octeon/setup.c| 16 ++--
.../asm/mach-cavium-octeon/kernel-entry-init.h | 20
From: Carlos Munoz
Add a global resource manager to manage tagged pointers within
bootmem allocated memory. This is used by various functional
blocks in the Octeon core like the FPA, Ethernet nexus, etc.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
n III support.
David Daney (2):
MIPS: Octeon: Automatically provision CVMSEG space.
MAINTAINERS: Add entry for
drivers/net/ethernet/cavium/octeon/octeon3-*
.../devicetree/bindings/net/cavium-bgx.txt | 59 +
MAINTAINERS|6 +
arch/mips/c
Signed-off-by: David Daney
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9a24f56e0451..142af33adc35 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3212,6 +3212,12 @@ W: http://www.cavium.com
S: Supported
F: drivers/mmc
and then return a
variable length (up to 128 bytes) response from the IOI device.
Signed-off-by: Carlos Munoz
Signed-off-by: Steven J. Hill
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/setup.c | 6 ++
arch/mips/include/asm/octeon/octeon.h | 12 ++--
2 files changed
On 10/27/2017 11:53 AM, Abderrahmane Benbachir wrote:
David Daney a écrit :
On 10/27/2017 11:22 AM, Thomas Gleixner wrote:
On Fri, 27 Oct 2017, David Daney wrote:
On 10/27/2017 09:47 AM, Abderrahmane Benbachir wrote:
Simple check to prevent kernel panic when initcall does not exit
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