dings/arm/cpus.txt?h=LA.UM.7.2.c25#n216
вт, 12 янв. 2021 г. в 13:51, Danny Lin :
sdm660 has a big.LITTLE 4+4 CPU setup with CPUs 0-3 being little
cores
and CPUs 4-7 being big cores. The big cores have higher IPC, so they
should have the higher capacity-dmips-mhz, not the other way around
as
rag0n/freqbench
[2] https://www.eembc.org/coremark/
[3] https://github.com/kdrag0n/freqbench/tree/master/results/sm8250/k30s
Signed-off-by: Danny Lin
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi
b/arch/
sm8250 has a big.LITTLE CPU setup with DynamIQ, so all cores are within
the same CPU cluster and LLC (Last-Level Cache) domain. Define this
topology to help the scheduler make decisions.
Signed-off-by: Danny Lin
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 36
1 file
11551 5.2 C/MHz736 mW 15.9 J 15.7 I/mJ21.7 s
[1] https://github.com/kdrag0n/freqbench
[2] https://www.eembc.org/coremark/
[3] https://github.com/kdrag0n/freqbench/tree/master/results/sdm660/main
Signed-off-by: Danny Lin
---
arch/arm64/boot/dts/qcom/sdm660.dtsi | 16 -
d-off-by: Danny Lin
---
arch/arm/boot/dts/exynos5250.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 2ea2caaca4e2..cc2fe0afcfc7 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boo
ires that all CPUs in the cluster are idling.
Signed-off-by: Danny Lin
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++--
1 file changed, 73 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi
b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 309e00
On Mon, Dec 28, 2020 at10:02 AM, Bjorn Andersson wrote:
> On Tue 22 Dec 20:00 CST 2020, Danny Lin wrote:
>
> > On Sun, Dec 20, 2020 at 7:48 PM, Bjorn Andersson wrote:
> > > On Sun 20 Dec 16:29 PST 2020, Danny Lin wrote:
> > >
> > > > Like other Qualcomm
On Sun, Dec 20, 2020 at 7:48 PM, Bjorn Andersson wrote:
> On Sun 20 Dec 16:29 PST 2020, Danny Lin wrote:
>
> > Like other Qualcomm SoCs, sm8150 exposes CPU and cluster idle states
> > through PSCI. Define the idle states to save power when the CPU is not
> > in active
worth noting that the CPU has an additional C3 power collapse idle
state between WFI and rail power collapse (with PSCI mode 0x4003),
but it is not officially used in downstream kernels due to "thermal
throttling issues."
Signed-off-by: Danny Lin
---
arch/arm64/boot/dts/qcom/s
https://github.com/kdrag0n/freqbench
[2] https://www.eembc.org/coremark/
[3] https://github.com/kdrag0n/freqbench/tree/master/results/sm8150/main
Signed-off-by: Danny Lin
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts
sm8150 has a big.LITTLE CPU setup with DynamIQ, so all cores are within
the same CPU cluster and LLC (Last-Level Cache) domain. Define this
topology to help the scheduler make decisions.
Signed-off-by: Danny Lin
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 36
1 file
These patches add support for high-level CPU power management on the
SM8150 platform. cpuidle and energy-aware scheduling are now working
with the new idle states and CPU energy model.
Danny Lin (3):
arm64: dts: qcom: sm8150: Define CPU topology
arm64: dts: qcom: sm8150: Add PSCI idle states
This comment was added before the multiqueue I/O scheduler framework
was introduced; multiqueue has support for I/O scheduling now, so this
obsolete comment can be removed.
Signed-off-by: Danny Lin
---
block/Kconfig | 2 --
1 file changed, 2 deletions(-)
diff --git a/block/Kconfig b/block
On Thursday, July 2, 2020 at 10:38 PM, Miguel Ojeda wrote:
> Hi Danny,
>
> On Fri, Jul 3, 2020 at 2:16 AM Danny Lin wrote:
> > +[*]
> > +charset = utf-8
> > +end_of_line = lf
>
> While UTF-8 and LF are probably OK for all files, I am not 100% sure
about:
o the kernel's general code style when
used in combination with clang-format.
For more information, check the official EditorConfig website:
https://editorconfig.org/
Signed-off-by: Danny Lin
---
v2:
- Added rules for most exceptions to the 8-column tab indent style
.ed
On Thu, Jan 31, 2019 at 2:14 AM, Rafael J. Wysocki wrote:
> On Thu, Jan 31, 2019 at 11:07 AM Viresh Kumar wrote:
> >
> > On 31-01-19, 11:03, Rafael J. Wysocki wrote:
> > > On Thu, Jan 31, 2019 at 9:30 AM Viresh Kumar
> > > wrote:
> > > >
> > > > The only problem that I can think of (or recall) i
o the kernel's general code style when
used in combination with clang-format.
For more information, check the official EditorConfig website:
https://editorconfig.org/
Signed-off-by: Danny Lin
---
.editorconfig | 16
.gitignore
d on arm64 for nearly a year
without any issues caused by this optimization.
Signed-off-by: Danny Lin
---
Makefile | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Makefile b/Makefile
index a60c98519c37..f04c3639cf61 100644
--- a/Makefile
+++ b/Makefile
@@ -772,10 +772,13 @@ ifdef CONFIG_C
sues/958
Cc: sta...@vger.kernel.org # v4.4+
Suggested-by: Fangrui Song
Signed-off-by: Danny Lin
Reviewed-by: Nathan Chancellor
---
v2:
- Fixed swapped example sizes
- Added .{data,bss}..L* sections, since it looks like they're emitted
in some cases even when LTO is disabled
includ
Jul 2, 2020 9:04:25 AM Nathan Chancellor :
> On Thu, Jul 02, 2020 at 08:54:53AM -0700, Kees Cook wrote:
>> On Thu, Jul 02, 2020 at 01:54:00AM -0700, Danny Lin wrote:
>>> A recent LLVM 11 commit [1] made LLD stop implicitly coalescing some
>>> temporary LLVM
0972 KiB
After:56 sections, 1171169 KiB
[1]
https://github.com/llvm/llvm-project/commit/9e33c096476ab5e02ab1c8442cc3cb4e32e29f17
Link: https://github.com/ClangBuiltLinux/linux/issues/958
Cc: sta...@vger.kernel.org # v4.4+
Suggested-by: Fangrui Song
Signed-off-by: Danny Lin
---
include/
is not necessarily the
best choice. For example, fq_pie can be better for DASH streaming, but
there could be more cases where it's the better choice of the two simple
AQMs available in the kernel.
Signed-off-by: Danny Lin
---
net/sched/Kconfig | 4
1 file changed, 4 insertions(+)
diff
Minor fix for a missing preposition in the error message that appears
when there are too many reserved memory regions for the allocated array
to store.
Signed-off-by: Danny Lin
---
drivers/of/of_reserved_mem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/of
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