On Thu, Feb 28, 2019 at 12:09 AM Greg Kroah-Hartman
wrote:
>
> On Wed, Feb 27, 2019 at 03:19:17PM -0700, Daniel Kurtz wrote:
> > In cases such as xhci_abort_cmd_ring(), xhci_handshake() is called with
> > a spin lock held (and local interrupts disabled) with a huge 5 second
>
s, let's replace the open coded io polling loop with one from
iopoll.h that uses a loop timed with the more presumably reliable ktime
infrastructure.
Signed-off-by: Daniel Kurtz
---
drivers/usb/host/xhci.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --
On Wed, Dec 5, 2018 at 4:28 AM Mark Brown wrote:
>
> On Wed, Dec 05, 2018 at 10:21:04AM +, Adam Thomson wrote:
>
> > If the previous I2C access failed, how can we be sure that the write back
> > to HW
> > of 0xFF even succeeds? More importantly these error returns won't
> > necessarily
> > s
Hi Akshu,
On Mon, Oct 29, 2018 at 1:39 AM Agrawal, Akshu wrote:
>
> During simultaneous running of playback and capture, we
> got hit by incorrect value write on common register. This was due
> to race condition between 2 streams.
> Fixing this by locking the common register access.
Nice catch!
rarily disabled IRQ and
incorrectly disable it while trying to modify some other register bits.
Fixes: 4c1de0414a1340 pinctrl/amd: poll InterruptEnable bits in enable_irq
Signed-off-by: Daniel Kurtz
---
drivers/pinctrl/pinctrl-amd.c | 33 +++--
1 file changed, 23 insertions(+)
Agrawal
Reviewed-by: Daniel Kurtz
> ---
> sound/soc/amd/acp-da7219-max98357a.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/sound/soc/amd/acp-da7219-max98357a.c
> b/sound/soc/amd/acp-da7219-max98357a.c
> index cf2f648..55d7f61 100644
> --- a
On Tue, Aug 21, 2018 at 12:55 AM Akshu Agrawal wrote:
>
> We support dual channel, 48Khz. This constraint was set only for
> da7219. It is being extended to DMIC and MAX98357a.
>
> Signed-off-by: Akshu Agrawal
Reviewed-by: Daniel Kurtz
> ---
> sound/soc/amd/acp-da
On Tue, Aug 21, 2018 at 12:53 AM Akshu Agrawal wrote:
>
> System clk provided in ST soc can be set to:
> 48Mhz, non-spread
> 25Mhz, spread
> To get accurate rate, we need it to set it at non-spread
> option which is 48Mhz.
>
> Signed-off-by: Akshu Agrawal
R
wo are the only write-able bits in this byte.
Therefore, it should be safe to just write these bits back as a byte
access without any additional locking.
Signed-off-by: Daniel Kurtz
---
drivers/pinctrl/pinctrl-amd.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git
sters. Calling regulator_get_voltage() on a dummy
regulator just returns -EINVAL, in which case the DA7219 is always set up
to use the default VDDIO voltage range of 2.5-3.6V.
Provide a new device property to let such systems specify a different
VDDIO if needed (e.g., 1.8V).
Signed-off-by: Daniel Kur
sters. Calling regulator_get_voltage() on a dummy
regulator just returns -EINVAL, in which case the DA7219 is always set up
to use the default VDDIO voltage range of 2.5-3.6V.
Provide a new device property to let such systems specify a different
VDDIO if needed (e.g., 1.8V).
Signed-off-by: Daniel K
Hi Daniel,
On Tue, Jul 17, 2018 at 6:30 AM Daniel Drake wrote:
>
> On Mon, Jul 16, 2018 at 7:57 PM, Daniel Kurtz wrote:
> > Commit 6afb10267c1692 ("pinctrl/amd: fix masking of GPIO interrupts")
> > changed to the clearing of interrupt status bits to a RMW in a criti
From: Akshu Agrawal
DA7219's VDDIO for our platform need to be configured for 1.8V.
Hence we register a fixed 1.8V voltage regulator in the machine driver.
Change-Id: I65fd93e1dd37c3e0d38265b4b1492ea53b93afd4
Signed-off-by: Akshu Agrawal
Signed-off-by: Daniel Kurtz
---
sound/soc/amd/Kc
Sound machine drivers tend to live in modules. Sometimes such a machine
driver needs to register a fixed regulator to provide to a codec.
Export regulator_register_always_on() such that this is possible.
Change-Id: I2906f96df278b5fa65d40d3a777bf6d3d91841d2
Signed-off-by: Daniel Kurtz
on both" to just the edge trigger case, and
refactor a bit to make the logic more readable.
Change-Id: Id7775ae4cb61d193fa7fbb83967a8c5a7cdd0de6
Signed-off-by: Daniel Kurtz
---
drivers/pinctrl/pinctrl-amd.c | 14 +++---
drivers/pinctrl/pinctrl-amd.h | 4
2 files changed, 11
wo are the only write-able bits in this byte.
Therefore, it should be safe to just write these bits back as a byte
access without any additional locking.
Signed-off-by: Daniel Kurtz
---
drivers/pinctrl/pinctrl-amd.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git
ote: Is it possible that this bug was the source of the interrupt storm
on Ryzen when using chained interrupts before commit ba714a9c1dea85
("pinctrl/amd: Use regular interrupt instead of chained")?
Signed-off-by: Daniel Kurtz
---
drivers/pinctrl/pinctrl-amd.c | 3 ++-
1 file changed
It is always correct to subtract out the starting bytescount value. Even
in the case of 2^64 byte rollover (292 Million Years in the future
@ 48000 Hz) the math still works out.
Signed-off-by: Daniel Kurtz
---
sound/soc/amd/acp-pcm-dma.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions
rrupt anyway, disable it to save quite a few unnecessary interrupts.
The real "work" (calling snd_pcm_period_elapsed()) is done when transfer
from ACP to SYSRAM is complete.
Signed-off-by: Daniel Kurtz
---
sound/soc/amd/acp-pcm-dma.c | 15 ---
1 file changed, 15 deletions(-)
dif
ay/capture
repeated samples after the upstream circular DMA channel has already
stopped.
Signed-off-by: Daniel Kurtz
---
sound/soc/amd/acp-pcm-dma.c | 17 ++---
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-d
ction, so remove this unnecessary code.
Signed-off-by: Daniel Kurtz
---
sound/soc/amd/acp-pcm-dma.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c
index 4665ae12e74e4..e6f85f2e5ac2a 100644
--- a/sound/soc/amd/ac
On capture, audio data is first copied from I2S to ACP memory, and then
to SYSRAM. For each step the channel number increases, so the names in
the driver were wrong.
Signed-off-by: Daniel Kurtz
---
sound/soc/amd/acp-pcm-dma.c | 24
sound/soc/amd/acp.h | 8
Now that the I2S channel names are fixed, and DMA data flow order is
consistent (ch1 then ch2), we can simplify channel start order:
start the upstream channel and then the downstream channel for both
playback and capture cases.
Signed-off-by: Daniel Kurtz
---
sound/soc/amd/acp-pcm-dma.c | 9
w pointer.
> Signed-off-by: Akshu Agrawal
Reviewed-by: Daniel Kurtz
Tested-by: Daniel Kurtz
> ---
> sound/soc/amd/acp-pcm-dma.c | 72
+++--
> 1 file changed, 10 insertions(+), 62 deletions(-)
> diff --git a/sound/soc/amd/acp-pcm-dma.c b/s
gs to access the
> clock registers and enable the clock driver to expose the clock
> for use of drivers which will connect to it.
> Signed-off-by: Akshu Agrawal
Reviewed-by: Daniel Kurtz
> ---
> v2: Submitted with dependent patch, removed unneeded kfree for
devm_kzalloc
>
On Wed, May 9, 2018 at 4:01 AM Akshu Agrawal wrote:
> Stoney SoC provides oscout clock. This clock can support 25Mhz and
> 48Mhz of frequency.
> The clock is available for general system use.
> Signed-off-by: Akshu Agrawal
Reviewed-by: Daniel Kurtz
> ---
> v2: config chan
On Thu, May 3, 2018 at 10:35 PM Agrawal, Akshu
wrote:
> On 5/3/2018 10:10 PM, Daniel Kurtz wrote:
> > On Thu, May 3, 2018 at 1:33 AM Mukunda,Vijendar <
vijendar.muku...@amd.com>
> > wrote:
> >
> >
> >
> >> On Thursday 03 May 2018 11:13 AM, Dani
the driver is usable only by DT.
> The device_property (though ACPI specific) makes this code, a common
> code for DT and ACPI based devices.
> https://www.kernel.org/doc/Documentation/acpi/DSD-properties-rules.txt
> "Still, for the sake of code re-use, it may make sense to provide as
> much of the configuration data as possible in the form of device
> properties and complement that with an ACPI-specific mechanism suitable
> for the use case at hand.."
This sounds like a pretty reasonable justification for addressing the issue
using DSD to me.
For what its worth, you can add:
Reviewed-by: Daniel Kurtz
> Thanks,
> Akshu
On Thu, May 3, 2018 at 1:33 AM Mukunda,Vijendar
wrote:
> On Thursday 03 May 2018 11:13 AM, Daniel Kurtz wrote:
> > Some checkpatch nits below...
> >
> > On Tue, May 1, 2018 at 2:53 PM Vijendar Mukunda <
vijendar.muku...@amd.com>
> > wrote:
> >
> >&
Some checkpatch nits below...
On Tue, May 1, 2018 at 2:53 PM Vijendar Mukunda
wrote:
> With in ACP, There are three I2S controllers can be
> configured/enabled ( I2S SP, I2S MICSP, I2S BT).
> Default enabled I2S controller instance is I2S SP.
> This patch provides required changes to support I2S
: Vijendar Mukunda
Reviewed-by: Daniel Kurtz
> ---
> sound/soc/amd/acp-da7219-max98357a.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
> diff --git a/sound/soc/amd/acp-da7219-max98357a.c
b/sound/soc/amd/acp-da7219-max98357a.c
> index 6495eed..fa5ad5b 100644
> --- a/
On Thu, Apr 26, 2018 at 5:18 AM Vijendar Mukunda
wrote:
> From: Akshu Agrawal
> Marking snd_soc_ops instances const
> Signed-off-by: Akshu Agrawal
> Signed-off-by: Vijendar Mukunda
Reviewed-by: Daniel Kurtz
> ---
> sound/soc/amd/acp-da7219-max98357a.c | 6 +++---
>
Hi Vijendar,
On Thu, Apr 26, 2018 at 5:14 AM Vijendar Mukunda
wrote:
> Added dma configuration parameters to rtd structure.
> Moved dma configuration parameters intialization to
> hw_params callback.
> Removed hard coding in prepare and trigger callbacks.
> Signed-off-by: Vijendar Mukunda
> --
On Thu, Apr 26, 2018 at 5:16 AM Vijendar Mukunda
wrote:
> Added pte offset variable in audio_substream_data structure.
> Added Stoney related PTE offset macros in acp header file.
> Modified hw_params callback to assign the pte offset value
> based on asic_type.
> Signed-off-by: Vijendar Mukunda
On Thu, Apr 26, 2018 at 5:16 AM Vijendar Mukunda
wrote:
> Added sram bank variable to audio_substream_data structure.
> Signed-off-by: Vijendar Mukunda
Move initialization to acp_dma_open(), otherwise this is:
Reviewed-by: Daniel Kurtz
> ---
> sound/soc/amd/acp-pc
Hi Vijendar,
On Thu, Apr 26, 2018 at 5:15 AM Vijendar Mukunda
wrote:
> Removed separate byte count variables for playback and capture.
> Signed-off-by: Vijendar Mukunda
Reviewed-by: Daniel Kurtz
> ---
> sound/soc/amd/acp-pcm-dma.c | 19 +--
> soun
viewed-by: Daniel Kurtz
> ---
> sound/soc/amd/acp-pcm-dma.c | 36 +++-
> sound/soc/amd/acp.h | 2 ++
> 2 files changed, 17 insertions(+), 21 deletions(-)
> diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c
> in
On Mon, Apr 23, 2018 at 9:03 PM Vijendar Mukunda
wrote:
> From: Akshu Agrawal
> hw_param can be called multiple times and thus we can have
> more clk enable. The clk may not get diabled due to refcounting.
> startup/shutdown ensures single clk enable/disable call.
> Signed-off-by: Akshu Agrawa
Hi Vijendar,
On Mon, Apr 23, 2018 at 9:02 PM Vijendar Mukunda
wrote:
> Added dma configuration parameters in audio_substream_data
> structure. Moved dma configuration parameters initialization
> to dma hw params callback.
> Removed separate byte count variables for playback and capture.
> Added
Hi Vijendar,
On Wed, Apr 18, 2018 at 5:02 AM Vijendar Mukunda
wrote:
> With in ACP, There are three I2S controllers can be
> configured/enabled ( I2S SP, I2S MICSP, I2S BT).
> Default enabled I2S controller instance is I2S SP.
> This patch provides required changes to support I2S BT
> controller
3509] 880107d4dd00: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
fc
[6.613509]
==
Fixes: 51f7415039d4 ("drm/amd/amdgpu: creating two I2S instances for stoney/cz")
Signed-off-by: Daniel Kurtz
---
drivers/gpu/drm/amd
nment using pointer array")
e4a9ea5ee7c8 ("tracing: Replace trace_event struct array with pointer array")
Let's use this same "array of pointers to structs" approach for
EARLYCON_TABLE.
Fixes: 99492c39f39f ("earlycon: Fix __earlycon_table stride")
Signed-
0 specific tuning for HS200, and otherwise
call back to the standard sdhci_execute_tuning().
Signed-off-by: Daniel Kurtz
---
drivers/mmc/host/sdhci-pci-core.c | 25 +++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci-pci-core.c
b/driver
Hi Jeffy,
Sorry for delayed response.
On Mon, Mar 26, 2018 at 1:58 AM JeffyChen wrote:
> Hi Daniel,
> Thanks for your reply.
> On 03/26/2018 02:31 PM, Daniel Kurtz wrote:
> >> >+struct rk_iommudata {
> >> >+ struct rk_iommu *iommu;
> >> >
u_ops = {
> .add_device = rk_iommu_add_device,
> .remove_device = rk_iommu_remove_device,
> .iova_to_phys = rk_iommu_iova_to_phys,
> + .device_group = generic_device_group,
> .pgsize_bitmap = RK_IOMMU_PGSIZE_BITMAP,
> + .of_xlate
On Fri, Mar 23, 2018 at 7:34 AM Greg Kroah-Hartman <
gre...@linuxfoundation.org> wrote:
> On Tue, Mar 20, 2018 at 11:57:10AM -0600, Daniel Kurtz wrote:
> > The __earlycon_table lives in a special "__earlycon_table" section. The
> > contents of this table are added
nment using pointer array")
e4a9ea5ee7c8 ("tracing: Replace trace_event struct array with pointer array")
Let's use this same "array of pointers to structs" approach for
EARLYCON_TABLE.
Fixes: 99492c39f39f ("earlycon: Fix __earlycon_table stride")
Signed-o
nment using pointer array")
e4a9ea5ee7c8 ("tracing: Replace trace_event struct array with pointer array")
Let's use this same "array of pointers to structs" approach for
EARLYCON_TABLE.
Change-Id: Ic42c4db0c8b034fa6aa2bf02eef0fdc159478ac4
Fixes: 99492c39f39f ("
tion alignment using pointer array")
e4a9ea5ee7c8 ("tracing: Replace trace_event struct array with pointer array")
Let's use this same "array of pointers to structs" approach for
EARLYCON_TABLE.
Fixes: 99492c39f39f ("earlycon: Fix __earlycon_table stride")
Signed-o
tion alignment using pointer array")
e4a9ea5ee7c8 ("tracing: Replace trace_event struct array with pointer array")
Let's use this same "array of pointers to structs" approach for
EARLYCON_TABLE.
Fixes: 99492c39f39f ("earlycon: Fix __earlycon_table stride")
Sign
the series is a fix that should hopefully fix a kbuild error that
seems to be triggered by Patch 2.
Daniel Kurtz (2):
serial: sh-sci: Remove __initdata attribute for struct 'port_cfg'
earlycon: Use a pointer table to fix __earlycon_table stride
drivers/of/fdt.c |
truct sci_port sci_ports[SCI_NPORTS];
Thus, there is a non-__initdata variable containing the address of a
__initdata struct.
Fix this section type conflict by just removing the __initdata attribute.
Fixes: dd076cffb8cd ("serial: sh-sci: Fix init data attribute for struct
'port_
On Thu, Mar 15, 2018 at 7:04 AM Andy Shevchenko <
andriy.shevche...@linux.intel.com> wrote:
> On Wed, 2018-03-14 at 20:04 -0600, Daniel Kurtz wrote:
> > The old_serial_port global array in 8250_core is supposed to hold an
> > entry
> > for each serial port on the syste
On Wed, Mar 14, 2018 at 8:33 PM Randy Dunlap wrote:
> On 03/14/2018 06:48 PM, Daniel Kurtz wrote:
> > Commit 470ca0de69fe ("serial: earlycon: Enable earlycon without command
> > line param") added EARLYCON_TABLE().
> >
> > Commit 99492c39f39f ("earlycon
skip initialization of old serial ports that do
not exist on these SoCs.
Daniel Kurtz (3):
serial: 8250_early: Add earlycon support for AMD Carrizo / Stoneyridge
ACPI: SPCR: Add support for AMD CT/SZ
serial: core: Allow skipping old serial port initialization
drivers/acpi/sp
: Daniel Kurtz
Reviewed-by: Andy Shevchenko
---
Changes since v1:
* added Reviewed-by
drivers/acpi/spcr.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
index 9d52743080a4..52d840d0e05b 100644
--- a/drivers/acpi/spcr.c
+++ b
-existing serial port.
Create a global variable to allow skipping old serial port initialization
and wire it up to the AMDCZ ACPI SPCR quirk and the special amdcz earlycon
setup handler.
Signed-off-by: Daniel Kurtz
---
Changes since v1:
* Rename variable to serial8250_skip_old_ports
* Also set
skip initialization of old serial ports that do
not exist on these SoCs.
Daniel Kurtz (3):
serial: 8250_early: Add earlycon support for AMD Carrizo / Stoneyridge
ACPI: SPCR: Add support for AMD CT/SZ
serial: core: Allow skipping old serial port initialization
drivers/acpi/sp
AMD Carrizo / Stoneyridge use a DesignWare 8250 UART that uses a 48 MHz
input clock.
Allow these platforms to set up this clock by specifying a kernel command
line like:
earlycon=amdcz,mmio32,0xfedc6000,115200
Signed-off-by: Daniel Kurtz
Suggested-by: Andy Shevchenko
Reviewed-by: Andy
On Wed, Mar 14, 2018 at 7:48 PM Daniel Kurtz wrote:
> Commit 470ca0de69fe ("serial: earlycon: Enable earlycon without command
> line param") added EARLYCON_TABLE().
> Commit 99492c39f39f ("earlycon: Fix __earlycon_table stride") referenced
> commit 07fca0e5
654986462939 ("tracepoints: Fix section alignment
using pointer array") and commit e4a9ea5ee7c8 ("tracing: Replace
trace_event struct array with pointer array").
Let's do the same "array of pointers to structs" approach for
EARLYCON_TABLE.
Signed-off-by: Da
On Wed, Mar 14, 2018 at 6:55 PM Kees Cook wrote:
> On Wed, Mar 14, 2018 at 5:23 PM, Daniel Kurtz
wrote:
> > On Wed, Mar 14, 2018 at 5:00 PM Kees Cook wrote:
> >
> >> On Wed, Mar 14, 2018 at 3:58 PM, Kees Cook
wrote:
> >> > On Wed, Mar 14, 2018 at 2:44 PM, D
On Wed, Mar 14, 2018 at 5:00 PM Kees Cook wrote:
> On Wed, Mar 14, 2018 at 3:58 PM, Kees Cook wrote:
> > On Wed, Mar 14, 2018 at 2:44 PM, Daniel Kurtz
wrote:
> > Sorry for being dense. What tree is this against? I can't find mention
> > of amdcz in Linus's tree
: Daniel Kurtz
Reviewed-by: Andy Shevchenko
---
drivers/acpi/spcr.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
index 9d52743080a4..52d840d0e05b 100644
--- a/drivers/acpi/spcr.c
+++ b/drivers/acpi/spcr.c
@@ -73,6 +73,24
AMD Carrizo / Stoneyridge use a DesignWare 8250 UART that uses a 48 MHz
input clock.
Allow these platforms to set up this clock by specifying a kernel command
line like:
earlycon=amdcz,mmio32,0xfedc6000,115200
Signed-off-by: Daniel Kurtz
Suggested-by: Andy Shevchenko
Reviewed-by: Andy
-existing serial port.
Create a global variable to allow skipping old serial port initialization
and wire it up to the AMDCZ ACPI SPCR quirk and the special amdcz earlycon
setup handler.
Signed-off-by: Daniel Kurtz
---
Changes since v1:
* Rename variable to serial8250_skip_old_ports
* Also set
skip initialization of old serial ports that do
not exist on these SoCs.
Daniel Kurtz (3):
serial: 8250_early: Add earlycon support for AMD Carrizo / Stoneyridge
ACPI: SPCR: Add support for AMD CT/SZ
serial: core: Allow skipping old serial port initialization
drivers/acpi/sp
Hi Ricardo,
On Wed, Mar 14, 2018 at 4:54 AM Ricardo Ribalda Delgado <
ricardo.riba...@gmail.com> wrote:
> Hi Daniel
> On Wed, Mar 14, 2018 at 1:36 AM, Daniel Kurtz
wrote:
> >
> > AMD Carrizo / Stoneyridge use a DesignWare 8250 UART that uses a 48 MHz
> > in
: Daniel Kurtz
---
drivers/acpi/spcr.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
index 9d52743080a4..52d840d0e05b 100644
--- a/drivers/acpi/spcr.c
+++ b/drivers/acpi/spcr.c
@@ -73,6 +73,24 @@ static bool
will appear to disappear (when the bogus old takes over) and
then re-appear (when the real UART finally gets registered for the
console).
Create a global variable to allow skipping old serial port initialization
and wire it up to the special amdcz earlycon setup handler.
Signed-off-by: Daniel Kurtz
AMD Carrizo / Stoneyridge use a DesignWare 8250 UART that uses a 48 MHz
input clock.
Allow these platforms to set up this clock by specifying a kernel command
line like:
earlycon=amdcz,mmio32,0xfedc6000,115200
Signed-off-by: Daniel Kurtz
---
drivers/tty/serial/8250/8250_early.c | 15
for earlycon
declarations") added the compatible field, which bumped EARLYCON_TABLE()
alignment to 128 bytes (LCM of size of all fields of struct earlycon_id.
Correct the struct definition and linker alignment to match.
Signed-off-by: Daniel Kurtz
---
include/asm-generic/vmlinux.lds.h | 2 +
o ensure interrupts have truly been enabled in hardware before
returning from the irq_enable handler.
Signed-off-by: Daniel Kurtz
---
drivers/pinctrl/pinctrl-amd.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index dae
On Thu, Mar 1, 2018 at 11:43 AM Daniel Kurtz wrote:
> Currently when an earlycon is registered, the uartclk is assumed to be
> BASE_BAUD * 16 = 1843200. If a baud rate is specified in the earlycon
> options, then 8250_early's init_port will program the UART clock divider
> r
UART clock used early in boot before the real serial drivers have a
chance to load and read their input clock configuration from ACPI.
Add a Kconfig option to override this default hard coded value.
Signed-off-by: Daniel Kurtz
---
arch/x86/Kconfig | 9 +
arch/x86/include/asm
will appear to disappear (when the bogus old takes over) and
then re-appear (when the real UART finally gets registered for the
console).
Add a Kconfig option to allow overriding this default hard coded value
for arch/x86 devices that do not have such serial ports.
Signed-off-by: Daniel Kurtz
On Thu, Mar 1, 2018 at 1:02 PM Andy Shevchenko
wrote:
> On Thu, Mar 1, 2018 at 9:22 PM, Daniel Kurtz wrote:
> > On Thu, Mar 1, 2018 at 11:47 AM Andy Shevchenko <
andy.shevche...@gmail.com>
> > wrote:
> > "earlycon simply does not utilize the information&
On Thu, Mar 1, 2018 at 11:47 AM Andy Shevchenko
wrote:
> On Thu, Mar 1, 2018 at 8:43 PM, Daniel Kurtz wrote:
> Please, hold on with new versions.
> I'm not satisfied (yet?) by the approach.
Copying over your comment on v1:
> It needs to be discussed.
Sure.
> First of a
on options parameter to allow specification
of a uartclk, like so:
earlycon=uart,mmio32,0xfedc6000,115200,4800
If none is specified, fall-back to prior behavior - 1843200.
Signed-off-by: Daniel Kurtz
---
Documentation/admin-guide/kernel-parameters.txt | 3 +++
drivers/tty/serial/
on options parameter to allow specification
of a uartclk, like so:
earlycon=uart,mmio32,0xfedc6000,115200,4800
If none is specified, fall-back to prior behavior - 1843200.
Signed-off-by: Daniel Kurtz
---
drivers/tty/serial/earlycon.c | 8 ++--
include/linux/serial_core.h | 2 +-
2 fil
e correct value for direction.
Signed-off-by: Daniel Kurtz
---
drivers/pinctrl/pinctrl-amd.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index 61d830c2bc17..281b700fe7e9 100644
--- a/drivers/pinctrl/pinctrl-amd.c
t;
> Issue 2:
> In previous code, we can not set the correct clock frequency when
> div equals 0xff.
>
> Signed-off-by: Yong Mao
> Signed-off-by: Chaotian Jing
Reviewed-by: Daniel Kurtz
> ---
> drivers/mmc/host/mtk-sd.c |4 ++--
> 1 file changed, 2 insertions(+), 2 d
This function is only called once at boot by device_initcall(), so mark
it as __init.
Signed-off-by: Daniel Kurtz
---
drivers/cpufreq/mt8173-cpufreq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c
index
On Thu, Mar 2, 2017 at 7:06 PM, Viresh Kumar wrote:
>
> On 02-03-17, 19:03, Daniel Kurtz wrote:
> > This function is only called once at boot by device_initcall(), so mark
> > it as __init.
> >
> > Signed-off-by: Daniel Kurtz
> > ---
> > drivers/c
This function is only called once at boot by device_initcall(), so mark
it as __init.
Signed-off-by: Daniel Kurtz
---
drivers/cpufreq/mt8173-cpufreq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c
index
On Wed, Mar 1, 2017 at 5:56 PM, Yong Mao wrote:
> On Tue, 2017-02-28 at 14:56 +0800, Daniel Kurtz wrote:
>> On Fri, Feb 24, 2017 at 5:38 PM, Yong Mao wrote:
>> > From: Yong Mao
>> > To: Daniel Kurtz
>> > Subject:Re: [PATCH v1] mmc: mediatek: F
machine compatible string, add
support for the whole family.
Signed-off-by: Daniel Kurtz
---
This patch is based on the compatibles added by the MT8176 series:
https://patchwork.kernel.org/patch/9573209/
https://patchwork.kernel.org/patch/9573213/
v2:
- use of_match_node (Thanks, Viresh!)
drivers
compatible string, add
support for the whole family.
Signed-off-by: Daniel Kurtz
---
This patch is based on the compatibles added by the MT8176 series:
https://patchwork.kernel.org/patch/9573209/
https://patchwork.kernel.org/patch/9573213/
drivers/cpufreq/mt8173-cpufreq.c | 25
On Fri, Feb 24, 2017 at 5:38 PM, Yong Mao wrote:
> From: Yong Mao
> To: Daniel Kurtz
> Subject:Re: [PATCH v1] mmc: mediatek: Fixed bug where clock frequency
> could be set wrong
> Date: Fri, 24 Feb 2017 17:33:37 +0800
>
>
> On Fri, 2017-02-24 at 17:52 +
On Fri, Feb 24, 2017 at 5:22 PM, Yong Mao wrote:
>
> From: yong mao
>
> This patch can fix two issues:
>
> Issue 1:
> The maximum value of clock divider is 0xff.
> Because the type of div is u32, div may be larger than max_div.
> In this case, we should use max_div to set the clock frequency.
>
>
The MT8176 is a member of the MT817x family of SoCs.
Its device tree inherits from mt817x, and only describes the mt8176
specific cpu map and cooling contributions.
Signed-off-by: Yidi Lin
Signed-off-by: Daniel Kurtz
---
arch/arm64/boot/dts/mediatek/mt8176.dtsi | 107
mt8173.dtsi only describes the mt8173
specific cpu map and cooling contributions.
Also rename mt817x-pinfunc.h, since it applies to the whole family.
Signed-off-by: Yidi Lin
Signed-off-by: Daniel Kurtz
---
Changes in v2:
- Add mt8176 in its own patch.
arch/arm64/boot/dts/mediatek/mt8173.dtsi
and therefore the
arguments are unused.
With an updated commit message, this patch is:
Reviewed-by: Daniel Kurtz
>
> Signed-off-by: Minghsiu Tsai
> ---
> drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c | 9 -
> drivers/media/platform/mtk-vcodec/vdec_vpu_if.c|
On Fri, Jan 27, 2017 at 12:35 AM, Dmitry Torokhov wrote:
> On Thu, Jan 26, 2017 at 8:29 AM, Daniel Kurtz wrote:
>> Hi Robin,
>>
>> On Thu, Jan 26, 2017 at 1:59 AM, Robin Murphy wrote:
>>>
>>> On 25/01/17 10:24, Daniel Kurtz wrote:
>>> > Hi
Hi Robin,
On Thu, Jan 26, 2017 at 1:59 AM, Robin Murphy wrote:
>
> On 25/01/17 10:24, Daniel Kurtz wrote:
> > Hi Robin,
> >
> > On Tue, Jan 24, 2017 at 11:14 PM, Robin Murphy wrote:
> >> Hi Dan,
> >
> > [snip...]
> >
> >>> And I re
a buffer is not aligned, we cannot use DMA, and must use FIFO based
transaction instead.
So, this patch implements a scheme that allows using the FIFO for
arbitrary length transactions (larger than the 32-byte FIFO size) by
reloading the FIFO in the interrupt handler.
Signed-off-by: Daniel Kurtz
uf() returns -ENOMEM (-12).
Fix this by using the real spi_master's parent device which should be a
real physical device with DMA properties.
Signed-off-by: Daniel Kurtz
Fixes: c37f45b5f1cd ("spi: support spi without dma channel to use can_dma()")
Cc: Leilk Liu
---
drivers/spi/spi
Hi Robin,
On Tue, Jan 24, 2017 at 11:14 PM, Robin Murphy wrote:
> Hi Dan,
[snip...]
>> And I really don't know why we needed to set the coherent_dma_mask to 0 to
>> avoid SPI transaction errors.
>
> Following what I mentioned above, "git grep dma_alloc drivers/spi" makes
> it seem like coherent
0x. In fact, using a non-zero dma_mask doesn't actually work
and causes frequent SPI transaction errors. To work around this, we
also explicitly set coherent_dma_mask to 0.
Signed-off-by: Daniel Kurtz
---
I don't know the right place to configure the dma_ops for spi_master.
It
On Tue, Jan 24, 2017 at 9:35 AM, Bibby Hsieh wrote:
>
> Hi, Daniel,
>
> Thanks for your comment.
>
> On Tue, 2017-01-03 at 14:27 +0800, Daniel Kurtz wrote:
> > On Fri, Dec 30, 2016 at 2:26 PM, Bibby Hsieh
> > wrote:
> > >
> > > MT8173 overlay ca
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