On 02/05/2013 01:29 PM, Linus Walleij wrote:
On Tue, Feb 5, 2013 at 5:47 PM, Mark Brown
wrote:
On Tue, Feb 05, 2013 at 05:21:48PM +0100, Linus Walleij wrote:
For IRQ mode, use the completion callback to push each cookie
to NAPI, and thus let the IRQ drive the traffic.
The whole purpose of N
On 02/05/2013 07:41 AM, Russell King - ARM Linux wrote:
On Mon, Feb 04, 2013 at 04:54:45PM -0500, Cyril Chemparathy wrote:
You're assuming that cookies complete in order. That is not necessarily
true.
Under what circumstances is that not true?
Notably when hardware can prioritize ce
On 02/05/2013 07:38 AM, Russell King - ARM Linux wrote:
On Mon, Feb 04, 2013 at 09:47:38PM +, Arnd Bergmann wrote:
On Monday 04 February 2013, Linus Walleij wrote:
So I think the above concerns are moot. The callback we can
set on cookies is entirely optional, and it's even implemented by
e
On 02/04/2013 03:29 PM, Linus Walleij wrote:
On Mon, Feb 4, 2013 at 8:22 PM, Cyril Chemparathy wrote:
Based on our experience with fitting multiple subsystems on top of this
DMA-Engine driver, I must say that the DMA-Engine interface has proven
to be a less than ideal fit for the network
On 02/04/2013 04:11 PM, Linus Walleij wrote:
On Mon, Feb 4, 2013 at 9:33 PM, Mark Brown
wrote:
On Mon, Feb 04, 2013 at 09:29:46PM +0100, Linus Walleij wrote:
On Mon, Feb 4, 2013 at 8:22 PM, Cyril Chemparathy wrote:
Based on our experience with fitting multiple subsystems on top of this
On 02/04/2013 12:02 PM, Felipe Balbi wrote:
Hi,
On Mon, Feb 04, 2013 at 08:54:17PM +0300, Sergei Shtylyov wrote:
On Mon, Feb 04, 2013 at 08:36:38PM +0300, Sergei Shtylyov wrote:
opted out of it. From the top of my head we have CPPI 3.x, CPPI 4.1,
Inventra DMA, OMAP sDMA and ux500 DMA engines s
On 02/01/2013 12:33 PM, Subash Patel wrote:
Hi Nicolas,
On Thursday 31 January 2013 07:35 PM, Nicolas Pitre wrote:
On Fri, 1 Feb 2013, Hui Wang wrote:
Cyril Chemparathy wrote:
From: Vitaly Andrianov
This patch fixes the alloc_init_pud() function to use phys_addr_t
instead of
unsigned long
On 02/01/2013 10:14 AM, Russell King - ARM Linux wrote:
On Fri, Feb 01, 2013 at 10:10:37AM -0500, Cyril Chemparathy wrote:
With this, I ran simple network and filesystem performance tests to
compare the code-patching vs. non-code-patching variants. These tests
didn't yield any signif
Hi Nico,
On 01/31/2013 11:00 PM, Nicolas Pitre wrote:
On Thu, 31 Jan 2013, Cyril Chemparathy wrote:
This series is a repost of the LPAE related changes in preparation for the
introduction of the Keystone sub-architecture. The original series has now
been split, and this particular series
NG_MAX) by
checking bank->start against the physical address corresponding to vmalloc_min
instead.
In the process, this patch also cleans up parts of the highmem sanity check
code by removing what has now become a redundant check for banks that entirely
overlap with the vmalloc range.
Signed-off-
: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
Acked-by: Nicolas Pitre
Reviewed-by: Catalin Marinas
---
arch/arm/include/asm/proc-fns.h | 22 +-
arch/arm/mm/context.c |9 ++---
2 files changed, 19 insertions(+), 12 deletions(-)
diff --git a/arch/arm
From: Vitaly Andrianov
This patch fixes the initrd setup code to use phys_addr_t instead of assuming
32-bit addressing. Without this we cannot boot on systems where initrd is
located above the 4G physical address limit.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
Acked
by the !highmem condition.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
Acked-by: Nicolas Pitre
---
arch/arm/mm/mmu.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 85ed732..2a02ff0 100644
similar changes
elsewhere in the ARM memory management code.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
Acked-by: Nicolas Pitre
Acked-by: Catalin Marinas
---
arch/arm/mm/mmu.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mm/mmu.c b/arch
cts argument of type 'long
unsigned int', but argument 2 has type 'phys_addr_t' [-Wformat]
This patch fixes this warning by pinning down the PFN type to unsigned long.
Signed-off-by: Cyril Chemparathy
---
arch/arm/include/asm/memory.h |2 +-
1 file changed, 1 insertion(
: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
Acked-by: Nicolas Pitre
---
arch/arm/mm/init.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index ad722f1..1c5151a 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
thing.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
Reviewed-by: Nicolas Pitre
Reviewed-by: Catalin Marinas
---
arch/arm/include/asm/page.h |2 +-
arch/arm/include/asm/pgtable-3level.h |6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git
be mapped in
a monotonically increasing fashion if there are multiple banks of memory,
i.e., x < y must => pa(x) < pa(y).
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
Acked-by: Nicolas Pitre
---
arch/arm/mm/mmu.c | 22 ++
1 file changed, 10 i
for membank overlap with
[12/13] ARM: mm: clean up membank size limit checks
(v4) unchanged from v3
(v3) unchanged from v2
(v2) unchanged from v1
[13/13] ARM: fix type of PHYS_PFN_OFFSET to unsigned long
(v4) introduced here
Cyril Chemparathy (10):
ARM: LPAE: use signed arithmetic
This patch moves the TTBR1 offset calculation and the T1SZ calculation out
of the TTB setup assembly code. This should not affect functionality in
any way, but improves code readability as well as readability of subsequent
patches in this series.
Signed-off-by: Cyril Chemparathy
Signed-off-by
This patch modifies the switch_mm() processor functions to use phys_addr_t.
On LPAE systems, we now honor the upper 32-bits of the physical address that
is being passed in, and program these into TTBR as expected.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
Reviewed-by
This patch adds an architecture defined override for ARCH_LOW_ADDRESS_LIMIT.
On PAE systems, the absence of this override causes bootmem to incorrectly
limit itself to 32-bit addressable physical memory.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
---
arch/arm/include/asm
This patch redefines the early boot time use of the R4 register to steal a few
low order bits (ARCH_PGD_SHIFT bits) on LPAE systems. This allows for up to
38-bit physical addresses.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
---
arch/arm/include/asm/memory.h | 16
Hi Dave,
Thanks for the detailed review...
On 9/24/2012 8:06 AM, Dave Martin wrote:
On Fri, Sep 21, 2012 at 11:55:59AM -0400, Cyril Chemparathy wrote:
The original phys_to_virt/virt_to_phys patching implementation relied on early
patching prior to MMU initialization. On PAE systems running
On 09/24/12 09:38, Russell King - ARM Linux wrote:
On Fri, Sep 21, 2012 at 11:56:07AM -0400, Cyril Chemparathy wrote:
From: Vitaly Andrianov
This patch fixes the initrd setup code to use phys_addr_t instead of assuming
32-bit addressing. Without this we cannot boot on systems where initrd is
On 09/22/12 11:10, Nicolas Pitre wrote:
On Fri, 21 Sep 2012, Cyril Chemparathy wrote:
The original phys_to_virt/virt_to_phys patching implementation relied on early
patching prior to MMU initialization. On PAE systems running out of >4G
address space, this would have entailed an additio
On 9/21/2012 2:42 PM, Nicolas Pitre wrote:
On Tue, 11 Sep 2012, Cyril Chemparathy wrote:
This patch cleans up the highmem sanity check code by simplifying the range
checks with a pre-calculated size_limit. This patch should otherwise have no
functional impact on behavior.
This patch also
On 9/21/2012 2:09 PM, Nicolas Pitre wrote:
On Tue, 11 Sep 2012, Cyril Chemparathy wrote:
The original phys_to_virt/virt_to_phys patching implementation relied on early
patching prior to MMU initialization. On PAE systems running out of >4G
address space, this would have entailed an additio
On 9/21/2012 1:40 PM, Nicolas Pitre wrote:
On Tue, 11 Sep 2012, Cyril Chemparathy wrote:
This patch adds basic sanity tests to ensure that the instruction patching
results in valid instruction encodings. This is done by verifying the output
of the patch process against a vector of assembler
be mapped in
a monotonically increasing fashion if there are multiple banks of memory,
i.e., x < y must => pa(x) < pa(y).
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
Acked-by: Nicolas Pitre
---
arch/arm/mm/mmu.c | 22 ++
1 file changed, 10 i
This patch adds basic sanity tests to ensure that the instruction patching
results in valid instruction encodings. This is done by verifying the output
of the patch process against a vector of assembler generated instructions at
init time.
Signed-off-by: Cyril Chemparathy
---
arch/arm/Kconfig
This patch moves the TTBR1 offset calculation and the T1SZ calculation out
of the TTB setup assembly code. This should not affect functionality in
any way, but improves code readability as well as readability of subsequent
patches in this series.
Signed-off-by: Cyril Chemparathy
Signed-off-by
This patch replaces the original physical offset patching implementation
with one that uses the newly added patching framework.
Signed-off-by: Cyril Chemparathy
---
arch/arm/Kconfig |1 +
arch/arm/include/asm/memory.h | 26 +++
arch/arm/kernel/armksyms.c|4
long %c0).
However, the 'c' modifier has been found to ICE certain versions of GCC, and
therefore we resort to stringified symbols here.
Signed-off-by: Cyril Chemparathy
Reviewed-by: Nicolas Pitre
---
arch/arm/Kconfig |3 +
arch/arm/include/asm/module.h
This patch modifies the switch_mm() processor functions to use phys_addr_t.
On LPAE systems, we now honor the upper 32-bits of the physical address that
is being passed in, and program these into TTBR as expected.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
---
arch/arm
From: Vitaly Andrianov
This patch fixes the initrd setup code to use phys_addr_t instead of assuming
32-bit addressing. Without this we cannot boot on systems where initrd is
located above the 4G physical address limit.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
Acked
by the !highmem condition.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
---
arch/arm/mm/mmu.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index e631f73..794457a 100644
--- a/arch/arm/mm/mmu.c
This patch fixes up the types used when converting back and forth between
physical and virtual addresses.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
Reviewed-by: Nicolas Pitre
---
arch/arm/include/asm/memory.h | 26 ++
1 file changed, 18
similar changes
elsewhere in the ARM memory management code.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
Acked-by: Nicolas Pitre
---
arch/arm/mm/mmu.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index c2fa21d
computations on the upper 32-bits would be discarded anyway.
Signed-off-by: Cyril Chemparathy
---
arch/arm/include/asm/memory.h | 38 --
arch/arm/kernel/head.S|4
arch/arm/kernel/setup.c |2 +-
3 files changed, 41 insertions(+), 3
: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
Acked-by: Nicolas Pitre
---
arch/arm/include/asm/proc-fns.h | 24 +++-
arch/arm/mm/context.c |9 ++---
2 files changed, 21 insertions(+), 12 deletions(-)
diff --git a/arch/arm/include/asm/proc-fns.h b/arch
This patch adds an architecture defined override for ARCH_LOW_ADDRESS_LIMIT.
On PAE systems, the absence of this override causes bootmem to incorrectly
limit itself to 32-bit addressable physical memory.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
---
arch/arm/include/asm
verlap with vmalloc area
(17/22) ARM: mm: clean up membank size limit checks
(v3) unchanged from v2
(v2) unchanged from v1
Cyril Chemparathy (14):
ARM: add mechanism for late code patching
ARM: add self test for runtime patch mechanism
ARM: use late patch framework for phys-virt patchi
NG_MAX) by
checking bank->start against the physical address corresponding to vmalloc_min
instead.
In the process, this patch also cleans up parts of the highmem sanity check
code by removing what has now become a redundant check for banks that entirely
overlap with the vmalloc range.
Signed-off-
: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
Acked-by: Nicolas Pitre
---
arch/arm/mm/init.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 9aec41f..19ba70b 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
This patch redefines the early boot time use of the R4 register to steal a few
low order bits (ARCH_PGD_SHIFT bits) on LPAE systems. This allows for up to
38-bit physical addresses.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
---
arch/arm/include/asm/memory.h | 15
thing.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
Reviewed-by: Nicolas Pitre
---
arch/arm/include/asm/page.h |2 +-
arch/arm/include/asm/pgtable-3level.h |6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/page.h
This patch fixes an apparent bug in the running weighted average calculation
used in the RED algorithm.
Going by the described formula:
qavg = qavg*(1-W) + backlog*W
=> qavg = qavg + (backlog - qavg) * W
... with W converted to a pre-calculated shift, this then becomes:
Hi Tejun,
On 9/12/2012 8:34 PM, Tejun Heo wrote:
Hello,
On Wed, Sep 12, 2012 at 08:08:30PM -0400, Cyril Chemparathy wrote:
So, a function which takes phys_addr_t for goal and limit but returns
void * doesn't make much sense unless the function creates directly
addressable mapping some
Hi Tejun,
On 9/12/2012 4:39 PM, Tejun Heo wrote:
Hello,
On Wed, Sep 12, 2012 at 12:06:48PM -0400, Cyril Chemparathy wrote:
static void * __init alloc_bootmem_core(unsigned long size,
unsigned long align
On 9/12/2012 4:23 PM, Rob Herring wrote:
On 09/12/2012 11:05 AM, Cyril Chemparathy wrote:
On some PAE architectures, the entire range of physical memory could reside
outside the 32-bit limit. These systems need the ability to specify the
initrd location using 64-bit numbers.
This patch
Greg,
On 9/12/2012 2:15 PM, Greg KH wrote:
On Wed, Sep 12, 2012 at 02:05:58PM -0400, Cyril Chemparathy wrote:
This patch fixes the /dev/mem driver to use phys_addr_t for physical
addresses. This is required on PAE systems, especially those that run
entirely out of >4G physical memory sp
This patch adds a check for the presence of the channel controller when
trying to allocate a slot. Without this fix, the kernel panics with a NULL
pointer dereference when the dma-engine drivers are probed.
Signed-off-by: Cyril Chemparathy
---
arch/arm/mach-davinci/dma.c |3 +++
1 file
This patch fixes the /dev/mem driver to use phys_addr_t for physical
addresses. This is required on PAE systems, especially those that run
entirely out of >4G physical memory space.
Signed-off-by: Cyril Chemparathy
---
arch/arm/include/asm/io.h |2 +-
arch/arm/mm/mmap.c |
On 9/12/2012 12:16 PM, Geert Uytterhoeven wrote:
On Wed, Sep 12, 2012 at 6:05 PM, Cyril Chemparathy wrote:
On some PAE architectures, the entire range of physical memory could reside
outside the 32-bit limit. These systems need the ability to specify the
initrd location using 64-bit numbers
a better solution to this
problem.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
---
include/linux/bootmem.h | 30
mm/bootmem.c| 59 ---
2 files changed, 45 insertions(+), 44 deletions
On some PAE architectures, the entire range of physical memory could reside
outside the 32-bit limit. These systems need the ability to specify the
initrd location using 64-bit numbers.
This patch globally modifies the early_init_dt_setup_initrd_arch() function to
use 64-bit numbers instead of th
This patch fixes the /dev/mem driver to use phys_addr_t for physical
addresses. This is required on PAE systems, especially those that run
entirely out of >4G physical memory space.
---
arch/arm/include/asm/io.h |2 +-
arch/arm/mm/mmap.c |2 +-
arch/ia64/include/asm/io.h |2 +
s declared here
The fix is to promote the initialization of offset into do_alignment().
Signed-off-by: Cyril Chemparathy
---
arch/arm/mm/alignment.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 9107231..d1
cts argument of type 'long
unsigned int', but argument 2 has type 'phys_addr_t' [-Wformat]
This patch fixes this warning by pinning down the PFN type to unsigned long.
Signed-off-by: Cyril Chemparathy
---
arch/arm/include/asm/memory.h |2 +-
1 file changed, 1 insertion(
thing.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
Reviewed-by: Nicolas Pitre
---
arch/arm/include/asm/page.h |2 +-
arch/arm/include/asm/pgtable-3level.h |6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/page.h
by the !highmem condition.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
---
arch/arm/mm/mmu.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 6c35483..50d9df5 100644
--- a/arch/arm/mm/mmu.c
This patch adds an architecture defined override for ARCH_LOW_ADDRESS_LIMIT.
On PAE systems, the absence of this override causes bootmem to incorrectly
limit itself to 32-bit addressable physical memory.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
---
arch/arm/include/asm
This patch moves the TTBR1 offset calculation and the T1SZ calculation out
of the TTB setup assembly code. This should not affect functionality in
any way, but improves code readability as well as readability of subsequent
patches in this series.
Signed-off-by: Cyril Chemparathy
Signed-off-by
This patch modifies the switch_mm() processor functions to use phys_addr_t.
On LPAE systems, we now honor the upper 32-bits of the physical address that
is being passed in, and program these into TTBR as expected.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
---
arch/arm
computations on the upper 32-bits would be discarded anyway.
Signed-off-by: Cyril Chemparathy
---
arch/arm/include/asm/memory.h | 38 --
arch/arm/kernel/head.S|4
arch/arm/kernel/setup.c |2 +-
3 files changed, 41 insertions(+), 3
This patch redefines the early boot time use of the R4 register to steal a few
low order bits (ARCH_PGD_SHIFT bits) on LPAE systems. This allows for up to
38-bit physical addresses.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
---
arch/arm/include/asm/memory.h | 15
be mapped in
a monotonically increasing fashion if there are multiple banks of memory,
i.e., x < y must => pa(x) < pa(y).
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
Acked-by: Nicolas Pitre
---
arch/arm/mm/mmu.c | 22 ++
1 file changed, 10 i
NG_MAX) by
checking bank->start against the physical address corresponding to vmalloc_min
instead.
In the process, this patch also cleans up parts of the highmem sanity check
code by removing what has now become a redundant check for banks that entirely
overlap with the vmalloc range.
Signed-off-
: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
Acked-by: Nicolas Pitre
---
arch/arm/include/asm/proc-fns.h | 24 +++-
arch/arm/mm/context.c |9 ++---
2 files changed, 21 insertions(+), 12 deletions(-)
diff --git a/arch/arm/include/asm/proc-fns.h b/arch
This patch replaces the original physical offset patching implementation
with one that uses the newly added patching framework.
Signed-off-by: Cyril Chemparathy
---
arch/arm/Kconfig |1 +
arch/arm/include/asm/memory.h | 26 +++
arch/arm/kernel/armksyms.c|4
long %c0).
However, the 'c' modifier has been found to ICE certain versions of GCC, and
therefore we resort to stringified symbols here.
Signed-off-by: Cyril Chemparathy
Reviewed-by: Nicolas Pitre
---
arch/arm/Kconfig |3 +
arch/arm/include/asm/module.h
resses in highmem sanity checks
(16/22) ARM: mm: cleanup checks for membank overlap with vmalloc area
(17/22) ARM: mm: clean up membank size limit checks
(v3) unchanged from v2
(v2) unchanged from v1
Cyril Chemparathy (14):
ARM: add mechanism for late code patching
ARM: add self test for
similar changes
elsewhere in the ARM memory management code.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
Acked-by: Nicolas Pitre
---
arch/arm/mm/mmu.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 941dfb9
This patch adds basic sanity tests to ensure that the instruction patching
results in valid instruction encodings. This is done by verifying the output
of the patch process against a vector of assembler generated instructions at
init time.
Signed-off-by: Cyril Chemparathy
---
arch/arm/Kconfig
From: Vitaly Andrianov
This patch fixes the initrd setup code to use phys_addr_t instead of assuming
32-bit addressing. Without this we cannot boot on systems where initrd is
located above the 4G physical address limit.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
Acked
This patch fixes up the types used when converting back and forth between
physical and virtual addresses.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
Reviewed-by: Nicolas Pitre
---
arch/arm/include/asm/memory.h | 26 ++
1 file changed, 18
: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
Acked-by: Nicolas Pitre
---
arch/arm/mm/init.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index ad722f1..1c5151a 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
On 8/12/2012 12:36 AM, Nicolas Pitre wrote:
On Fri, 10 Aug 2012, Cyril Chemparathy wrote:
On Keystone platforms, physical memory is entirely outside the 32-bit
addressible range. Therefore, the (bank->start > ULONG_MAX) check below marks
the entire system memory as highmem, and this
On 08/11/12 23:39, Nicolas Pitre wrote:
On Fri, 10 Aug 2012, Cyril Chemparathy wrote:
This patch adds support for 64-bit physical addresses in virt_to_phys()
patching. This does not do real 64-bit add/sub, but instead patches in the
upper 32-bits of the phys_offset directly into the output of
On 08/11/12 22:22, Nicolas Pitre wrote:
On Fri, 10 Aug 2012, Cyril Chemparathy wrote:
The original phys_to_virt/virt_to_phys patching implementation relied on early
patching prior to MMU initialization. On PAE systems running out of >4G
address space, this would have entailed an additio
On 08/11/12 23:03, Nicolas Pitre wrote:
On Fri, 10 Aug 2012, Cyril Chemparathy wrote:
This patch replaces the original physical offset patching implementation
with one that uses the newly added patching framework. In the process, we now
unconditionally initialize the __pv_phys_offset and
On 08/11/12 22:35, Nicolas Pitre wrote:
On Fri, 10 Aug 2012, Cyril Chemparathy wrote:
This patch adds basic sanity tests to ensure that the instruction patching
results in valid instruction encodings. This is done by verifying the output
of the patch process against a vector of assembler
On 8/10/2012 5:58 PM, Rohit Vaswani wrote:
The current arch_timer only support accessing through CP15 interface.
Add support for ARM processors that only support IO mapped register
interface
It looks like this patch attempts to address both (a) non-percpu arch
timers, and (b) memory mapped ar
From: Vitaly Andrianov
This patch fixes the initrd setup code to use phys_addr_t instead of assuming
32-bit addressing. Without this we cannot boot on systems where initrd is
located above the 4G physical address limit.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
This patch adds basic SMP support for Keystone machines. Nothing very fancy
here, just enough to get 4 CPUs booted up. This does not include support for
hotplug, etc.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
---
arch/arm/Kconfig|1 +
arch/arm
thing.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
---
arch/arm/include/asm/page.h |2 +-
arch/arm/include/asm/pgtable-3level.h |6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm
macro untouched, i.e., do a simply
virt_to_phys() and nothing more.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
---
arch/arm/include/asm/memory.h |9 +
arch/arm/kernel/smp.c |2 +-
arch/arm/mm/idmap.c |4 ++--
3 files changed, 12
: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
Acked-by: Nicolas Pitre
---
arch/arm/mm/init.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 9aec41f..19ba70b 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
This patch adds basic sanity tests to ensure that the instruction patching
results in valid instruction encodings. This is done by verifying the output
of the patch process against a vector of assembler generated instructions at
init time.
Signed-off-by: Cyril Chemparathy
---
arch/arm/Kconfig
NG_MAX) by
checking bank->start against the physical address corresponding to vmalloc_min
instead.
In the process, this patch also cleans up parts of the highmem sanity check
code by removing what has now become a redundant check for banks that entirely
overlap with the vmalloc range.
Signed-off-
: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
---
arch/arm/include/asm/proc-fns.h | 24 +++-
arch/arm/mm/context.c |9 ++---
2 files changed, 21 insertions(+), 12 deletions(-)
diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc
ov
Signed-off-by: Cyril Chemparathy
---
arch/arm/Kconfig |1 +
arch/arm/boot/dts/keystone-sim.dts |8 +++---
arch/arm/configs/keystone_defconfig |1 +
arch/arm/mach-keystone/include/mach/memory.h | 25 +
arch/arm/mac
This series is a follow on to the series posted earlier (archived at [1]).
Patches 01/22 .. 09/22 of this series have been pretty intensively reviewed;
thanks to all who helped. We've modified per feedback, and these should be in
reasonable shape.
Patches 10/22 .. 19/22 of this series have not b
This patch replaces the original physical offset patching implementation
with one that uses the newly added patching framework. In the process, we now
unconditionally initialize the __pv_phys_offset and __pv_offset globals in the
head.S code.
Signed-off-by: Cyril Chemparathy
---
arch/arm
similar changes
elsewhere in the ARM memory management code.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
Acked-by: Nicolas Pitre
---
arch/arm/mm/mmu.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 4c2d045
This patch moves the TTBR1 offset calculation and the T1SZ calculation out
of the TTB setup assembly code. This should not affect functionality in
any way, but improves code readability as well as readability of subsequent
patches in this series.
Signed-off-by: Cyril Chemparathy
Signed-off-by
This patch fixes up the types used when converting back and forth between
physical and virtual addresses.
Signed-off-by: Vitaly Andrianov
Signed-off-by: Cyril Chemparathy
---
arch/arm/include/asm/memory.h | 26 ++
1 file changed, 18 insertions(+), 8 deletions(-)
diff
long %c0).
However, the 'c' modifier has been found to ICE certain versions of GCC, and
therefore we resort to stringified symbols here.
Signed-off-by: Cyril Chemparathy
---
arch/arm/Kconfig |3 +
arch/arm/include/asm/module.h|7 ++
arch/arm/i
be mapped in
a monotonically increasing fashion if there are multiple banks of memory,
i.e., x < y must => pa(x) < pa(y).
Signed-off-by: Cyril Chemparathy
Signed-off-by: Vitaly Andrianov
---
arch/arm/mm/mmu.c | 22 ++
1 file changed, 10 insertions(+), 12 deletions
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