integer, also in case the loop
counter i might never be greater than u64 timeout = panic_timeout*1000,
elevate its precision to u64(timer) as well. The same applies to
timer_next replacing i_next which is initialized to 0.
Signed-off-by: Changming Liu
---
Changes in v3:
- change the loop in panic
From: Changming Liu
Since panic_timeout is an integer passed-in through sysctl,
the loop boundary panic_timeout * 1000 could overflow and
result in a zero-delay panic when panic_timeout is greater
than INT_MAX/1000.
Fix this by moving 1000 to the left, also in case i/1000
might never be greater
check to make it no bigger than
(INT_MAX/1000).
Signed-off-by: Changming Liu
---
kernel/sysctl.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/kernel/sysctl.c b/kernel/sysctl.c
index db1ce7a..e60cf04 100644
--- a/kernel/sysctl.c
+++ b/kernel/sysctl.c
@@ -137,6 +137,9
Enable the undefined length INCR burst type and set INCRx.
Different platform may has the different burst size type.
In order to get best performance, we need to tune the burst size to
one special value, instead of the default value.
Signed-off-by: Changming Huang
Signed-off-by: Rajesh Bhagat
e enabling undefined length INCR burst type and INCR16 burst type,
get better write performance on NXP Layerscape platform:
around 3% improvement (from 364MB/s to 375MB/s).
Signed-off-by: Changming Huang
---
Changes in v4:
- change definition for this property.
Changes in v3:
- add new property for
Add the macro definition for global soc bus configuration register 0/1
Signed-off-by: Changming Huang
---
Changes in v4:
- no change
Changes in v3:
- no change
Changes in v2:
- split the patch
- add more macro definition for soc bus configuration register
drivers/usb/dwc3/core.h | 26
6 burst type,
get better write performance on NXP Layerscape platform:
around 3% improvement (from 364MB/s to 375MB/s).
Signed-off-by: Changming Huang
---
Changes in v3:
- add new property for INCR burst in usb node.
Documentation/devicetree/bindings/usb/dwc3.txt |5 +
Add the macro definition for global soc bus configuration register 0/1
Signed-off-by: Changming Huang
---
Changes in v3:
- no change
Changes in v2:
- split the patch
- add more macro definition for soc bus configuration register
drivers/usb/dwc3/core.h | 26
Enable the undefined length INCR burst type and set INCRx.
Different platform may has the different burst size type.
In order to get best performance, we need to tune the burst size to
one special value, instead of the default value.
Signed-off-by: Changming Huang
Signed-off-by: Rajesh Bhagat
Add the macro definition for global soc bus configuration register 0/1
Signed-off-by: Changming Huang
---
Changes in v2:
- split the patch
- add more macro definition for soc bus configuration register
drivers/usb/dwc3/core.h | 26 ++
1 file changed, 26 insertions
While enabling undefined length INCR burst type and INCR16 burst type,
get better write performance on NXP Layerscape platform:
around 3% improvement (from 364MB/s to 375MB/s).
Signed-off-by: Changming Huang
Signed-off-by: Rajesh Bhagat
---
Changs in v2:
- split patch
- create one new
While enabling undefined length INCR burst type and INCR16 burst type,
get better write performance on NXP Layerscape platform:
around 3% improvement (from 364MB/s to 375MB/s).
Signed-off-by: Changming Huang
Signed-off-by: Rajesh Bhagat
---
drivers/usb/dwc3/core.c |6 ++
drivers/usb
Add USB node in ls1012a device tree
Signed-off-by: Changming Huang
---
Dependence on patch "[v3] arm64: Add DTS support for FSL's LS1012A SoC".
https://patchwork.kernel.org/patch/9462399/
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 17 +
1 file changed
has entered
suspended state before initiating this port resume using the Force Port
Resume bit. This bit is for NXP controller, not EHCI compatible.
Signed-off-by: Changming Huang
Signed-off-by: Ramneek Mehresh
---
Changes in v4:
- release spinlock before sleeping
Changes in v3:
- add 10ms
has entered
suspended state before initiating this port resume using the Force Port
Resume bit. This bit is for NXP controller, not EHCI compatible.
Signed-off-by: Changming Huang
Signed-off-by: Ramneek Mehresh
---
Changes in v3:
- add 10ms delay in function ehci_hub_control
- fix typos
has entered
suspended state before initiating this port resume using the Force Port
Resume bit. This bit is for NXP controller, not EHCI compatible.
Signed-off-by: Changming Huang
Signed-off-by: Ramneek Mehresh
---
Change in v2:
- move sleep out of spin-lock and add more comment for this
application sets it and not when the port is actually suspended
Workaround for this issue involves waiting for a minimum of 10ms to
allow the controller to go into SUSPEND state before proceeding ahead
Signed-off-by: Changming Huang
Signed-off-by: Ramneek Mehresh
---
drivers/usb/host/ehci-fsl.c
This sets dma ops as coherent for usb 3.0 platform device
Signed-off-by: Changming Huang
Signed-off-by: Rajesh Bhagat
---
arch/arm/boot/dts/ls1021a.dtsi |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 368e219..81fb4d9
Add FSL USB Gadget entry in platform device id table
Signed-off-by: Changming Huang
Signed-off-by: Suresh Gupta
---
drivers/usb/gadget/udc/fsl_udc_core.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/usb/gadget/udc/fsl_udc_core.c
b/drivers/usb/gadget/udc/fsl_udc_core.c
This is new version?
Maybe you should add prefix v2 in subject and the version history.
Best Regards
Jerry Huang
> -Original Message-
> From: linux-mmc-ow...@vger.kernel.org [mailto:linux-mmc-
> ow...@vger.kernel.org] On Behalf Of Chuansheng Liu
> Sent: Tuesday, November 20, 2012 1:38 AM
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