[PATCH v2] cxl/mem: Fix register block offset calculation

8adaf747c9f0 ("cxl/mem: Find device capabilities") Reported-by: Vishal Verma Signed-off-by: Ben Widawsky --- drivers/cxl/mem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index e3003f49b329..1b5078311f7d 100644 --- a/drivers/cx

Re: [PATCH 3/3] cxl/mem: Demarcate vendor specific capability IDs

On 21-04-15 16:37:01, Verma, Vishal L wrote: > On Thu, 2021-04-15 at 16:27 -0700, Ben Widawsky wrote: > > Vendor capabilities occupy 0x8000 to 0x according to CXL 2.0 spec > > 8.2.8.2.1 CXL Device Capabilities. While they are not defined by the > > spec, they are all

Re: [PATCH 7/7] cxl: Add HDM decoder capbilities

Thanks for looking. Mostly trivial agreements or disagreements which I don't care much about, but I'd really like you to focus on the last point, please. On 21-04-15 16:27:14, Dan Williams wrote: > On Wed, Apr 7, 2021 at 3:26 PM Ben Widawsky wrote: > > > > An HDM deco

[PATCH 3/3] cxl/mem: Demarcate vendor specific capability IDs

n or equal to (Ben) Fixes: 8adaf747c9f0b ("cxl/mem: Find device capabilities") Signed-off-by: Ben Widawsky --- drivers/cxl/mem.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index c05617b0ba4b..28c7c29567b3 100644 ---

[PATCH 3/3] cxl/mem: Demarcate vendor specific capability IDs

("cxl/mem: Find device capabilities") Signed-off-by: Ben Widawsky --- drivers/cxl/mem.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index c05617b0ba4b..0909f73db994 100644 --- a/drivers/cxl/mem.c +++ b/drivers/cxl/mem

[PATCH 2/3] cxl/mem: Print unknown capability IDs as hex

Trivial. The spec lists these as hex, so do the same here to make debugging easier. Fixes: 8adaf747c9f0b ("cxl/mem: Find device capabilities") Signed-off-by: Ben Widawsky --- drivers/cxl/mem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cxl/mem.c b/d

[PATCH 1/3] cxl/mem: Fix register block offset calculation

ties") Reported-by: Vishal Verma Signed-off-by: Ben Widawsky --- drivers/cxl/mem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index e3003f49b329..1b5078311f7d 100644 --- a/drivers/cxl/mem.c +++ b/drivers/cxl/mem.c @@ -998,7

Re: [PATCH 4/7] cxl/mem: Get rid of @cxlm.base

On 21-04-08 18:26:35, Jonathan Cameron wrote: > On Wed, 7 Apr 2021 15:26:22 -0700 > Ben Widawsky wrote: > > > @cxlm.base only existed to support holding the base found in the > > register block mapping code, and pass it along to the register setup > > code. Now that

[PATCH] cxl/mem: Clarify UAPI documentation

Signed-off-by: Ben Widawsky --- include/uapi/linux/cxl_mem.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/include/uapi/linux/cxl_mem.h b/include/uapi/linux/cxl_mem.h index f6e8a005b113..8dd516ddb098 100644 --- a/include/uapi/linux/cxl_mem.h +++ b/include/uapi/linux/cxl_mem.h

[PATCH] cxl/mem: Add media provisioning required commands

. That coordination will be added later. The list of commands was determined based on the learnings from libnvdimm and this list is provided directly from Dan. Recommended-by: Dan Williams Signed-off-by: Ben Widawsky --- drivers/cxl/mem.c| 19 +++ include/uapi/linux

[PATCH 7/7] cxl: Add HDM decoder capbilities

. It's now possible to configure a CXL type 3 device's HDM decoder. Such programming is expected for CXL devices with persistent memory, and hot plugged CXL devices that participate in CXL.mem with volatile memory. Signed-off-by: Ben Widawsky --- drivers/cxl/c

[PATCH 6/7] cxl/mem: Create a helper to setup device regs

Memory devices have a list of required register regions within the register block, but this isn't required of all CXL components or devices. To make things more tidy, and allow for easily setting up other block types in this loop, the helper is introduced. Signed-off-by: Ben Wid

[PATCH 5/7] cxl/mem: Move device register setup

Support expansion of register block types that the driver will attempt to recognize by pulling the code up into the register block scanning loop. Subsequent code can easily add in new register block types with this. Signed-off-by: Ben Widawsky --- drivers/cxl/mem.c | 19 +-- 1

[PATCH 4/7] cxl/mem: Get rid of @cxlm.base

easy to turn the @base values into local variables and remove them from our device driver state. Signed-off-by: Ben Widawsky --- drivers/cxl/mem.c | 24 +++- drivers/cxl/mem.h | 2 -- 2 files changed, 11 insertions(+), 15 deletions(-) diff --git a/drivers/cxl/mem.c b

[PATCH 3/7] cxl/mem: Move register locator logic into reg setup

adding new register block identifiers. While @cxlm.base still exists, it will become trivial to remove it in a future patch. No functional change is meant to be introduced in this patch. Signed-off-by: Ben Widawsky --- drivers/cxl/mem.c | 135 +++--- 1 file

[PATCH 2/7] cxl/mem: Split creation from mapping in probe

block isn't found. Signed-off-by: Ben Widawsky --- drivers/cxl/mem.c | 64 +-- 1 file changed, 40 insertions(+), 24 deletions(-) diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index 99534260034e..520edaf233d4 100644 --- a/drivers/cxl/mem.c

[PATCH 0/7] Enumerate HDM Decoder registers

he reworks and improvements recently submitted by Dan [1]. [1]: https://lore.kernel.org/linux-cxl/161728744224.2474040.12854720917440712854.st...@dwillia2-desk3.amr.corp.intel.com/T/#t Ben Widawsky (7): cxl/mem: Use dev instead of pdev->dev cxl/mem: Split creation from mapping in probe

[PATCH 1/7] cxl/mem: Use dev instead of pdev->dev

Trivial cleanup. Signed-off-by: Ben Widawsky --- drivers/cxl/mem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index b6fe4e81d38a..99534260034e 100644 --- a/drivers/cxl/mem.c +++ b/drivers/cxl/mem.c @@ -935,7 +935,7 @@ static struct

Re: [PATCH v3 RFC 14/14] mm: speedup page alloc for MPOL_PREFERRED_MANY by adding a NO_SLOWPATH gfp bit

On 21-03-03 18:14:30, Michal Hocko wrote: > On Wed 03-03-21 08:31:41, Ben Widawsky wrote: > > On 21-03-03 14:59:35, Michal Hocko wrote: > > > On Wed 03-03-21 21:46:44, Feng Tang wrote: > > > > On Wed, Mar 03, 2021 at 09:18:32PM +0800, Tang, Feng wrote: > > >

Re: [PATCH v3 RFC 14/14] mm: speedup page alloc for MPOL_PREFERRED_MANY by adding a NO_SLOWPATH gfp bit

On 21-03-03 14:59:35, Michal Hocko wrote: > On Wed 03-03-21 21:46:44, Feng Tang wrote: > > On Wed, Mar 03, 2021 at 09:18:32PM +0800, Tang, Feng wrote: > > > On Wed, Mar 03, 2021 at 01:32:11PM +0100, Michal Hocko wrote: > > > > On Wed 03-03-21 20:18:33, Feng Tang wrote: > [...] > > > > > One thing I

Re: [PATCH v5 4/9] cxl/mem: Add basic IOCTL interface

On 21-02-19 20:22:00, Konrad Rzeszutek Wilk wrote: > ..snip.. > > +static int handle_mailbox_cmd_from_user(struct cxl_mem *cxlm, > > + const struct cxl_mem_command *cmd, > > + u64 in_payload, u64 out_payload, > > +

[RFC PATCH v5 9/9] cxl/mem: Add payload dumping for debug

ion). The functionality is protected by normal kernel security mechanisms as well as a CONFIG option in the CXL driver. This was extracted from the original version of the CXL enabling patch series. Signed-off-by: Ben Widawsky --- drivers/cxl/Kconfig | 13 + drivers/cxl/mem.c | 8 +

[PATCH v5 7/9] cxl/mem: Add set of informational commands

Add initial set of formal commands beyond basic identify and command enumeration. Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams Reviewed-by: Jonathan Cameron (v2) --- drivers/cxl/mem.c| 9 + include/uapi/linux/cxl_mem.h | 5 + 2 files changed, 14 insertions

[PATCH v5 6/9] cxl/mem: Enable commands via CEL

educe memory allocation complexity. - Fixed command IDs to opcode mapping for all devices makes development and debugging easier. - Certain helpers are easily achievable, like cxl_for_each_cmd(). Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams (v2) Reviewed-by: Jonathan Cameron (v3) --- dr

[PATCH v5 8/9] MAINTAINERS: Add maintainers of the CXL driver

Cc: Dan Williams Cc: Vishal Verma Cc: Ira Weiny Cc: Alison Schofield Signed-off-by: Ben Widawsky --- MAINTAINERS | 11 +++ 1 file changed, 11 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 6eff4f720c72..93c8694a8f04 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -,6

[PATCH v5 4/9] cxl/mem: Add basic IOCTL interface

: kernel test robot # bug in earlier revision Reported-by: Stephen Rothwell Cc: Al Viro Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams (v2) --- .clang-format | 1 + .../driver-api/cxl/memory-devices.rst | 12 + .../userspace-api/ioctl/ioctl

[PATCH v5 5/9] cxl/mem: Add a "RAW" send command

level of attention as bug reports using supported commands (via taint). 2. Supported commands will be rejected by the RAW command. With this comes new debugfs knob to allow full access to your toes with your weapon of choice. Cc: Ariel Sibley Signed-off-by: Ben Widawsky Reviewed-by: Dan

[PATCH v5 2/9] cxl/mem: Find device capabilities

ntation is saved for a later time. Reported-by: Colin Ian King (coverity) Reported-by: Dan Carpenter (smatch) Link: https://www.computeexpresslink.org/download-the-specification Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams (v2) --- .../driver-api/cxl/memory-devices.rst | 14

[PATCH v5 3/9] cxl/mem: Register CXL memX devices

ff-by: Dan Williams Signed-off-by: Ben Widawsky Reviewed-by: Jonathan Cameron (v2) --- Documentation/ABI/testing/sysfs-bus-cxl | 26 ++ .../driver-api/cxl/memory-devices.rst | 5 + drivers/cxl/Makefile | 3 + drivers/cxl/bus.c

[PATCH v5 0/9] CXL 2.0 Support

n Cameron Cc: Rafael Wysocki Cc: Randy Dunlap Cc: Vishal Verma Cc: "John Groves (jgroves)" Cc: "Kelley, Sean V" --- Ben Widawsky (7): cxl/mem: Find device capabilities cxl/mem: Add basic IOCTL interface cxl/mem: Add a "RAW" send command cxl/mem: Enable

[PATCH v5 1/9] cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints

umentation/ infrastructure. Link: https://www.computeexpresslink.org/download-the-specification Cc: Jonathan Corbet Signed-off-by: Dan Williams Signed-off-by: Ben Widawsky Acked-by: David Rientjes (v1) Reviewed-by: Jonathan Cameron --- Documentation/driver-api/cxl/index.rst| 12 +++

Re: [PATCH v4 4/9] cxl/mem: Add basic IOCTL interface

On 21-02-16 18:28:49, Jonathan Cameron wrote: > On Tue, 16 Feb 2021 09:53:14 -0800 > Ben Widawsky wrote: > > > On 21-02-16 15:22:23, Jonathan Cameron wrote: > > > On Mon, 15 Feb 2021 17:45:33 -0800 > > > Ben Widawsky wrote: > > > > > > >

Re: [PATCH v4 4/9] cxl/mem: Add basic IOCTL interface

On 21-02-16 18:12:05, Al Viro wrote: > On Mon, Feb 15, 2021 at 05:45:33PM -0800, Ben Widawsky wrote: > > + if (cmd->info.size_in) { > > + mbox_cmd.payload_in = kvzalloc(cmd->info.size_in, GFP_KERNEL); > > + if (!mbox_cmd.payload_in) { > >

Re: [PATCH v4 5/9] cxl/mem: Add a "RAW" send command

On 21-02-16 15:30:26, Jonathan Cameron wrote: > On Mon, 15 Feb 2021 17:45:34 -0800 > Ben Widawsky wrote: > > > The CXL memory device send interface will have a number of supported > > commands. The raw command is not such a command. Raw commands allow > > userspace to

Re: [PATCH v4 2/9] cxl/mem: Find device capabilities

On 21-02-16 17:20:01, Jonathan Cameron wrote: > On Tue, 16 Feb 2021 08:43:03 -0800 > Ben Widawsky wrote: > > > On 21-02-16 14:51:48, Jonathan Cameron wrote: > > > On Mon, 15 Feb 2021 17:45:31 -0800 > > > Ben Widawsky wrote: > > > > > > >

Re: [PATCH v4 4/9] cxl/mem: Add basic IOCTL interface

On 21-02-16 15:22:23, Jonathan Cameron wrote: > On Mon, 15 Feb 2021 17:45:33 -0800 > Ben Widawsky wrote: > > > Add a straightforward IOCTL that provides a mechanism for userspace to > > query the supported memory device commands. CXL commands as they appear > > to user

Re: [PATCH v4 2/9] cxl/mem: Find device capabilities

On 21-02-16 14:51:48, Jonathan Cameron wrote: > On Mon, 15 Feb 2021 17:45:31 -0800 > Ben Widawsky wrote: > > > Provide enough functionality to utilize the mailbox of a memory device. > > The mailbox is used to interact with the firmware running on the memory > > devi

[PATCH v4 9/9] cxl/mem: Add payload dumping for debug

ion). The functionality is protected by normal kernel security mechanisms as well as a CONFIG option in the CXL driver. This was extracted from the original version of the CXL enabling patch series. Signed-off-by: Ben Widawsky --- drivers/cxl/Kconfig | 13 + drivers/cxl/mem.c | 8 +

[PATCH v4 8/9] MAINTAINERS: Add maintainers of the CXL driver

Cc: Dan Williams Cc: Vishal Verma Cc: Ira Weiny Cc: Alison Schofield Signed-off-by: Ben Widawsky --- MAINTAINERS | 11 +++ 1 file changed, 11 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 6eff4f720c72..93c8694a8f04 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -,6

[PATCH v4 6/9] cxl/mem: Enable commands via CEL

educe memory allocation complexity. - Fixed command IDs to opcode mapping for all devices makes development and debugging easier. - Certain helpers are easily achievable, like cxl_for_each_cmd(). Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams --- drivers/cxl/cxl.h| 2 + dr

[PATCH v4 7/9] cxl/mem: Add set of informational commands

Add initial set of formal commands beyond basic identify and command enumeration. Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams Reviewed-by: Jonathan Cameron (v2) --- drivers/cxl/mem.c| 9 + include/uapi/linux/cxl_mem.h | 5 + 2 files changed, 14 insertions

[PATCH v4 4/9] cxl/mem: Add basic IOCTL interface

: kernel test robot # bug in earlier revision Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams (v2) --- .clang-format | 1 + .../userspace-api/ioctl/ioctl-number.rst | 1 + drivers/cxl/mem.c | 288 +- include

[PATCH v4 0/9] CXL 2.0 Support

Christoph Hellwig Cc: Dan Williams Cc: David Hildenbrand Cc: David Rientjes Cc: Ira Weiny Cc: Jon Masters Cc: Jonathan Cameron Cc: Rafael Wysocki Cc: Randy Dunlap Cc: Vishal Verma Cc: "John Groves (jgroves)" Cc: "Kelley, Sean V" --- Ben Widawsky (7): cxl/mem: Find

[PATCH v4 3/9] cxl/mem: Register CXL memX devices

ff-by: Dan Williams Signed-off-by: Ben Widawsky Reviewed-by: Jonathan Cameron (v2) --- Documentation/ABI/testing/sysfs-bus-cxl | 26 ++ .../driver-api/cxl/memory-devices.rst | 17 + drivers/cxl/Makefile | 3 + drivers/cxl/bus.c

[PATCH v4 2/9] cxl/mem: Find device capabilities

ntation is saved for a later time. Link: https://www.computeexpresslink.org/download-the-specification Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams (v2) --- drivers/cxl/cxl.h | 88 drivers/cxl/mem.c | 543 +- drivers/cxl/pci.h | 14 +

[PATCH v4 1/9] cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints

umentation/ infrastructure. Link: https://www.computeexpresslink.org/download-the-specification Cc: Jonathan Corbet Signed-off-by: Dan Williams Signed-off-by: Ben Widawsky Acked-by: David Rientjes (v1) Reviewed-by: Jonathan Cameron --- Documentation/driver-api/cxl/index.rst| 12 +++

[PATCH v4 5/9] cxl/mem: Add a "RAW" send command

level of attention as bug reports using supported commands (via taint). 2. Supported commands will be rejected by the RAW command. With this comes new debugfs knob to allow full access to your toes with your weapon of choice. Cc: Ariel Sibley Signed-off-by: Ben Widawsky Reviewed-by: Dan

Re: [PATCH v2 4/8] cxl/mem: Add basic IOCTL interface

On 21-02-14 16:30:09, Al Viro wrote: > On Tue, Feb 09, 2021 at 04:02:55PM -0800, Ben Widawsky wrote: > > > +static int handle_mailbox_cmd_from_user(struct cxl_memdev *cxlmd, > > + const struct cxl_mem_command *cmd, > > +

Re: [PATCH v4 06/09] cxl/mem: Enable commands via CEL

On 21-02-13 21:46:33, Ben Widawsky wrote: > CXL devices identified by the memory-device class code must implement > the Device Command Interface (described in 8.2.9 of the CXL 2.0 spec). > While the driver already maintains a list of commands it supports, there > is still a need t

[PATCH v4 06/09] cxl/mem: Enable commands via CEL

educe memory allocation complexity. - Fixed command IDs to opcode mapping for all devices makes development and debugging easier. - Certain helpers are easily achievable, like cxl_for_each_cmd(). Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams --- drivers/cxl/cxl.h| 2 + dr

[RFC PATCH 9/9] cxl/mem: Add payload dumping for debug

ion). The functionality is protected by normal kernel security mechanisms as well as a CONFIG option in the CXL driver. This was extracted from the original version of the CXL enabling patch series. Signed-off-by: Ben Widawsky --- drivers/cxl/Kconfig | 13 + drivers/cxl/mem.c | 8 +

[PATCH v3 1/9] cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints

umentation/ infrastructure. Link: https://www.computeexpresslink.org/download-the-specification Cc: Jonathan Corbet Signed-off-by: Dan Williams Signed-off-by: Ben Widawsky Acked-by: David Rientjes (v1) Reviewed-by: Jonathan Cameron --- Documentation/driver-api/cxl/index.rst| 12 +++

[PATCH v3 2/9] cxl/mem: Find device capabilities

ntation is saved for a later time. Link: https://www.computeexpresslink.org/download-the-specification Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams (v2) --- drivers/cxl/cxl.h | 88 drivers/cxl/mem.c | 542 +- drivers/cxl/pci.h | 14 +

[PATCH v3 5/9] cxl/mem: Add a "RAW" send command

level of attention as bug reports using supported commands (via taint). 2. Supported commands will be rejected by the RAW command. With this comes new debugfs knob to allow full access to your toes with your weapon of choice. Cc: Ariel Sibley Signed-off-by: Ben Widawsky Reviewed-by: Dan

[PATCH v3 0/9] CXL 2.0 Support

xl/2021021259.635748-1-ben.widaw...@intel.com/ [2]: https://www.computeexpresslink.org/](https://www.computeexpresslink.org/) [3]: https://lore.kernel.org/qemu-devel/20210202005948.241655-1-ben.widaw...@intel.com/ [4]: https://gitlab.com/bwidawsk/qemu/-/tree/cxl-2.0v4 [5]: https://github.com/pmem/n

[PATCH v3 3/9] cxl/mem: Register CXL memX devices

ff-by: Dan Williams Signed-off-by: Ben Widawsky Reviewed-by: Jonathan Cameron (v2) --- Documentation/ABI/testing/sysfs-bus-cxl | 26 ++ .../driver-api/cxl/memory-devices.rst | 17 + drivers/cxl/Makefile | 3 + drivers/cxl/bus.c

[PATCH v3 4/9] cxl/mem: Add basic IOCTL interface

: kernel test robot # bug in earlier revision Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams (v2) --- .clang-format | 1 + .../userspace-api/ioctl/ioctl-number.rst | 1 + drivers/cxl/mem.c | 280 +- include

[PATCH v3 6/9] cxl/mem: Enable commands via CEL

educe memory allocation complexity. - Fixed command IDs to opcode mapping for all devices makes development and debugging easier. - Certain helpers are easily achievable, like cxl_for_each_cmd(). Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams --- drivers/cxl/cxl.h| 2 + dr

[PATCH v3 8/9] MAINTAINERS: Add maintainers of the CXL driver

Cc: Dan Williams Cc: Vishal Verma Cc: Ira Weiny Cc: Alison Schofield Signed-off-by: Ben Widawsky --- MAINTAINERS | 11 +++ 1 file changed, 11 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 6eff4f720c72..93c8694a8f04 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -,6

[PATCH v3 7/9] cxl/mem: Add set of informational commands

Add initial set of formal commands beyond basic identify and command enumeration. Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams Reviewed-by: Jonathan Cameron (v2) --- drivers/cxl/mem.c| 9 + include/uapi/linux/cxl_mem.h | 5 + 2 files changed, 14 insertions

Re: [PATCH v2 2/8] cxl/mem: Find device capabilities

On 21-02-12 13:27:06, Jonathan Cameron wrote: > On Thu, 11 Feb 2021 07:55:29 -0800 > Ben Widawsky wrote: > > > On 21-02-11 09:55:48, Jonathan Cameron wrote: > > > On Wed, 10 Feb 2021 10:16:05 -0800 > > > Ben Widawsky wrote: > > > > &

Re: [PATCH v2 2/8] cxl/mem: Find device capabilities

On 21-02-11 09:55:48, Jonathan Cameron wrote: > On Wed, 10 Feb 2021 10:16:05 -0800 > Ben Widawsky wrote: > > > On 21-02-10 08:55:57, Ben Widawsky wrote: > > > On 21-02-10 15:07:59, Jonathan Cameron wrote: > > > > On Wed, 10 Feb 2021 13:32:52 +

Re: [PATCH v2 6/8] cxl/mem: Enable commands via CEL

On 21-02-11 12:02:15, Jonathan Cameron wrote: > On Tue, 9 Feb 2021 16:02:57 -0800 > Ben Widawsky wrote: > > > CXL devices identified by the memory-device class code must implement > > the Device Command Interface (described in 8.2.9 of the CXL 2.0 spec). > > While the

Re: [PATCH v2 4/8] cxl/mem: Add basic IOCTL interface

On 21-02-11 10:06:46, Jonathan Cameron wrote: > On Wed, 10 Feb 2021 20:40:52 -0800 > Dan Williams wrote: > > > On Wed, Feb 10, 2021 at 10:47 AM Jonathan Cameron > > wrote: > > [..] > > > > +#define CXL_CMDS > > > >\ > > > > + ___C(IN

Re: [PATCH v2 2/8] cxl/mem: Find device capabilities

On 21-02-11 10:01:52, Jonathan Cameron wrote: > On Wed, 10 Feb 2021 11:54:29 -0800 > Dan Williams wrote: > > > > > ... > > > > > > > > > +static void cxl_mem_mbox_timeout(struct cxl_mem *cxlm, > > > > > +struct mbox_cmd *mbox_cmd) > > > > > +{ > > > > > + struct de

Re: [PATCH v2 5/8] cxl/mem: Add a "RAW" send command

On 21-02-11 11:19:24, Jonathan Cameron wrote: > On Tue, 9 Feb 2021 16:02:56 -0800 > Ben Widawsky wrote: > > > The CXL memory device send interface will have a number of supported > > commands. The raw command is not such a command. Raw commands allow > > userspace to

Re: [PATCH v2 2/8] cxl/mem: Find device capabilities

On 21-02-11 09:55:48, Jonathan Cameron wrote: > On Wed, 10 Feb 2021 10:16:05 -0800 > Ben Widawsky wrote: > > > On 21-02-10 08:55:57, Ben Widawsky wrote: > > > On 21-02-10 15:07:59, Jonathan Cameron wrote: > > > > On Wed, 10 Feb 2021 13:32:52 +

Re: [PATCH v2 4/8] cxl/mem: Add basic IOCTL interface

On 21-02-10 18:45:40, Jonathan Cameron wrote: > On Tue, 9 Feb 2021 16:02:55 -0800 > Ben Widawsky wrote: > > > Add a straightforward IOCTL that provides a mechanism for userspace to > > query the supported memory device commands. CXL commands as they appear > > to user

Re: [PATCH v2 2/8] cxl/mem: Find device capabilities

On 21-02-10 13:32:52, Jonathan Cameron wrote: > On Tue, 9 Feb 2021 16:02:53 -0800 > Ben Widawsky wrote: > > > Provide enough functionality to utilize the mailbox of a memory device. > > The mailbox is used to interact with the firmware running on the memory > > devi

Re: [PATCH v2 5/8] cxl/mem: Add a "RAW" send command

On 21-02-10 18:46:04, ariel.sib...@microchip.com wrote: > > > > > > diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig > > > > > > index c4ba3aa0a05d..08eaa8e52083 100644 > > > > > > --- a/drivers/cxl/Kconfig > > > > > > +++ b/drivers/cxl/Kconfig > > > > > > @@ -33,6 +33,24 @@ config CXL_MEM >

Re: [PATCH v2 2/8] cxl/mem: Find device capabilities

On 21-02-10 17:41:04, Jonathan Cameron wrote: > On Tue, 9 Feb 2021 16:02:53 -0800 > Ben Widawsky wrote: > > > Provide enough functionality to utilize the mailbox of a memory device. > > The mailbox is used to interact with the firmware running on the memory > > devi

Re: [PATCH v2 2/8] cxl/mem: Find device capabilities

On 21-02-10 08:55:57, Ben Widawsky wrote: > On 21-02-10 15:07:59, Jonathan Cameron wrote: > > On Wed, 10 Feb 2021 13:32:52 + > > Jonathan Cameron wrote: > > > > > On Tue, 9 Feb 2021 16:02:53 -0800 > > > Ben Widawsky wrote: > > > > > &

Re: [PATCH v2 5/8] cxl/mem: Add a "RAW" send command

On 21-02-10 18:03:35, ariel.sib...@microchip.com wrote: > > > > diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig > > > > index c4ba3aa0a05d..08eaa8e52083 100644 > > > > --- a/drivers/cxl/Kconfig > > > > +++ b/drivers/cxl/Kconfig > > > > @@ -33,6 +33,24 @@ config CXL_MEM > > > > > > > >

Re: [PATCH v2 1/8] cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints

On 21-02-10 16:17:07, Jonathan Cameron wrote: > On Tue, 9 Feb 2021 16:02:52 -0800 > Ben Widawsky wrote: > > > From: Dan Williams > > > > The CXL.mem protocol allows a device to act as a provider of "System > > RAM" and/or "Persistent Memory&

Re: [PATCH v2 2/8] cxl/mem: Find device capabilities

On 21-02-10 15:07:59, Jonathan Cameron wrote: > On Wed, 10 Feb 2021 13:32:52 + > Jonathan Cameron wrote: > > > On Tue, 9 Feb 2021 16:02:53 -0800 > > Ben Widawsky wrote: > > > > > Provide enough functionality to utilize the mailbox of a memory device. &

Re: [PATCH v2 5/8] cxl/mem: Add a "RAW" send command

On 21-02-10 15:26:27, ariel.sib...@microchip.com wrote: > > diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig > > index c4ba3aa0a05d..08eaa8e52083 100644 > > --- a/drivers/cxl/Kconfig > > +++ b/drivers/cxl/Kconfig > > @@ -33,6 +33,24 @@ config CXL_MEM > > > > If unsure say 'm'. > >

[PATCH v2 8/8] MAINTAINERS: Add maintainers of the CXL driver

Cc: Dan Williams Cc: Vishal Verma Cc: Ira Weiny Cc: Alison Schofield Signed-off-by: Ben Widawsky --- MAINTAINERS | 11 +++ 1 file changed, 11 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 6eff4f720c72..93c8694a8f04 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -,6

[PATCH v2 7/8] cxl/mem: Add set of informational commands

add a new "validate_payload" operation to define a generic mechanism to restrict / filter commands. Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams --- drivers/cxl/mem.c| 55 +++- include/uapi/linux/cxl_mem.h | 5 2 files changed,

[PATCH v2 6/8] cxl/mem: Enable commands via CEL

. Doesn't need a table per device. - Reduce memory allocation complexity. - Fixed command IDs to opcode mapping for all devices makes development and debugging easier. - Certain helpers are easily achievable, like cxl_for_each_cmd(). Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams --- dr

[PATCH v2 5/8] cxl/mem: Add a "RAW" send command

commands (via taint). 2. Supported commands will be rejected by the RAW command. With this comes new debugfs knob to allow full access to your toes with your weapon of choice. Cc: Ariel Sibley Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams --- drivers/cxl/Kconfig | 18

[PATCH v2 4/8] cxl/mem: Add basic IOCTL interface

kernel). Reported-by: kernel test robot # bug in earlier revision Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams --- .clang-format | 1 + .../userspace-api/ioctl/ioctl-number.rst | 1 + drivers/cxl/mem.c | 291

[PATCH v2 1/8] cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints

umentation/ infrastructure. Link: https://www.computeexpresslink.org/download-the-specification Cc: Jonathan Corbet Signed-off-by: Dan Williams Signed-off-by: Ben Widawsky Acked-by: David Rientjes (v1) --- Documentation/driver-api/cxl/index.rst| 12 .../driver

[PATCH v2 2/8] cxl/mem: Find device capabilities

ntation is saved for a later time. Link: https://www.computeexpresslink.org/download-the-specification Signed-off-by: Ben Widawsky Reviewed-by: Dan Williams --- drivers/cxl/Kconfig | 14 + drivers/cxl/cxl.h | 93 +++ drivers/cxl/mem.c

[PATCH v2 3/8] cxl/mem: Register CXL memX devices

ff-by: Dan Williams Signed-off-by: Ben Widawsky --- Documentation/ABI/testing/sysfs-bus-cxl | 26 ++ .../driver-api/cxl/memory-devices.rst | 17 + drivers/cxl/Makefile | 3 + drivers/cxl/bus.c | 29 ++ drivers

[PATCH v2 0/8] CXL 2.0 Support

ore.kernel.org/qemu-devel/20210202005948.241655-1-ben.widaw...@intel.com/ [4]: https://gitlab.com/bwidawsk/qemu/-/tree/cxl-2.0v4 [5]: https://github.com/pmem/ndctl/tree/cxl-2.0v2 --- Ben Widawsky (6): cxl/mem: Find device capabilities cxl/mem: Add basic IOCTL interface cxl/mem: Add a "RAW"

Re: [PATCH 08/14] taint: add taint for direct hardware access

gt; taint allows a pressure release valve for any and all commands to be > > > > sent, but flagged with WARN_TAINT_ONCE if the driver has not > > > > explicitly enabled it on an allowed list of known-good / kernel > > > > coordinated commands. >

Re: [PATCH 08/14] taint: add taint for direct hardware access

lease valve for any and all commands to be > > sent, but flagged with WARN_TAINT_ONCE if the driver has not > > explicitly enabled it on an allowed list of known-good / kernel > > coordinated commands. > > > > On Fri, Jan 29, 2021 at 4:25 PM Ben Widawsky wrote: >

Re: [EXT] Re: [PATCH 04/14] cxl/mem: Implement polled mode mailbox

On 21-02-04 21:53:29, John Groves (jgroves) wrote: >Micron Confidential > > > >From: Dan Williams >Date: Monday, February 1, 2021 at 1:28 PM >To: Ben Widawsky >Cc: Konrad Rzeszutek Wilk , >linux-...@vger.kernel.org , Linux ACPI >

Re: [PATCH 13/14] cxl/mem: Add limited Get Log command (0401h)

On 21-02-03 12:31:00, Dan Williams wrote: > On Wed, Feb 3, 2021 at 10:16 AM Konrad Rzeszutek Wilk > wrote: > > > > On Wed, Feb 03, 2021 at 09:16:10AM -0800, Ben Widawsky wrote: > > > On 21-02-02 15:57:03, Dan Williams wrote: > > > > On Tue, Feb 2, 2021

Re: [PATCH 03/14] cxl/mem: Find device capabilities

On 21-02-04 07:16:46, Christoph Hellwig wrote: > On Wed, Feb 03, 2021 at 01:23:31PM -0800, Dan Williams wrote: > > > I'd prefer to keep the helpers for now as I do find them helpful, and so > > > far > > > nobody else who has touched the code has complained. If you feel > > > strongly, I > > > wi

Re: [PATCH 03/14] cxl/mem: Find device capabilities

On 21-02-03 17:15:34, Christoph Hellwig wrote: > On Tue, Feb 02, 2021 at 10:24:18AM -0800, Ben Widawsky wrote: > > > > + /* Cap 4000h - CXL_CAP_CAP_ID_MEMDEV */ > > > > + struct { > > > > + void __iomem *regs; > > > > +

Re: [PATCH 13/14] cxl/mem: Add limited Get Log command (0401h)

On 21-02-02 15:57:03, Dan Williams wrote: > On Tue, Feb 2, 2021 at 3:51 PM Ben Widawsky wrote: > > > > On 21-02-01 13:28:48, Konrad Rzeszutek Wilk wrote: > > > On Fri, Jan 29, 2021 at 04:24:37PM -0800, Ben Widawsky wrote: > > > > The Get Log command ret

Re: [PATCH 04/14] cxl/mem: Implement polled mode mailbox

On 21-02-02 15:54:03, Dan Williams wrote: > On Tue, Feb 2, 2021 at 2:57 PM Ben Widawsky wrote: > > > > On 21-02-01 12:00:18, Dan Williams wrote: > > > On Sat, Jan 30, 2021 at 3:52 PM David Rientjes > > > wrote: > > > > > > > > On Fri, 2

Re: [PATCH 13/14] cxl/mem: Add limited Get Log command (0401h)

On 21-02-01 13:28:48, Konrad Rzeszutek Wilk wrote: > On Fri, Jan 29, 2021 at 04:24:37PM -0800, Ben Widawsky wrote: > > The Get Log command returns the actual log entries that are advertised > > via the Get Supported Logs command (0400h). CXL device logs are selected > > by

Re: [PATCH 07/14] cxl/mem: Add send command

On 21-02-01 13:15:35, Konrad Rzeszutek Wilk wrote: > > +/** > > + * struct cxl_send_command - Send a command to a memory device. > > + * @id: The command to send to the memory device. This must be one of the > > + * commands returned by the query command. > > + * @flags: Flags for the command (inpu

Re: [PATCH 04/14] cxl/mem: Implement polled mode mailbox

On 21-02-01 12:00:18, Dan Williams wrote: > On Sat, Jan 30, 2021 at 3:52 PM David Rientjes wrote: > > > > On Fri, 29 Jan 2021, Ben Widawsky wrote: > > > > > Provide enough functionality to utilize the mailbox of a memory device. > > > The mailbox is used t

Re: [PATCH 04/14] cxl/mem: Implement polled mode mailbox

On 21-01-30 15:51:57, David Rientjes wrote: > On Fri, 29 Jan 2021, Ben Widawsky wrote: > [snip] > > +/** > > + * cxl_mem_mbox_send_cmd() - Send a mailbox command to a memory device. > > + * @cxlm: The CXL memory device to communicate with. > > + * @mbox_cmd: Comman

Re: [PATCH 06/14] cxl/mem: Add basic IOCTL interface

On 21-02-02 18:15:05, Christoph Hellwig wrote: > > +#if defined(__cplusplus) > > +extern "C" { > > +#endif > > This has no business in a kernel header. This was copypasta from DRM headers (which as you're probably aware wasn't always part of the kernel)... It's my mistake and I will get rid of it

Re: [PATCH 02/14] cxl/mem: Map memory device registers

On 21-02-02 18:04:41, Christoph Hellwig wrote: > Any reason not to merge a bunch of patches? Both this one and > the previous one are rather useless on their own, making review > harder than necessary. > As this is an initial driver, there's obviously no functional/regression testing value in se

Re: [PATCH 03/14] cxl/mem: Find device capabilities

On 21-02-02 18:10:16, Christoph Hellwig wrote: > On Fri, Jan 29, 2021 at 04:24:27PM -0800, Ben Widawsky wrote: > > #ifndef __CXL_H__ > > #define __CXL_H__ > > > > +#include > > +#include > > +#include > &

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