Hi Bartlomiej,
Thanks for the comments.
On Thu, Jul 7, 2016 at 1:17 PM, Bartlomiej Zolnierkiewicz
wrote:
>
> Hi
>
> On Thursday, July 07, 2016 12:45:57 PM Sylwester Nawrocki wrote:
>> On 07/05/2016 10:29 PM, Abhilash Kesavan wrote:
>> > Exynos7 has the same CPU clo
Hi Sylwester,
On Thu, Jul 7, 2016 at 12:45 PM, Sylwester Nawrocki
wrote:
> On 07/05/2016 10:29 PM, Abhilash Kesavan wrote:
>> Exynos7 has the same CPU clock registers layout as that present
>> in Exynos5433 except for the bits in the MUX_STAT* register
Hi Krzysztof,
On Wed, Jul 6, 2016 at 8:47 AM, Krzysztof Kozlowski
wrote:
> On Tue, Jul 5, 2016 at 10:28 PM, Abhilash Kesavan
> wrote:
>> Exynos7 has certain PMU registers that needs to be configured with
>> u32 values.
>>
>> Signed-off-by: Abhilash Kesavan
Hi Krzysztof,
[...]
>> diff --git a/drivers/soc/samsung/exynos-pmu.c
>> b/drivers/soc/samsung/exynos-pmu.c
>> index 0acdfd8..7cda8fb 100644
>> --- a/drivers/soc/samsung/exynos-pmu.c
>> +++ b/drivers/soc/samsung/exynos-pmu.c
>> @@ -88,6 +88,9 @@ static const struct of_device_id
>> exynos_pmu_of_d
Hi Sylwester,
Thanks for the review.
On Thu, Jul 7, 2016 at 12:26 PM, Sylwester Nawrocki
wrote:
> On 07/05/2016 10:29 PM, Abhilash Kesavan wrote:
>
>> +static const struct samsung_pll_rate_table pll1450x_24mhz_tbl[] = {
>> + /* rate, m, p, s */
>> + PLL_35XX_RA
Exynos7 has the same CPU clock registers layout as that present
in Exynos5433 except for the bits in the MUX_STAT* registers.
Add a new CLK_CPU_HAS_MODIFIED_MUX_STAT flag to handle this change.
Signed-off-by: Abhilash Kesavan
---
drivers/clk/samsung/clk-cpu.c | 10 --
drivers/clk
CMU_ATLAS generates all the necessary clocks for the Cortex-A57
block. Enable clock support for this block, which includes:
- addition of mux/divider/gate/pll clocks
- addition of CPU clocks configuration data
- instantiation of the atlas CPU clock
Signed-off-by: Abhilash
exynos5433 cpu clock support
Abhilash Kesavan (2):
clk: samsung: cpu: Prepare for addition for Exynos7 CPU clocks
clk: samsung: exynos7: Add clocks for atlas block
.../devicetree/bindings/clock/exynos7-clock.txt| 6 +
drivers/clk/samsung/clk-cpu.c | 10 +-
drivers
Add initial PMU settings for exynos7. This is required for
future suspend-to-ram and cpuidle support.
Signed-off-by: Eunseok Choi
Signed-off-by: Abhilash Kesavan
---
drivers/soc/samsung/Kconfig | 2 +-
drivers/soc/samsung/Makefile| 3 +-
drivers/soc/samsung
Add support for the Power Management Unit on Exynos7. These patches
have been tested on an Exynos7 espresso board (next-20160704).
Abhilash Kesavan (2):
soc: samsung: Change type of PMU configuration register value to u32
soc: samsung: Add support for Exynos7 PMU
drivers/soc/samsung
Exynos7 has certain PMU registers that needs to be configured with
u32 values.
Signed-off-by: Abhilash Kesavan
---
drivers/soc/samsung/exynos-pmu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/samsung/exynos-pmu.h b/drivers/soc/samsung/exynos-pmu.h
index
Hi Javier,
On Tue, Apr 7, 2015 at 8:30 PM, Javier Martinez Canillas
wrote:
> Hello Abhilash,
>
> On 04/07/2015 04:38 PM, Abhilash Kesavan wrote:
>>>
>>> [0]
>>> From 78aa551ebcb9a4a7ae9d5581c33e0c0f19fe5ad6 Mon Sep 17 00:00:00 2001
>>> From: Javier Ma
t;
> Commit ae43b3289186 ("ARM: 8202/1: dmaengine: pl330: Add runtime Power
> Management support v12") added pm support for the pl330 dma driver but
> it makes the clock for the Exynos5420 MDMA0 DMA controller to be gated
> during suspend and this in turn makes its parent clo
Hi Javier,
On Tue, Apr 7, 2015 at 4:29 PM, Javier Martinez Canillas
wrote:
> Hello Abhilash,
>
> On 04/02/2015 02:22 PM, Abhilash Kesavan wrote:
>> Hi,
>>
>> On Thu, Apr 2, 2015 at 4:01 AM, Javier Martinez Canillas
>> wrote:
>>> Hello Sylwester,
Hi,
On Thu, Apr 2, 2015 at 4:01 AM, Javier Martinez Canillas
wrote:
> Hello Sylwester,
>
> On 04/01/2015 07:31 PM, Sylwester Nawrocki wrote:
>> On 01/04/15 13:44, Javier Martinez Canillas wrote:
>>> On 04/01/2015 01:03 PM, Sylwester Nawrocki wrote:
It's not clear what subsystems affect state
Hi Kevin,
On Wed, Apr 1, 2015 at 2:32 AM, Kevin Hilman wrote:
> Javier Martinez Canillas writes:
>
> [...]
>
>> Unfortunately I don't fully understand why this clock needs to be
>> enabled. It would be good if someone at Samsung can explain in more
>> detail what the real problem really is.
>
>
Hi Stephen,
On Mon, Mar 23, 2015 at 6:03 AM, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the arm-soc tree got a conflict in
> drivers/bus/Kconfig between commit c9966c98697a ("arm-cci: Split the
> code for PMU vs driver support") from the arm-perf tree and commit
> 13fbf3c8d
Hi Greg,
On Fri, Feb 6, 2015 at 9:14 PM, Catalin Marinas wrote:
> On Fri, Feb 06, 2015 at 01:45:25PM +0000, Abhilash Kesavan wrote:
>> Fix alignment faults seen during play-back of files with specific
>> sampling rates such as 44.1K. This is based on the discussio
Now that the samsung thermal driver dependency on ARCH_HAS_BANDGAP
has been removed, fix the arch code selection too.
Signed-off-by: Abhilash Kesavan
Reviewed-by: Bartlomiej Zolnierkiewicz
Acked-by: Lukasz Majewski
---
arch/arm/mach-exynos/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff
;> + con &= ~(1 << EXYNOS7_PD_DET_EN_SHIFT);
>> interrupt_en = 0; /* Disable all interrupts */
>> }
>> - con |= 1 << EXYNOS7_PD_DET_EN_SHIFT;
>>
>> writel(interrupt_en, data->base + EXYNOS7_TMU_REG_INT
sampling rate). In such cases we get
unhandled alignment faults. Use ioremap_wc in place of ioremap which
gives us normal non-cacheable memory instead of device memory.
Signed-off-by: Abhilash Kesavan
Tested-by: Tony Lindgren
Tested-by: Heiko Stuebner
---
drivers/misc/sram.c | 17
t;iomap.h". c6x arch is the only one I am not sure of.
Abhilash Kesavan (3):
m32r: add definition of ioremap_wc to io.h
lib: devres: add a helper function for ioremap_wc
misc: sram: switch to ioremap_wc from ioremap
Documentation/driver-model/devres.txt |1 +
arch/m32r/include/asm/io
Before adding a resource managed ioremap_wc function, we need
to have ioremap_wc defined for m32r to prevent build errors.
Signed-off-by: Abhilash Kesavan
---
arch/m32r/include/asm/io.h |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/m32r/include/asm/io.h b/arch/m32r/include/asm
Implement a resource managed writecombine ioremap function.
Signed-off-by: Abhilash Kesavan
---
Documentation/driver-model/devres.txt |1 +
include/linux/io.h|2 ++
lib/devres.c | 28
3 files changed, 31
Hi Eduardo,
On Sun, Feb 1, 2015 at 12:54 AM, Eduardo Valentin wrote:
> On Tue, Jan 27, 2015 at 11:18:22AM +0530, Abhilash Kesavan wrote:
>> Add registers, bit fields and compatible strings for Exynos7 TMU
>> (Thermal Management Unit). Following are a few of the differences
>&g
dled by a TMU_CONTROL1
>> register (No support for this in the current patch).
>>
>> This patch adds special clock support required only for Exynos7. It
>> also updates the "code_to_temp" prototype as Exynos7 has 9 bit
>> code-temp mapping.
>>
&
Hi Eduardo,
On Tue, Jan 27, 2015 at 11:18 AM, Abhilash Kesavan
wrote:
> Add documentation for exynos7 thermal bindings including compatible
> name and special clock properties.
>
> Signed-off-by: Abhilash Kesavan
> ---
> .../devicetree/bindings/thermal/exynos-thermal.txt |
Add documentation for exynos7 thermal bindings including compatible
name and special clock properties.
Signed-off-by: Abhilash Kesavan
---
.../devicetree/bindings/thermal/exynos-thermal.txt |4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/thermal
Signed-off-by: Abhilash Kesavan
---
This patch set has been tested on linux next-20150123 with Eduardo's
thermal-next branch merged along with the arch-side exynos7 related
dts changes applied.
Changes since v3:
Addressed comments from Lukasz Majewski:
- Added more comments in the c
dled by a TMU_CONTROL1
>> register (No support for this in the current patch).
>>
>> This patch adds special clock support required only for Exynos7
>> and updates the bindings documentation appropriately. It also updates
>> the "code_to_temp" proto
_temp" prototype as Exynos7 has 9 bit code-temp mapping.
Signed-off-by: Abhilash Kesavan
---
This patch is based on Lukasz Majewski's Exynos TMU v4 patchset:
http://www.spinics.net/lists/linux-samsung-soc/msg41183.html
Changes since v2:
- Rebased on top of Lukasz' latest e
Hi Greg,
On Thu, Dec 11, 2014 at 8:28 AM, Abhilash Kesavan wrote:
> Implement a resource managed writecombine ioremap function.
>
> Signed-off-by: Abhilash Kesavan
> ---
> Documentation/driver-model/devres.txt |1 +
> include/linux/io.h|2
Hi Rob and Philipp,
On Tue, Jan 6, 2015 at 10:57 PM, Rob Herring wrote:
> On Tue, Jan 6, 2015 at 10:54 AM, Philipp Zabel wrote:
>> Hi Abhilash,
>>
>> Am Dienstag, den 06.01.2015, 19:57 +0530 schrieb Abhilash Kesavan:
>>> >> From the existing dts files, omap,
Hi Tony,
On Mon, Jan 5, 2015 at 11:48 PM, Tony Lindgren wrote:
> * Abhilash Kesavan [141217 04:37]:
>> Hi,
>>
>> On Thu, Dec 11, 2014 at 8:28 PM, Catalin Marinas
>> wrote:
>> > On Thu, Dec 11, 2014 at 11:40:46AM +, Philipp Zabel wrote:
>>
abel wrote:
>> > > Hi Abhilash,
>> > >
>> > > Am Donnerstag, den 11.12.2014, 08:28 +0530 schrieb Abhilash Kesavan:
>> > > > Currently, the SRAM allocator returns device memory via ioremap.
>> > > > This causes issues on ARM64 when the
sampling rate). In such cases we get
unhandled alignment faults. Use ioremap_wc in place of ioremap which
gives us normal non-cacheable memory instead of device memory.
Signed-off-by: Abhilash Kesavan
---
This is based on the discussion about the crash here:
http://www.spinics.net/lists/arm-kernel
Implement a resource managed writecombine ioremap function.
Signed-off-by: Abhilash Kesavan
---
Documentation/driver-model/devres.txt |1 +
include/linux/io.h|2 ++
lib/devres.c | 28
3 files changed, 31
Hi Bartlomiej and Lukasz,
On Wed, Nov 26, 2014 at 9:01 PM, Abhilash Kesavan
wrote:
> Hi Eduardo,
>
> On Wed, Nov 26, 2014 at 8:44 PM, Eduardo Valentin wrote:
>> Abhilash,
>>
>> On Wed, Nov 26, 2014 at 08:34:19PM +0530, Abhilash Kesavan wrote:
>>> Hi Eduardo,
Hi Eduardo,
On Wed, Nov 26, 2014 at 8:44 PM, Eduardo Valentin wrote:
> Abhilash,
>
> On Wed, Nov 26, 2014 at 08:34:19PM +0530, Abhilash Kesavan wrote:
>> Hi Eduardo,
>>
>> On Wed, Nov 26, 2014 at 8:15 PM, Eduardo Valentin
>> wrote:
>> >
>> >
Hi Eduardo,
On Wed, Nov 26, 2014 at 8:15 PM, Eduardo Valentin wrote:
>
> Abhilash,
>
> On Wed, Nov 26, 2014 at 06:21:10AM +0530, Abhilash Kesavan wrote:
>> Exynos7 has a special clock required for the functional operation
>> of the TMU that is not present in earlier SoCs.
Exynos7 has a special clock required for the functional operation
of the TMU that is not present in earlier SoCs. Add support for
this clock and update the binding documentation.
Signed-off-by: Abhilash Kesavan
---
Changes since v1:
- Added a per-soc flag to indicate the presence of
any issues.
Signed-off-by: Pankaj Dubey
Signed-off-by: Naveen Krishna Chatradhi
Signed-off-by: Abhilash Kesavan
Cc: Greg Kroah-Hartman
Acked-by: Greg Kroah-Hartman
---
Changes in v2:
- Added Greg's ack and Kukjin Kim as a recepient
drivers/tty/serial/Kconfig |4 ++--
1
Hi Kukjin,
On Wed, Nov 19, 2014 at 12:58 PM, Kukjin Kim wrote:
> On 11/18/14 03:59, Greg KH wrote:
>> On Mon, Nov 17, 2014 at 10:14:51AM +0530, Abhilash Kesavan wrote:
>>> From: Pankaj Dubey
>>>
>>> Exynos7 has a similar serial controller to that present in o
any issues.
Signed-off-by: Pankaj Dubey
Signed-off-by: Naveen Krishna Chatradhi
Signed-off-by: Abhilash Kesavan
Cc: Greg Kroah-Hartman
---
Re-sending as the previous version did not reach Greg KH.
drivers/tty/serial/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Hello Greg,
On Mon, Nov 17, 2014 at 2:40 AM, gre...@linuxfoundation.org
wrote:
> On Sun, Nov 16, 2014 at 07:47:02AM +0530, Abhilash Kesavan wrote:
>> Hello Greg,
>>
>> On Tue, Nov 11, 2014 at 7:55 PM, Abhilash Kesavan
>> wrote:
>> > Hi Greg,
>> >
&
Hello Greg,
On Tue, Nov 11, 2014 at 7:55 PM, Abhilash Kesavan
wrote:
> Hi Greg,
>
> On Tue, Sep 30, 2014 at 8:02 PM, Abhilash Kesavan
> wrote:
>> Hi Tomasz,
>>
>> On Tue, Sep 30, 2014 at 4:08 AM, Tomasz Figa wrote:
>>> Hi Abhilash,
>>>
>&g
Hi Greg,
On Tue, Sep 30, 2014 at 8:02 PM, Abhilash Kesavan
wrote:
> Hi Tomasz,
>
> On Tue, Sep 30, 2014 at 4:08 AM, Tomasz Figa wrote:
>> Hi Abhilash,
>>
>> The patch itself seems fine, but I wonder if those config options aren't
>> really just leftovers fr
Hi Chanwoo,
On Sat, Nov 1, 2014 at 11:57 AM, Chanwoo Choi wrote:
> Hi Abhilash,
>
> On Sat, Nov 1, 2014 at 1:00 PM, Abhilash Kesavan
> wrote:
>> Hi Chanwoo,
>>
>> On Fri, Oct 31, 2014 at 9:44 PM, Chanwoo Choi wrote:
>>> Hi Abhilash,
>>>
>&g
reserved in exynos7-adc. This results in a different init_hw
function for exynos7.
Signed-off-by: Abhilash Kesavan
---
- Based on Naveen's "iio: exynos-adc: use syscon instead of ioremap" patchset
http://comments.gmane.org/gmane.linux.kernel.iio/13943
.../devicetree/bindi
Hi Chanwoo,
On Fri, Oct 31, 2014 at 9:44 PM, Chanwoo Choi wrote:
> Hi Abhilash,
>
> On Fri, Oct 31, 2014 at 11:01 PM, Abhilash Kesavan
> wrote:
>> Hi Chanwoo,
>>
>> Thanks for the quick response.
>>
>> On Fri, Oct 31, 2014 at 6:17 PM, Chanwoo Choi wro
Hi Chanwoo,
Thanks for the quick response.
On Fri, Oct 31, 2014 at 6:17 PM, Chanwoo Choi wrote:
> Hi Abhilash,
>
> On 10/31/2014 09:38 PM, Abhilash Kesavan wrote:
>> The ADC on exynos7 is quite similar to ADCv2. The differences are as
>> follows:
>> - v3 has
different init_hw function
for v3.
Signed-off-by: Abhilash Kesavan
---
- Based on Naveen's "iio: exynos-adc: use syscon instead of ioremap" patchset
http://comments.gmane.org/gmane.linux.kernel.iio/13943
.../devicetree/bindings/arm/samsung/exynos-adc.txt |2 ++
Hello Robert,
On Thu, Oct 2, 2014 at 8:38 PM, Robert Richter wrote:
> On 23.09.14 13:26:19, Robert Richter wrote:
>> On 19.09.14 15:08:56, Catalin Marinas wrote:
>> > On Fri, Sep 19, 2014 at 01:30:56PM +0100, Robert Richter wrote:
>> > > On 16.09.14 20:49:18, Andrew Bresticker wrote:
>> > > > > R
Hi Tomasz,
On Tue, Sep 30, 2014 at 4:08 AM, Tomasz Figa wrote:
> Hi Abhilash,
>
> The patch itself seems fine, but I wonder if those config options aren't
> really just leftovers from the past and couldn't be completely removed.
>
> On 29.09.2014 07:16, Abhilash Ke
any issues.
Signed-off-by: Pankaj Dubey
Signed-off-by: Naveen Krishna Chatradhi
Signed-off-by: Abhilash Kesavan
Cc: Greg Kroah-Hartman
---
Build tested with s3c6400_defconfig, exynos_defconfig and arm64's defconfig
with and without the serial driver enabled.
drivers/tty/serial/Kconfig |
Hi Arnd,
I will be taking this forward as Naveen is no longer with Samsung.
On Wed, Sep 3, 2014 at 4:26 PM, Arnd Bergmann wrote:
> On Wednesday 03 September 2014 13:51:56 Naveen Krishna Ch wrote:
>> On 2 September 2014 21:16, Arnd Bergmann wrote:
>> > On Tuesday 02 September 2014 20:52:00 Navee
Hi Tomasz,
On Tue, Jun 24, 2014 at 7:27 PM, Tomasz Figa wrote:
> Due to recent consolidation of Exynos suspend and cpuidle code, some
> parts of suspend and resume sequences are executed two times, once from
> exynos_pm_syscore_ops and then from exynos_cpu_pm_notifier() and thus it
> breaks suspe
Hi Lorenzo and Chander,
On Wed, Jun 11, 2014 at 6:45 PM, Lorenzo Pieralisi
wrote:
> On Wed, Jun 11, 2014 at 01:14:21PM +0100, Chander Kashyap wrote:
>> On Wed, Jun 11, 2014 at 3:43 PM, Lorenzo Pieralisi
>> wrote:
>> > On Wed, Jun 11, 2014 at 05:52:10AM +0100, Chander Kashyap wrote:
>> >> Hi Doug
Hi Leela,
On Thu, Apr 24, 2014 at 3:56 PM, Leela Krishna Amudala
wrote:
> Hi Abhilash,
>
> If you are okay with this patchset you can rebase/merge it with your
> mcpm patches.
I have added these patches as part of my mcpm v3 patchset.
Thanks,
Abhilash
>
> Best Wishes,
> Leela Krishna.
>
> On Th
Hi,
CC'ing Doug and Andrew who have also worked on ASV.
[...]
> +
> + chip_id = of_find_compatible_node(NULL, NULL,
> + "samsung,exynos4210-chipid");
> + if (!chip_id) {
> + pr_err("%s: unable to find chipid\n", __func__);
>
Hi,
CC'ing Doug and Andrew who have also worked on ASV.
[...]
> diff --git a/drivers/power/asv/Kconfig b/drivers/power/asv/Kconfig
> new file mode 100644
> index ..761119d9f7f8
> --- /dev/null
> +++ b/drivers/power/asv/Kconfig
> @@ -0,0 +1,10 @@
> +menuconfig POWER_ASV
> + bool
Hi Yadwinder and Sachin,
On Mon, Nov 18, 2013 at 9:37 AM, Sachin Kamat wrote:
> Hi MyungJoo,
>
> On 18 November 2013 08:07, MyungJoo Ham wrote:
>>
>> 2013. 11. 15. 오후 8:44에 "Sachin Kamat" 님이 작성:
>>
>>
>>>
>>> Original cover letter from Yadwinder:
>>> This series is to add basic common infrastruc
Exynos5-bus device devfreq driver monitors PPMU counters and
adjusts operating frequencies and voltages with OPP. ASV should
be used to provide appropriate voltages as per the speed group
of the SoC rather than using a constant 1.025V.
Signed-off-by: Abhilash Kesavan
Cc: Jonghwan Choi
Cc
Hi,
On Mon, Feb 4, 2013 at 1:49 PM, MyungJoo Ham wrote:
>> Hi,
>>
>> > Sorry for being late.
>> >
>> > One concern is that I cannot apply Patch 1/4 directly as the .dts file
>> > isn't
>> > available to me.
>> > Do you intend to apply that patch to another tree and apply the other three
>> > to
Hi,
> Sorry for being late.
>
> One concern is that I cannot apply Patch 1/4 directly as the .dts file isn't
> available to me.
> Do you intend to apply that patch to another tree and apply the other three
> to devfreq tree?
I have been merging the devfreq tree into Kgene's tree for my testing. I
Hi Myungjoo,
Any comments on this patch ?
Abhilash
On Fri, Jan 18, 2013 at 6:54 PM, Abhilash Kesavan wrote:
> Exynos5-bus device devfreq driver monitors PPMU counters and
> adjusts operating frequencies and voltages with OPP. ASV should
> be used to provide appropriate voltages a
Exynos5-bus device devfreq driver monitors PPMU counters and
adjusts operating frequencies and voltages with OPP. ASV should
be used to provide appropriate voltages as per the speed group
of the SoC rather than using a constant 1.025V.
Signed-off-by: Abhilash Kesavan
Cc: Jonghwan Choi
Cc
In anticipation of the new exynos5 devfreq and ppmu driver, create
an exynos sub-directory. Move the existing exynos4 devfreq driver
into the same.
Signed-off-by: Abhilash Kesavan
Acked-by: MyungJoo Ham
Cc: Jonghwan Choi
Cc: Kukjin Kim
---
Note: No changes, rebased against latest tree. Only
Setup the INT clock ops to control/vary INT frequency
Signed-off-by: Abhilash Kesavan
Acked-by: MyungJoo Ham
Cc: Jonghwan Choi
Cc: Kukjin Kim
---
Changes since RFC v1:
* Fixed the unnecessary clock manipulations being done
* Moved the PPMU driver from drivers/devfreq to machine specific
PPMU is required by the devfreq driver. Add a device tree
node for it.
Signed-off-by: Abhilash Kesavan
Acked-by: MyungJoo Ham
Cc: Jonghwan Choi
Cc: Kukjin Kim
---
Changes since v3:
* Modified the dt bindings as per updated devfreq driver
Changes before v3:
* No change
Tested after merging
Hi Rajagopal,
Thanks for the review. Sorry for the late response, have been a little
busy with other things,
[...]
>> +#include "../governor.h"
>
> This header file is meant for governors use. What's the need of it here?
I was using a custom monitor function and needed update_devfreq for
it. Will
Exynos5-bus device devfreq driver monitors PPMU counters and
adjusts operating frequencies and voltages with OPP. ASV should
be used to provide appropriate voltages as per the speed group
of the SoC rather than using a constant 1.025V.
Signed-off-by: Abhilash Kesavan
Cc: Jonghwan Choi
Cc
Setup the INT clock ops to control/vary INT frequency
Signed-off-by: Abhilash Kesavan
Cc: Jonghwan Choi
Cc: Kukjin Kim
---
arch/arm/mach-exynos/clock-exynos5.c | 143
arch/arm/mach-exynos/include/mach/regs-clock.h | 37 ++
2 files changed, 180
PPMU is required by the devfreq driver. Add a device tree
node for it.
Signed-off-by: Abhilash Kesavan
Cc: Jonghwan Choi
Cc: Kukjin Kim
---
.../bindings/arm/exynos/ppmu-exynos5.txt | 28
arch/arm/boot/dts/exynos5250.dtsi |9 ++
2 files
On Sun, Dec 30, 2012 at 11:45 AM, Olof Johansson wrote:
> Hi,
Hi Olof,
>> +# ppmu support
>> +
>> +obj-$(CONFIG_EXYNOS5250_PPMU)+= exynos_ppmu.o exynos5_ppmu.o
>
> Quite obvious that it's ppmu support from the file names. No need for
> a comment.
Will improve the commenting in the
- Setup the INT clock ops to control/vary INT frequency
- Add PPMU support for Exynos5250
- Add mappings initially for the PPMU device
Signed-off-by: Abhilash Kesavan
---
Changes since RFC v1:
* Fixed the unnecessary clock manipulations being done
* Moved the PPMU driver from drivers/devfreq to
Exynos5-bus device devfreq driver monitors PPMU counters and
adjusts operating frequencies and voltages with OPP. ASV should
be used to provide appropriate voltages as per the speed group
of the SoC rather than using a constant 1.025V.
Signed-off-by: Abhilash Kesavan
Cc: Jonghwan Choi
Cc
On Tue, Dec 11, 2012 at 5:29 AM, Jonghwan Choi wrote:
> Hi Abhilash Kesavan.
Hi Mr Choi,
Thanks for your comments.
>
>
>> + /* Change Divider - LEX */
>> + tmp = __raw_readl(EXYNOS5_CLKDIV_LEX);
>> +
>> + tmp &
On Tue, Dec 11, 2012 at 6:27 PM, Mark Brown
wrote:
> On Mon, Dec 10, 2012 at 02:06:49PM +0530, Abhilash Kesavan wrote:
>> On Mon, Dec 10, 2012 at 1:49 PM, Abhilash Kesavan
>> wrote:
>
>> > Mark Brown opensource.wolfsonmicro.com> writes:
>
>> >> Bin
- Setup the INT clock ops to control/vary INT frequency
- Add mappings initially for the PPMU device
Signed-off-by: Abhilash Kesavan
---
Corresponding devfreq driver support for Exynos5 has been posted at:
https://patchwork.kernel.org/patch/1823931/
Tested after merging for-rafael branch of
git
Adding missed Cc's
On Mon, Dec 10, 2012 at 1:49 PM, Abhilash Kesavan
wrote:
> Mark Brown opensource.wolfsonmicro.com> writes:
>
> [...]
>> Binding documenation is mandatory for any new OF properties, please add
>> this.
> Patch 3/3 of this series adds docum
Mark Brown opensource.wolfsonmicro.com> writes:
[...]
> Binding documenation is mandatory for any new OF properties, please add
> this.
Patch 3/3 of this series adds documentation for the max77686-opmode property.
>
--
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Currently, we cannot specify the regulator suspend state via device
tree. Add an optional operating mode property which can be used to
set initially the regulator mode.
We are currently bypassing the set_suspend_disable and set_suspend_mode
call-backs.
Signed-off-by: Abhilash Kesavan
Add documenatation for various operating mode capabilities of
the MAX77686 PMIC.
Signed-off-by: Abhilash Kesavan
---
Documentation/devicetree/bindings/mfd/max77686.txt |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/max77686
Some of the LDOs and BUCKs on the MAX77686 PMIC can be put into a
low power or standby state. Add bindings to control the operating
mode. This results in significant power savings during suspend.
Signed-off-by: Abhilash Kesavan
---
arch/arm/boot/dts/cros5250-common.dtsi | 36
set_suspend_mode
call-backs. Please review and suggest improvements.
This is based on
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git : for-next
merged with
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git : for-next
Abhilash Kesavan (3):
ARM: DTS
Hi Mark,
On Thu, Dec 6, 2012 at 11:58 AM, Mark Brown
wrote:
> On Thu, Dec 06, 2012 at 11:55:11AM +0530, Abhilash Kesavan wrote:
>
>> As of now there is no support in the regulator core to specify the suspend
>> state
>> (mode, enabled/disabled) using dt. I can add n
Cc'ing missed out recipients
-- Forwarded message --
From: Abhilash Kesavan
Date: Tue, Dec 4, 2012 at 9:48 PM
Subject: Re: [PATCH RFC] PM/Devfreq: Add Exynos5-bus devfreq driver
for Exynos5250.
To: linux...@vger.kernel.org
Jonghwan Choi samsung.com> writes:
>
>
Exynos5-bus device devfreq driver monitors PPMU counters and
adjusts operating frequencies and voltages with OPP. ASV should
be used to provide appropriate voltages as per the speed group
of the SoC rather than using a constant 1.025V.
Signed-off-by: Abhilash Kesavan
Cc: Jonghwan Choi
Cc
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