On Tue 5.Jan'21 at 15:03:06 +0100, Greg Kroah-Hartman wrote:
On Tue, Dec 15, 2020 at 06:02:51PM +0800, Shuo A Liu wrote:
On Tue 15.Dec'20 at 11:00:57 +0100, Greg Kroah-Hartman wrote:
> On Tue, Dec 15, 2020 at 05:52:59PM +0800, Shuo A Liu wrote:
> > On Wed 2.Dec'20 at 10:14:29 +0800, Shuo A Liu
On Wed, Jan 06, 2021 at 03:36:07PM +0800, Xu Yilun wrote:
> This driver supports the ethernet retimers (C827) for the Intel PAC
> (Programmable Acceleration Card) N3000, which is a FPGA based Smart NIC.
>
> C827 is an Intel(R) Ethernet serdes transceiver chip that supports
> up to 100G transfer. O
Add support for the LTC4162-L Li-Ion battery charger. The driver allows
reading back telemetry and to set some charging options like the input
current limit.
Signed-off-by: Mike Looijmans
---
v2: Use microohm units instead of milliohm
Add interrupt support using smbalert
Support obtaining
From: Shuo Liu
Launch a simple guest (with several instructions as payload) on ACRN
with demonstration ioctl usage.
Signed-off-by: Shuo Liu
---
samples/acrn/Makefile| 12
samples/acrn/guest.ld| 9 +++
samples/acrn/payload.ld | 9 +++
samples/acrn/vm-sample.c | 136 ++
From: Shuo Liu
irqfd is a mechanism to inject a specific interrupt to a User VM using a
decoupled eventfd mechanism.
Vhost is a kernel-level virtio server which uses eventfd for interrupt
injection. To support vhost on ACRN, irqfd is introduced in HSM.
HSM provides ioctls to associate a virtual
From: Shuo Liu
ACRN supports partition mode to achieve real-time requirements. In
partition mode, a CPU core can be dedicated to a vCPU of User VM. The
local APIC of the dedicated CPU core can be passthrough to the User VM.
The Service VM controls the assignment of the CPU cores.
Introduce an in
On Sun, Dec 13, 2020 at 10:39 PM Leo Yan wrote:
>
> Except the existed three display options 'tot', 'rmt', 'lcl', this patch
> adds option 'all' so can sort on the all cache hit for load operation.
> This new introduced option can be a choice for profiling cache false
> sharing if the memory event
On Wed 30.Dec'20 at 18:33:05 +0100, Borislav Petkov wrote:
On Tue, Dec 01, 2020 at 05:38:39PM +0800, shuo.a@intel.com wrote:
From: Shuo Liu
The Service VM communicates with the hypervisor via conventional
hypercalls. VMCALL instruction is used to make the hypercalls.
ACRN hypercall ABI:
From: Shuo Liu
The C-states and P-states data are used to support CPU power management.
The hypervisor controls C-states and P-states for a User VM.
ACRN userspace need to query the data from the hypervisor to build ACPI
tables for a User VM.
HSM provides ioctls for ACRN userspace to query C-st
From: Shuo Liu
ioeventfd is a mechanism to register PIO/MMIO regions to trigger an
eventfd signal when written to by a User VM. ACRN userspace can register
any arbitrary I/O address with a corresponding eventfd and then pass the
eventfd to a specific end-point of interest for handling.
Vhost is
From: Shuo Liu
ACRN userspace need to inject virtual interrupts into a User VM in
devices emulation.
HSM needs provide interfaces to do so.
Introduce following interrupt injection interfaces:
ioctl ACRN_IOCTL_SET_IRQLINE:
Pass data from userspace to the hypervisor, and inform the hypervisor
From: Shuo Liu
An I/O request of a User VM, which is constructed by hypervisor, is
distributed by the ACRN Hypervisor Service Module to an I/O client
corresponding to the address range of the I/O request.
I/O client maintains a list of address ranges. Introduce
acrn_ioreq_range_{add,del}() to ma
From: Shuo Liu
PCI device passthrough enables an OS in a virtual machine to directly
access a PCI device in the host. It promises almost the native
performance, which is required in performance-critical scenarios of
ACRN.
HSM provides the following ioctls:
- Assign - ACRN_IOCTL_ASSIGN_PCIDEV
From: Shuo Liu
An I/O request of a User VM, which is constructed by the hypervisor, is
distributed by the ACRN Hypervisor Service Module to an I/O client
corresponding to the address range of the I/O request.
For each User VM, there is a shared 4-KByte memory region used for I/O
requests communi
From: Shuo Liu
A User VM can access its virtual PCI configuration spaces via port IO
approach, which has two following steps:
1) writes address into port 0xCF8
2) put/get data in/from port 0xCFC
To distribute a complete PCI configuration space access one time, HSM
need to combine such two acce
From: Shuo Liu
The HSM provides hypervisor services to the ACRN userspace. While
launching a User VM, ACRN userspace needs to allocate memory and request
the ACRN Hypervisor to set up the EPT mapping for the VM.
A mapping cache is introduced for accelerating the translation between
the Service V
On Tue, Jan 05, 2021 at 10:29:18PM +0200, Filip Kolev wrote:
> There is a debug message using hardcoded function name instead of the
> __func__ macro. Replace it.
>
> Report from checkpatch.pl on the file:
>
> WARNING: Prefer using '"%s...", __func__' to using 'ov2722_remove', this
> function's
From: Shuo Liu
A virtual CPU of User VM has different context due to the different
registers state. ACRN userspace needs to set the virtual CPU
registers state (e.g. giving a initial registers state to a virtual
BSP of a User VM).
HSM provides an ioctl ACRN_IOCTL_SET_VCPU_REGS to do the virtual
From: Shuo Liu
ACRN Hypervisor Service Module (HSM) is a kernel module in Service VM
which communicates with ACRN userspace through ioctls and talks to ACRN
Hypervisor through hypercalls.
Add a basic HSM driver which allows Service VM userspace to communicate
with ACRN. The following patches wil
From: Shuo Liu
The VM management interfaces expose several VM operations to ACRN
userspace via ioctls. For example, creating VM, starting VM, destroying
VM and so on.
The ACRN Hypervisor needs to exchange data with the ACRN userspace
during the VM operations. HSM provides VM operation ioctls to
From: Shuo Liu
The Service VM communicates with the hypervisor via conventional
hypercalls. VMCALL instruction is used to make the hypercalls.
ACRN hypercall ABI:
* Hypercall number is in R8 register.
* Up to 2 parameters are in RDI and RSI registers.
* Return value is in RAX register.
In
Hi Shawn,
On Tue, Jan 05, 2021 at 10:35:17AM +0800, Shawn Guo wrote:
> On Tue, Dec 01, 2020 at 08:41:25AM +0100, Oleksij Rempel wrote:
> > PRTMVT is the reference platform for Protonic industrial touchscreen
> > terminals.
> >
> > Signed-off-by: Oleksij Rempel
> > ---
> > + gpio-keys {
> > +
From: Yin Fengwei
ACRN Hypervisor reports hypervisor features via CPUID leaf 0x4001
which is similar to KVM. A VM can check if it's the privileged VM using
the feature bits. The Service VM is the only privileged VM by design.
Signed-off-by: Yin Fengwei
Signed-off-by: Shuo Liu
Reviewed-by:
From: Shuo Liu
The ACRN Hypervisor builds an I/O request when a trapped I/O access
happens in User VM. Then, ACRN Hypervisor issues an upcall by sending
a notification interrupt to the Service VM. HSM in the Service VM needs
to hook the notification interrupt to handle I/O requests.
Notification
On m68k, which does not define CORE_DUMP_USE_REGSET:
fs/binfmt_elf.c: In function ‘fill_note_info’:
fs/binfmt_elf.c:2040:20: error: passing argument 1 of ‘fill_prstatus’ from
incompatible pointer type [-Werror=incompatible-pointer-types]
2040 | fill_prstatus(info->prstatus, current,
Hi Abhishek,
> btrtl_dev->ic_info is only available from the controller on cold boot
> (the lmp subversion matches the device model and this is used to look up
> the ic_info). On warm boots (firmware already loaded),
> btrtl_dev->ic_info is null.
>
> Fixes: 05672a2c14a4 (Bluetooth: btrtl: Enable
From: Shuo Liu
Add documentation on the following aspects of ACRN:
1) A brief introduction on the architecture of ACRN.
2) I/O request handling in ACRN.
3) CPUID functions of ACRN.
To learn more about ACRN, please go to ACRN project website
https://projectacrn.org, or the documentation pa
From: Shuo Liu
ACRN is a Type 1 reference hypervisor stack, running directly on the bare-metal
hardware, and is suitable for a variety of IoT and embedded device solutions.
ACRN implements a hybrid VMM architecture, using a privileged Service VM. The
Service VM manages the system resources (CPU,
Hi Venkata,
> During SSR after memory dump collection,BT controller will be powered off,
> powered on and then FW will be downloaded.During suspend if BT controller
> is powered off due to SSR then we should wait until SSR is completed and
> then suspend.
>
> Fixes: 2be43abac5a8 ("Bluetooth: hci_
Hi Dinghao,
> When __le32_to_cpu() fails, qca_memdump should be freed
> just like when vmalloc() fails.
>
> Fixes: d841502c79e3f ("Bluetooth: hci_qca: Collect controller memory dump
> during SSR")
> Signed-off-by: Dinghao Liu
> ---
> drivers/bluetooth/hci_qca.c | 2 ++
> 1 file changed, 2 insert
Hi Ard,
> u128_xor() takes pointers to quantities that are assumed to be at least
> 64-bit aligned, which is not guaranteed to be the case in the smp_c1()
> routine. So switch to crypto_xor() instead.
>
> Signed-off-by: Ard Biesheuvel
> ---
> net/bluetooth/smp.c | 5 ++---
> 1 file changed, 2 ins
Hi John-Eric,
> RTL8723DS could be handled by btrtl-driver, so add ability to bind it
> using device tree.
>
> Signed-off-by: John-Eric Kamps
> ---
> drivers/bluetooth/hci_h5.c | 2 ++
> 1 file changed, 2 insertions(+)
patch has been applied to bluetooth-next tree.
Regards
Marcel
On m68k, which does not define CORE_DUMP_USE_REGSET:
fs/binfmt_elf.c: In function ‘fill_note_info’:
fs/binfmt_elf.c:2040:20: error: passing argument 1 of ‘fill_prstatus’ from
incompatible pointer type [-Werror=incompatible-pointer-types]
2040 | fill_prstatus(info->prstatus, current,
On Wed, Jan 06, 2021 at 11:41:20AM +0800, Claire Chang wrote:
> Add the initialization function to create restricted DMA pools from
> matching reserved-memory nodes in the device tree.
>
> Signed-off-by: Claire Chang
> ---
> include/linux/device.h | 4 ++
> include/linux/swiotlb.h | 7 +-
>
On Sun, Dec 13, 2020 at 10:39 PM Leo Yan wrote:
>
> The macro DISPLAY_HITM() is used to calculate HITM percentage introduced
> by every node and it's shown for the node info.
>
> This patch refactors the macro, it is renamed it as DISPLAY_METRICS().
> And the parameters is changed for passing the
On Sun, Dec 13, 2020 at 10:39 PM Leo Yan wrote:
>
> When sort on the respective metrics (lcl_hitm, rmt_hitm, tot_hitm),
> macro FILTER_HITM is to filter out the cache line entries if its
> overhead is less than 1%.
>
> This patch is to refactor macro FILTER_HITM. It uses more gernal name
> FILTER
On Sun, Dec 13, 2020 at 10:39 PM Leo Yan wrote:
>
> For shared cache line statistics, it relies on HITM. We can use more
> general naming rather than only binding to HITM, so replace "hitm_stats"
> with "shared_clines_stats" in structure perf_c2c, and rename function
> resort_hitm_cb() to resort_
On Sun, Dec 13, 2020 at 10:39 PM Leo Yan wrote:
>
> Add dimensions for load miss and its percentage calculation, which is to
> be displayed in the single cache line output.
>
> Signed-off-by: Leo Yan
> ---
> tools/perf/builtin-c2c.c | 107 +++
> 1 file changed
This driver supports the ethernet retimers (C827) for the Intel PAC
(Programmable Acceleration Card) N3000, which is a FPGA based Smart NIC.
C827 is an Intel(R) Ethernet serdes transceiver chip that supports
up to 100G transfer. On Intel PAC N3000 there are 2 C827 chips
managed by the Intel MAX 10
The patch specifies the 2 retimer sub devices and their resources in the
parent driver's mfd_cell. It also adds the register definition of the
retimer sub devices.
There are 2 ethernet retimer chips (C827) connected to the Intel MAX 10
BMC. They are managed by the BMC firmware, and host could quer
This patchset supports the ethernet retimers (C827) for the Intel PAC
(Programmable Acceleration Card) N3000, which is a FPGA based Smart NIC.
The 2 retimer chips connect to the Intel MAX 10 BMC on the card. They are
managed by the BMC firmware. Host could query their link states and
firmware vers
On Sun, Dec 13, 2020 at 10:39 PM Leo Yan wrote:
>
> Add dimensions for load hit and its percentage calculation, which is to
> be displayed in the single cache line output.
>
> Signed-off-by: Leo Yan
> ---
> tools/perf/builtin-c2c.c | 71
> 1 file changed,
Hi,
On Sun, Dec 13, 2020 at 10:39 PM Leo Yan wrote:
>
> Arm SPE trace data doesn't support HITM, but we still want to explore
> "perf c2c" tool to analyze cache false sharing. If without HITM tag,
> the tool cannot give out accurate result for cache false sharing, a
> candidate solution is to so
On 2020-12-31 18:43, Xie He wrote:
In lapb_device_event, lapb_devtostruct is called to get a reference to
an object of "struct lapb_cb". lapb_devtostruct increases the refcount
of the object and returns a pointer to it. However, we didn't decrease
the refcount after we finished using the pointer.
On 2020-12-24 10:49, Xie He wrote:
On Wed, Dec 23, 2020 at 9:01 AM Xie He wrote:
I don't think this patch is suitable for stable branches. This patch
is
part of a patch series that changes the lapb module from "establishing
the
L2 connection only when needed by L3", to "establishing the L2
On Mon, 2021-01-04 at 20:36 +0200, Georgi Djakov wrote:
> On 12/24/20 08:08, Henry Chen wrote:
> > Introduce Mediatek MT6873/MT8183/MT8192 specific provider driver
> > using the interconnect framework.
> >
> > ICC provider ICC Nodes
> >
On Tue, Jan 05, 2021 at 09:21:02PM +0530, Vinod Koul wrote:
> On 05-01-21, 17:56, Manivannan Sadhasivam wrote:
> > Add qpic_nand node to support QPIC NAND controller on SDX55 platform.
> > Since there is no "aon" clock in SDX55, a dummy clock is provided.
> >
> > Signed-off-by: Manivannan Sadhasiv
Hi Alex,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v5.11-rc2 next-20210104]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://g
On Tue, Jan 5, 2021 at 3:38 PM Andy Shevchenko
wrote:
>
> On Tue, Jan 05, 2021 at 03:19:13PM +0100, Bartosz Golaszewski wrote:
> > On Sun, Dec 27, 2020 at 10:27 PM Linus Walleij
> > wrote:
> > >
> > > On Sat, Dec 26, 2020 at 7:41 AM Syed Nayyar Waris
> > > wrote:
> > >
> > > > Since this patch
On Tue, Jan 05, 2021 at 09:42:11PM -0600, Bjorn Andersson wrote:
> On Tue 05 Jan 21:07 CST 2021, Manivannan Sadhasivam wrote:
>
> > On Tue, Jan 05, 2021 at 12:05:49PM -0600, Bjorn Andersson wrote:
> > > On Tue 05 Jan 06:26 CST 2021, Manivannan Sadhasivam wrote:
> > >
> > > > From: Vinod Koul
> >
On 2021/1/5 21:47, Marc Zyngier wrote:
> On 2021-01-05 13:02, Shenming Lu wrote:
>> On 2021/1/5 17:13, Marc Zyngier wrote:
>>> On 2021-01-04 08:16, Shenming Lu wrote:
After pausing all vCPUs and devices capable of interrupting, in order
to save the information of all interrupts, besides f
On Tue, Jan 5, 2021 at 12:03 AM Rob Herring wrote:
>
> DT properties which can have multiple entries need to specify what the
> entries are and define how many entries there can be. In the case of
> only a single entry, just 'maxItems: 1' is sufficient.
>
> Add the missing entry constraints. These
Export an attribute program_nvm_bank that when read reports the current
bank value. To program the chip's current state into NVM, write the
magic value 0xC7 into this attribute.
This allows the clock chip to be programmed "in system" to reduce boot
time by 300ms and allows the clock to be up and r
On Tue, 2021-01-05 at 19:20 +0100, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> If turbo P-states cannot be used, either due to the configuration of
> the processor, or because intel_pstate is not allowed to used them,
> the maximum available P-state with HWP enabled corresponds to the
Signed-off-by: "Huang, Ying"
Cc: "Alejandro Colomar"
---
man2/set_mempolicy.2 | 22 ++
1 file changed, 22 insertions(+)
diff --git a/man2/set_mempolicy.2 b/man2/set_mempolicy.2
index 68011eecb..fa64a1820 100644
--- a/man2/set_mempolicy.2
+++ b/man2/set_mempolicy.2
@@ -113,6
On Tue, Jan 5, 2021 at 4:49 PM wrote:
>
> From: Paul Gortmaker
>
> With global support for a CPU list alias of "all", it seems to just make
> sense to also trivially extend support for an opposite "none" specifier.
>
> Signed-off-by: Paul Gortmaker
> Signed-off-by: Paul E. McKenney
> ---
> Doc
; > url:
> > https://github.com/0day-ci/linux/commits/Bartosz-Golaszewski/rtc-s5m-use-devm_i2c_new_dummy_device/20210105-214736
> > base: https://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git
> > rtc-next
> > config: x86_64-randcon
A new API: numa_set_membind_balancing() is added to libnuma. It is
same as numa_set_membind() except that the Linux kernel NUMA balancing
will be enabled for the task if the feature is supported by the
kernel.
At the same time, a new option: --balancing (-b) is added to numactl.
Which can be used
Now, NUMA balancing can only optimize the page placement among the
NUMA nodes if the default memory policy is used. Because the memory
policy specified explicitly should take precedence. But this seems
too strict in some situations. For example, on a system with 4 NUMA
nodes, if the memory of an
To make it possible to optimize cross-socket memory accessing with
AutoNUMA even if the memory of the application is bound to multiple
NUMA nodes.
Patch [2/3] and [3/3] are NOT kernel patches. Instead, they are
patches for man-pages and numactl respectively. They are sent
together to make it eas
Hi Thomas,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: e71ba9452f0b5b2e8dc8aa5445198cd9214a6a62
commit: 7fd70c65faacd39628ba5f670be6490010c8132f ARM: irqstat: Get rid of
duplicated declaration
date: 6 weeks ag
git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url:
> https://github.com/0day-ci/linux/commits/Bartosz-Golaszewski/rtc-s5m-use-devm_i2c_new_dummy_device/2021010
On 01/03/21 at 09:03pm, Hugh Dickins wrote:
> Boot a CONFIG_MEMCG=y kernel with "cgroup_disabled=memory" and you are
> met by a series of warnings from the VM_WARN_ON_ONCE_PAGE(!memcg, page)
> recently added to the inline mem_cgroup_page_lruvec().
>
> An earlier attempt to place that warning, in m
From: Ryan Houdek
Problem presented:
A backwards compatibility layer that allows running x86-64 and x86
processes inside of an AArch64 process.
- CPU is emulated
- Syscall interface is mostly passthrough
- Some syscalls require patching or emulation depending on behaviour
- Not viable fro
e' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Bartosz-Golaszewski/rtc-s5m-use-devm_i2c_new_dummy_device/20210105-214736
base: https://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git
rtc-next
config: x86_64-randconfig-a00
From: Bartosz Golaszewski
Use the managed variant of i2c_new_dummy_device() to shrink code and
remove the goto label. We can drop the remove callback now too.
Signed-off-by: Bartosz Golaszewski
---
drivers/rtc/rtc-s5m.c | 34 --
1 file changed, 8 insertions(+),
On Wed, Jan 6, 2021 at 12:06 PM Alex Ghiti wrote:
>
> Hi Anup,
>
> Le 1/5/21 à 6:40 AM, Anup Patel a écrit :
> > On Tue, Jan 5, 2021 at 1:29 AM Alexandre Ghiti wrote:
> >>
> >> This is a preparatory patch for relocatable kernel and sv48 support.
> >>
> >> The kernel used to be linked at PAGE_OFFS
Le 1/5/21 à 7:06 AM, Anup Patel a écrit :
On Tue, Jan 5, 2021 at 1:33 AM Alexandre Ghiti wrote:
With 4-level page table folding at runtime, we don't know at compile time
the size of the virtual address space so we must set VA_BITS dynamically
so that sparsemem reserves the right amount of m
The snprintf() function returns the number of characters which would
have been printed if there were enough space, but the scnprintf()
returns the number of characters which were actually printed. If the
buffer is not large enough, then using snprintf() would result in a
read overflow and an inform
Hi Anup,
Le 1/5/21 à 6:40 AM, Anup Patel a écrit :
On Tue, Jan 5, 2021 at 1:29 AM Alexandre Ghiti wrote:
This is a preparatory patch for relocatable kernel and sv48 support.
The kernel used to be linked at PAGE_OFFSET address therefore we could use
the linear mapping for the kernel mapping.
On Tue, Jan 5, 2021 at 5:50 PM Krzysztof Kozlowski wrote:
>
> On Tue, Jan 05, 2021 at 02:44:24PM +0100, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski
> >
> > Use the managed variant of i2c_new_dummy_device() to shrink code and
> > remove the goto label.
> >
> > Signed-off-by: Bartosz G
Hi Paul,
On Tue, Jan 5, 2021 at 4:49 PM wrote:
>
> From: Paul Gortmaker
>
> It is probably better that we don't have subsystem specific
> abbreviations or aliases for generic CPU list specifications.
>
> Hence we move the "all" from RCU out to lib/ so that it can be
> used in any instance where
在 2021/1/5 下午5:19, siyant...@loongson.cn 写道:
> From: Yanteng Si
>
> This is the Chinese version of booting and index file
>
> Signed-off-by: Yanteng Si
> ---
> .../translations/zh_CN/mips/booting.rst | 47 +++
> .../translations/zh_CN/mips/index.rst | 45 ++
On 24-12-20, 21:22, Zheng Yongjun wrote:
> mutex lock can be initialized automatically with DEFINE_MUTEX()
> rather than explicitly calling mutex_init().
Applied, thanks
--
~Vinod
On 28-12-20, 21:30, Alexandre Belloni wrote:
> linux/platform_data/dma-atmel.h is only used by the at_hdmac driver. Move
> the CFG bits definitions back in at_hdmac_regs.h and the remaining
> definitions in the driver.
Applied, thanks...
> /* Bitfields in CFG */
> -/* are in at_hdmac.h */
> +#de
On 29-12-20, 23:17, Cristian Ciocaltea wrote:
> The DMA controller present on the Actions Semi S500 SoC is compatible
> with the S900 variant, so add it to the list of devices supported by
> the Actions Semi Owl DMA driver. Additionally, order the entries
> alphabetically.
Applied, thanks
--
~Vi
On 29-12-20, 23:17, Cristian Ciocaltea wrote:
> Add a new compatible string corresponding to the DMA controller found
> in the S500 variant of the Actions Semi Owl SoCs family. Additionally,
> order the entries alphabetically.
Applied, thanks
--
~Vinod
On 6/1/21 3:22 pm, Roman Gushchin wrote:
Imran Khan reported a regression in hackbench results caused by the
commit f2fe7b09a52b ("mm: memcg/slab: charge individual slab objects
instead of pages"). The regression is noticeable in the case of
a consequent allocation of several relatively large
On 05-01-21, 15:02, Thomas Bogendoerfer wrote:
> Signed-off-by: Thomas Bogendoerfer
Applied after fixing subsystem name, thanks
--
~Vinod
Hi Sudershan,
This patch (and the cover letter) does not copy LAKML even though the
entire change here is arm64 specific. Please do copy all applicable
mailing lists for a given patch.
On 1/6/21 6:58 AM, Sudarshan Rajagopalan wrote:
> Currently on arm64, memory section size is hard-coded to 1GB.
Hi Markus,
I'd like to take some of your advice in this patch, but I noticed that
this one has been applied.
Some of your advice would be considered kindly on my future work.
Thanks.
在 2021/1/5 21:14, Markus Elfring 写道:
A null-ptr-deref bug is reported by Hulk Robot like this:
Can it be c
On Wed, Jan 06, 2021 at 10:27:49AM +0800, Lu Baolu wrote:
> The pci_subdevice_msi_create_irq_domain() should fail if the underlying
> platform is not able to support IMS (Interrupt Message Storage). Otherwise,
> the isolation of interrupt is not guaranteed.
>
> For x86, IMS is only supported on bar
On Tue, Jan 5, 2021 at 8:22 PM Roman Gushchin wrote:
>
> Imran Khan reported a regression in hackbench results caused by the
> commit f2fe7b09a52b ("mm: memcg/slab: charge individual slab objects
> instead of pages"). The regression is noticeable in the case of
> a consequent allocation of several
On Wed, Jan 6, 2021 at 7:22 AM Mike Kravetz wrote:
>
> On 1/4/21 6:55 PM, Muchun Song wrote:
> > On Tue, Jan 5, 2021 at 8:02 AM Mike Kravetz wrote:
> >>
> >> On 1/3/21 10:58 PM, Muchun Song wrote:
> >>> There is a race condition between __free_huge_page()
> >>> and dissolve_free_huge_page().
> >>
Add bit field definition for the eSPI reset control.
Signed-off-by: Chia-Wei, Wang
---
include/dt-bindings/clock/ast2600-clock.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/ast2600-clock.h
b/include/dt-bindings/clock/ast2600-clock.h
index 62b9520a00fd..964934b1
This patch series add the driver support for the eSPI controller
of Aspeed 6th generation SoCs. This controller is a slave device
communicating with a master over Enhanced Serial Peripheral Interface (eSPI).
It supports all of the 4 eSPI channels, namely peripheral, virtual wire,
out-of-band, and f
Add eSPI nodes for the device tree of Aspeed 6th generation SoCs.
Signed-off-by: Chia-Wei, Wang
---
arch/arm/boot/dts/aspeed-g6.dtsi | 57
1 file changed, 57 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 810
The Aspeed eSPI controller is slave device to communicate with
the master through the Enhanced Serial Peripheral Interface (eSPI).
All of the four eSPI channels, namely peripheral, virtual wire,
out-of-band, and flash are supported.
Signed-off-by: Chia-Wei, Wang
---
drivers/soc/aspeed/Kconfig
Add dt-bindings and the inclusion header for Aspeed eSPI controller.
Signed-off-by: Chia-Wei, Wang
---
.../devicetree/bindings/soc/aspeed/espi.yaml | 252 ++
.../interrupt-controller/aspeed-espi-ic.h | 15 ++
2 files changed, 267 insertions(+)
create mode 100644 Documentat
The eSPI interrupt controller acts as a SW IRQ number
decoder to correctly control/dispatch interrupts of
the eSPI peripheral, virtual wire, out-of-band, and
flash channels.
Signed-off-by: Chia-Wei, Wang
---
drivers/irqchip/Makefile | 2 +-
drivers/irqchip/irq-aspeed-espi-ic.c | 25
Add myself and Ryan Chen as maintainer of the Aspeed eSPI
driver and the associated eSPI interrupt controller.
Joel Stanley is also added as the reviewer.
Signed-off-by: Chia-Wei, Wang
---
MAINTAINERS | 14 ++
1 file changed, 14 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
i
On 29-12-20, 21:50, Zheng Yongjun wrote:
> Use kzalloc rather than kcalloc(1,...)
>
> The semantic patch that makes this change is as follows:
> (http://coccinelle.lip6.fr/)
>
> //
> @@
> @@
>
> - kcalloc(1,
> + kzalloc(
> ...)
> //
Applied, thanks
--
~Vinod
HeY Mark,
On 09-12-20, 13:34, Bard Liao wrote:
> sdw_update_slave_status will be invoked when a codec is attached,
> and the codec driver will initialize the codec with regmap functions
> while the codec device is pm_runtime suspended.
>
> regmap routines currently rely on regular SoundWire IO fu
This add binding and driver for TLMM block found in SM8350 SoC
Changes since v2:
- rename to qcom,sm8350-tlmm along with binding and driver structs
- fix some nits in binding pointer by Rob
Raghavendra Rao Ananta (1):
pinctrl: qcom: Add SM8350 pinctrl driver
Vinod Koul (1):
dt-bindings: pi
On Wed, Jan 06, 2021 at 09:50:00AM +0800, Hao Li wrote:
> After commit 77573fa310d9 ("fs: Kill DCACHE_DONTCACHE dentry even if
> DCACHE_REFERENCED is set"), changes to DAX policy will take effect
> as soon as all references to this file are gone.
>
> Update the documentation accordingly.
>
> Sign
On 2021/1/5 19:40, Marc Zyngier wrote:
> On 2021-01-05 09:13, Marc Zyngier wrote:
>> On 2021-01-04 08:16, Shenming Lu wrote:
>>> After pausing all vCPUs and devices capable of interrupting, in order
>>> to save the information of all interrupts, besides flushing the pending
>>> states in kvm’s vgic
Add device tree binding Documentation details for Qualcomm SM8350
pinctrl driver.
Signed-off-by: Vinod Koul
---
.../bindings/pinctrl/qcom,sm8350-tlmm.yaml| 149 ++
1 file changed, 149 insertions(+)
create mode 100644
Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlm
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: e71ba9452f0b5b2e8dc8aa5445198cd9214a6a62
commit: 68c5debcc06d6d24f15dbf978780fc5efc147d5e arm64: implement CPPC FFH
support using AMUs
date: 8 weeks ago
config: arm64-randconfig-s032-20210106 (attached as
From: Raghavendra Rao Ananta
This adds pincontrol driver for tlmm block found in SM8350 SoC
Signed-off-by: Raghavendra Rao Ananta
Signed-off-by: Jeevan Shriram
[vkoul: rebase and tidy up for upstream]
Signed-off-by: Vinod Koul
---
drivers/pinctrl/qcom/Kconfig |9 +
drivers/pinct
On Wed, Dec 30, 2020 at 05:24:34PM -0600, David Lechner wrote:
> On 12/25/20 6:15 PM, William Breathitt Gray wrote:
>
> > diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c
> > index a60aee1a1a29..6c058b93dc98 100644
> > --- a/drivers/counter/ti-eqep.c
> > +++ b/drivers/counter/ti-
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