Hi Miquel,
> > > >
> > > > If subpage write not available with hardware ECC, for example,
> > > > NAND chip options NAND_NO_SUBPAGE_WRITE be set in driver and
> > > > randomizer function is recommended for high-reliability.
> > > > Driver checks byte 167 of Vendor Blocks in ONFI parameter pa
On Wed, Aug 28, 2019 at 03:42:44PM -0600, shuah wrote:
> On 8/27/19 9:27 PM, Suwan Kim wrote:
> > There are bugs on vhci with usb 3.0 storage device. In USB, each SG
> > list entry buffer should be divisible by the bulk max packet size.
> > But with native SG support, this problem doesn't matter be
On Fri, Aug 30, 2019 at 7:52 AM Kees Cook wrote:
>
> On Tue, Jul 30, 2019 at 02:39:40PM +0800, Chuhong Yuan wrote:
> > I think with the help of Coccinelle script, all strncmp(str, const, len)
> > can be replaced and these problems will be eliminated. :)
>
> Hi! Just pinging this thread again. Any
On Fri, Aug 30, 2019 at 03:22:37PM +0300, Andy Shevchenko wrote:
> On Thu, Aug 29, 2019 at 01:10:34PM +0300, Sakari Ailus wrote:
> > The software_node_get_parent() returned a pointer to the parent swnode,
> > but did not take a reference to it, leading the caller to put a reference
> > that was not
On Fri, Aug 30, 2019 at 09:48:34 +, Peter Zijlstra wrote...
> On Thu, Aug 22, 2019 at 02:28:10PM +0100, Patrick Bellasi wrote:
>
>> diff --git a/kernel/sched/core.c b/kernel/sched/core.c
>> index 04fc161e4dbe..fc2dc86a2abe 100644
>> --- a/kernel/sched/core.c
>> +++ b/kernel/sched/core.c
>> @
On Fri, Aug 30, 2019 at 09:45:05 +, Peter Zijlstra wrote...
> On Thu, Aug 22, 2019 at 02:28:06PM +0100, Patrick Bellasi wrote:
>> +#define _POW10(exp) ((unsigned int)1e##exp)
>> +#define POW10(exp) _POW10(exp)
>
> What is this magic? You're forcing a float literal into an integer.
> Surely t
Hi all,
After merging the iommu tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
drivers/iommu/iommu.c: In function 'iommu_subsys_init':
drivers/iommu/iommu.c:123:38: error: implicit declaration of function
'sme_active'; did you mean 'cpu_active'? [-Werror=implicit-funct
Hi Peter,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[cannot apply to v5.3-rc6 next-20190830]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commit
On Sun, Sep 01, 2019 at 07:23:03PM +0200, Pavel Machek wrote:
> Hi!
>
> > The Greybus code has long been "stable" but was living in the
> > drivers/staging/ directory to see if there really was going to be
> > devices using this protocol over the long-term. With the success of
> > millions of pho
On 8/30/19 20:28, Stephen Boyd wrote:
> Quoting Bjorn Andersson (2019-08-30 09:45:20)
>> On Fri 30 Aug 09:01 PDT 2019, Stephen Boyd wrote:
>>
>>> Quoting Jorge Ramirez (2019-08-29 00:03:48)
On 2/23/19 17:52, Bjorn Andersson wrote:
> On Thu 07 Feb 03:17 PST 2019, Jorge Ramirez-Ortiz wrote:
On Sat, Aug 31, 2019 at 11:52:47AM -0700, Dan Williams wrote:
> The infrastructure to mock core libnvdimm routines for unit testing
> purposes is prone to bitrot relative to refactoring of that core.
> Arrange for the unit test core to be built when CONFIG_COMPILE_TEST=y.
> This does not result in
Hi all,
On Thu, 29 Aug 2019 15:31:16 +1000 Stephen Rothwell
wrote:
>
> After merging the keys tree, today's linux-next build (arm
> multi_v7_defconfig) failed like this:
>
>
> Caused by commit
>
> ef9cc255c953 ("usb: Add USB subsystem notifications")
>
> # CONFIG_USB_NOTIFICATIONS is not s
From: Jerin Jacob
Optimize modulo operation instruction generation by
using single MSUB instruction vs MUL followed by SUB
instruction scheme.
Signed-off-by: Jerin Jacob
---
arch/arm64/net/bpf_jit.h | 3 +++
arch/arm64/net/bpf_jit_comp.c | 6 ++
2 files changed, 5 insertions(+), 4 del
On Mon 02-09-19 13:34:54, 박상우 wrote:
> >On Fri 30-08-19 18:25:53, Sangwoo wrote:
> >> The highatomic migrate block can be increased to 1% of Total memory.
> >> And, this is for only highorder ( > 0 order). So, this block size is
> >> excepted during check watermark if allocation type isn't alloc_ha
On Sun, Sep 01, 2019 at 01:35:16PM -0700, Guenter Roeck wrote:
> > I belive the macros above are missing brackets.. Can you confirm the
> > below takes care of things? I'll add a patch if so
> >
>
> Good catch. Yes, that fixes the build problem.
I added this to the hmm tree to fix it:
>From 6a7
As per the schematic Monolithic Power Systems MP2161GJ-C499
supply a fixed output voltage of 5.0V. This supplies linked
to VDD_EE, HDMI_P5V0, USB_POWER, VCCK, VDDIO_AO1V8, VDDIO_AO3V3,
VDD3V3, DDR3_1V5 according to the schematics.
Cc: Martin Blumenstingl
Cc: Jerome Brunet
Cc: Neil Armstrong
Ack
Add missing linking regulator node to usb bus for power usb devices.
Cc: Martin Blumenstingl
Cc: Jerome Brunet
Cc: Neil Armstrong
Acked-by: Martin Blumenstingl
Signed-off-by: Anand Moon
---
Re-base on linux-next
Added Ack from Martin.
Changes from previous patch
[1] https://lore.kernel.org/p
usb_otg bus needs to get initialize from the u-boot to be configured
to used as power source to SBC or usb otg port will get configured
as host device. Right now this support is missing in the u-boot and
phy driver so to avoid power failed warning, we would disable this
feature until proper fix is
Some time ago I had tired to enable usb bus 1 for Odroid C2/C1
but it's look like some more work is needed to u-boot and
usb_phy driver to initialize this port.
Below patches tries to address the issue regarding usb bus 2 (4 port)
while disable the usb bus 1 on this board.
Previous patch
[0] http
-Golaszewski/regulator-add-and-use-a-helper-for-setting-supply-names/20190901-140224
config: nds32-allnoconfig (attached as .config)
compiler: nds32le-linux-gcc (GCC) 8.1.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
On Mon, 2 Sep 2019, at 13:42, Joel Stanley wrote:
> On Mon, 2 Sep 2019 at 03:58, Andrew Jeffery wrote:
> >
> > Resolves the following build error reported by the 0-day bot:
> >
> > ERROR: "of_platform_device_create"
> > [drivers/mmc/host/sdhci-of-aspeed.ko] undefined!
> >
> > SPARC does no
From: Heiher
The structure of event pools:
efd[1]: { efd[2] (EPOLLIN) }efd[0]: { efd[2] (EPOLLIN | EPOLLET) }
| |
+-+-+
|
v
On Sun, Sep 1, 2019 at 7:10 PM Randy Dunlap wrote:
>
> I guess we need a way to coerce that to call get_user_1(),
> such as a typecast. This _seems_ to work (i.e., call get_user_1()):
No, I oversimplified.
Try this slightly modified patch instead.
Linus
arch/microblaze/includ
Signed-off-by: Michael McCormick
---
drivers/rtc/rtc-pcf85063.c | 153 +
1 file changed, 153 insertions(+)
diff --git a/drivers/rtc/rtc-pcf85063.c b/drivers/rtc/rtc-pcf85063.c
index 1afa6d9fa9fb..f47d3a6b997d 100644
--- a/drivers/rtc/rtc-pcf85063.c
+++ b/drive
Some vendor drivers want an identifier for an mdev device that is
shorter than the UUID, due to length restrictions in the consumers of
that identifier.
Add a callback that allows a vendor driver to request an alias of a
specified length to be generated for an mdev device. If generated,
that alias
Expose the optional alias for an mdev device as a sysfs attribute.
This way, userspace tools such as udev may make use of the alias, for
example to create a netdevice name for the mdev.
Updated documentation for optional read only sysfs attribute.
Signed-off-by: Parav Pandit
---
Changelog:
v2->
Introduce an API mdev_alias() to provide access to optionally generated
alias.
Signed-off-by: Parav Pandit
---
drivers/vfio/mdev/mdev_core.c | 12
include/linux/mdev.h | 1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/vfio/mdev/mdev_core.c b/drivers/vfio/mdev/
To have consistent naming for the netdevice of a mdev and to have
consistent naming of the devlink port [1] of a mdev, which is formed using
phys_port_name of the devlink port, current UUID is not usable because
UUID is too long.
UUID in string format is 36-characters long and in binary 128-bit.
B
Mdev alias should be unique among all the mdevs, so that when such alias
is used by the mdev users to derive other objects, there is no
collision in a given system.
Signed-off-by: Parav Pandit
---
Changelog:
v2->v3:
- Changed strcmp() ==0 to !strcmp()
v1->v2:
- Moved alias NULL check at beginn
Provide a module parameter to set alias length to optionally generate
mdev alias.
Example to request mdev alias.
$ modprobe mtty alias_length=12
Make use of mtty_alias() API when alias_length module parameter is set.
Signed-off-by: Parav Pandit
---
Changelog:
v1->v2:
- Added mdev_alias() usage
On 2019/8/28 下午1:37, Tiwei Bie wrote:
Details about this can be found here:
https://lwn.net/Articles/750770/
What's new in this version
==
There are three choices based on the discussion [1] in RFC v2:
#1. We expose a VFIO device, so we can reuse the VFIO container/
On Mon, 2 Sep 2019 at 03:58, Andrew Jeffery wrote:
>
> Resolves the following build error reported by the 0-day bot:
>
> ERROR: "of_platform_device_create" [drivers/mmc/host/sdhci-of-aspeed.ko]
> undefined!
>
> SPARC does not set CONFIG_OF_ADDRESS so the symbol is missing. Guard the
> callsit
Sometimes, only the dev_id field of irqaction needs to be changed.
E.g. KVM VM with device passthru via VFIO may switch the interrupt
injection path between KVM irqfd and userspace eventfd. These two
paths share the same interrupt number and handler for the same msi
vector of a device, only with d
Hi all,
Today's linux-next merge of the sound-asoc tree got a conflict in:
Documentation/devicetree/bindings/sound/sun8i-a33-codec.txt
between commit:
aa95b4a960ab ("docs: fix a couple of new broken references")
from the jc_docs tree and commit:
8a99f76ac1a5 ("ASoC: dt-bindings: Convert
When userspace (e.g. qemu) triggers a switch between KVM
irqfd and userspace eventfd, only dev_id of irqaction
(i.e. the "trigger" in this patch's context) will be
changed, but a free-then-request-irq action is taken in
current code. And, interrupt affinity setting in VM will
also trigger a free-th
__free_irq()/__free_percpu_irq() need to return if called from IRQ
context because the interrupt handler loop runs with desc->lock dropped
and dev_id can be subject to load and store tearing. Also move WARNs
out of lock region and print out dev_id to help debugging.
Signed-off-by: Ben Luo
---
ke
Currently, VFIO takes a free-then-request-irq way to do interrupt
affinity setting and masking/unmasking for a VM with device passthru
via VFIO. Sometimes it only changes the cookie data of irqaction or even
changes nothing. The free-then-request-irq not only adds more latency,
but also increases t
Michael Ellerman writes:
> Michal Suchanek writes:
...
>> @@ -295,6 +279,12 @@ static inline int current_is_64bit(void)
>> }
>>
>> #else /* CONFIG_PPC64 */
>> +static int read_user_stack_slow(void __user *ptr, void *buf, int nb)
>> +{
>> +return 0;
>> +}
>> +#endif /* CONFIG_PPC64 */
>
>
Add a get_max_clock() handler to sdhci-of-aspeed to report f_max as the
maximum clock rate if it is set. This enables artificial limitation of
the bus speed via max-frequency in the devicetree for e.g. the AST2600
evaluation board where I was seeing errors at 200MHz.
Signed-off-by: Andrew Jeffery
The early-exit didn't seem to matter on the AST2500, but on the AST2600
the SD clock genuinely may not be running on entry to
aspeed_sdhci_set_clock(). Remove the early exit to ensure we always run
sdhci_enable_clk().
Signed-off-by: Andrew Jeffery
---
drivers/mmc/host/sdhci-of-aspeed.c | 3 ---
host->clock is already managed by sdhci_set_ios().
Suggested-by: Ulf Hansson
Signed-off-by: Andrew Jeffery
---
drivers/mmc/host/sdhci-of-aspeed.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/mmc/host/sdhci-of-aspeed.c
b/drivers/mmc/host/sdhci-of-aspeed.c
inde
Resolves the following build error reported by the 0-day bot:
ERROR: "of_platform_device_create" [drivers/mmc/host/sdhci-of-aspeed.ko]
undefined!
SPARC does not set CONFIG_OF_ADDRESS so the symbol is missing. Guard the
callsite to maintain build coverage for the rest of the driver.
Reported
Hello,
I've added a couple of patches since v1 of this series. The horizon has
broadened slightly with a fix for SPARC builds as well in patch 1/4. Ulf
suggested a minor cleanup on v1 with respect to handling of the current clock
value, so that's now patch 2/4. Patches 3/4 and 4/4 are as they were
> -Original Message-
> From: Z.q. Hou
> Sent: 2019年9月2日 11:52
> To: Xiaowei Bao ; robh...@kernel.org;
> mark.rutl...@arm.com; shawn...@kernel.org; Leo Li
> ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h. Lian
> ; Mingkai Hu ; Roy Zang
> ; jingooh...@gmail.com;
> gustavo.pimen...@synopsys
Add the PCIe compatible string for LS1028A
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
Reviewed-by: Rob Herring
---
v2:
- No change.
v3:
- No change.
v4:
- No change.
v5:
- No change.
v6:
- No change.
Documentation/devicetree/bindings/pci/layerscape-pci.txt | 1 +
1 file chang
Add support for the LS1028a PCIe controller.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
v2:
- No change.
v3:
- Reuse the ls2088 driver data structurt.
v4:
- No change.
v5:
- No change.
v6:
- No change.
drivers/pci/controller/dwc/pci-layerscape.c | 1 +
1 file changed, 1 in
LS1028a implements 2 PCIe 3.0 controllers.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
v2:
- Fix up the legacy INTx allocate failed issue.
v3:
- No change.
v4:
- Remove the num-lanes property.
v5:
- Add the num-viewport property.
v6:
- move num-viewport to 8.
arch/arm64/boo
Michal Suchanek writes:
> There are two almost identical copies for 32bit and 64bit.
>
> The function is used only in 32bit code which will be split out in next
> patch so consolidate to one function.
>
> Signed-off-by: Michal Suchanek
> Reviewed-by: Christophe Leroy
> ---
> new patch in v6
> -
Xiaowei,
> -Original Message-
> From: Xiaowei Bao
> Sent: 2019年9月2日 11:17
> To: robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org;
> Leo Li ; kis...@ti.com; lorenzo.pieral...@arm.com;
> M.h. Lian ; Mingkai Hu ;
> Roy Zang ; jingooh...@gmail.com;
> gustavo.pimen...@synopsys.com
Ice Lake microarchitecture inherits Cannon Lake, it has CC1/PC8/PC9/PC10
residency counters.
Update the list of Ice Lake PMU event counters from the snb_cstates[] list
of events to the cnl_cstates[] list of events, which keeps all previously
supported events and also adds the CORE_C1, PKG_C8, PKG_
Hi Christophe,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[cannot apply to v5.3-rc6 next-20190830]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits
Hi, Greg
On 2019/8/30 下午10:54, zhangfei wrote:
On 2019/8/28 下午11:22, Greg Kroah-Hartman wrote:
On Wed, Aug 28, 2019 at 09:27:56PM +0800, Zhangfei Gao wrote:
+struct uacce {
+ const char *drv_name;
+ const char *algs;
+ const char *api_ver;
+ unsigned int flags;
+ unsigned long
On Thu, May 16, 2019 at 3:35 AM syzbot
wrote:
>
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:3b0f31f2 genetlink: make policy common to family
> git tree: net-next
> console output: https://syzkaller.appspot.com/x/log.txt?x=12a319df20
> kernel config: https://syz
On Mon, 2019-08-26 at 15:52:13 UTC, Christophe Leroy wrote:
> Powerpc 601 is rather old powerpc which as some important
> limitations compared to other book3s/32 powerpcs:
> - No Timebase.
> - Common BATs for instruction and data.
> - No execution protection in segment registers.
> - No RI bit in M
mmits/Guido-G-nther/dt-bindings-display-bridge-Add-binding-for-NWL-mipi-dsi-host-controller/20190901-114958
config: i386-allmodconfig (attached as .config)
compiler: gcc-7 (Debian 7.4.0-11) 7.4.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
If you fix the
On Tue, 2019-08-20 at 02:13:12 UTC, Thiago Jung Bauermann wrote:
> Introduce CONFIG_PPC_SVM to control support for secure guests and include
> Ultravisor-related helpers when it is selected
>
> Signed-off-by: Thiago Jung Bauermann
Patch 2-14 & 16 applied to powerpc next, thanks.
https://git.ker
On Wed, 2019-08-21 at 20:00:34 UTC, Christophe Leroy wrote:
> The code which fixups the DAR on TLB errors for dbcX instructions
> has a self-modifying code alternative that has never been used.
>
> Drop it.
>
> Signed-off-by: Christophe Leroy
Applied to powerpc next, thanks.
https://git.kernel
On Wed, 2019-08-21 at 10:20:51 UTC, Christophe Leroy wrote:
> Today, the STACK_END_MAGIC is set on init_stack in start_kernel().
>
> To avoid a false 'Thread overran stack, or stack corrupted' message
> on early Oopses, setup STACK_END_MAGIC as soon as possible.
>
> Signed-off-by: Christophe Lero
On Mon, 2019-08-26 at 11:10:23 UTC, Christophe Leroy wrote:
> Prior to commit 1bd98d7fbaf5 ("ppc64: Update BUG handling based on
> ppc32"), BUG() family was using BUG_ILLEGAL_INSTRUCTION which
> was an invalid instruction opcode to trap into program check
> exception.
>
> That commit converted the
Move the function of getting MSI capability to the front of init
function, because the init function of the EP platform driver will use
the return value by the function of getting MSI capability.
Signed-off-by: Xiaowei Bao
Reviewed-by: Andrew Murray
---
v2:
- No change.
v3:
- No change.
driv
Add PCIe EP mode support for ls1088a and ls2088a, there are some
difference between LS1 and LS2 platform, so refactor the code of
the EP driver.
Signed-off-by: Xiaowei Bao
---
v2:
- This is a new patch for supporting the ls1088a and ls2088a platform.
v3:
- Adjust the some struct assignment ord
Fix some format issue of the code in EP driver.
Signed-off-by: Xiaowei Bao
Reviewed-by: Andrew Murray
---
v2:
- No change.
v3:
- No change.
drivers/pci/controller/dwc/pci-layerscape-ep.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-la
dw_pcie_ep_raise_msix_irq was never called in the exisitng driver
before, because the ls1046a platform don't support the MSIX feature
and msix_capable was always set to false.
Now that add the ls1088a platform with MSIX support, but the existing
dw_pcie_ep_raise_msix_irq doesn't work, so use the do
Add LS1088a in pci_device_id table so that pci-epf-test can be used
for testing PCIe EP in LS1088a.
Signed-off-by: Xiaowei Bao
---
v2:
- No change.
v3:
- No change.
drivers/misc/pci_endpoint_test.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/misc/pci_endpoint_test.c b/drivers
Add PCIe EP node for ls1088a to support EP mode.
Signed-off-by: Xiaowei Bao
---
v2:
- Remove the pf-offset proparty.
v3:
- No change.
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 ++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/f
Add compatible strings for ls1088a and ls2088a.
Signed-off-by: Xiaowei Bao
---
v2:
- No change.
v3:
- Use one valid combination of compatible strings.
Documentation/devicetree/bindings/pci/layerscape-pci.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/
The different PCIe controller in one board may be have different
capability of MSI or MSIX, so change the way of getting the MSI
capability, make it more flexible.
Signed-off-by: Xiaowei Bao
---
v2:
- Remove the repeated assignment code.
v3:
- Use ep_func msi_cap and msix_cap to decide the msi_
Each PF of EP device should have it's own MSI or MSIX capabitily
struct, so create a dw_pcie_ep_func struct and remover the msi_cap
and msix_cap to this struce, and manage the PFs with a list.
Signed-off-by: Xiaowei Bao
---
v1:
- This is a new patch, to fix the issue of MSI and MSIX CAP way of
Add the doorbell mode of MSI-X in EP mode.
Signed-off-by: Xiaowei Bao
Reviewed-by: Andrew Murray
---
v2:
- Remove the macro of no used.
v3:
- No change.
drivers/pci/controller/dwc/pcie-designware-ep.c | 14 ++
drivers/pci/controller/dwc/pcie-designware.h| 12
2 f
*** BLURB HERE ***
Xiaowei Bao (11):
PCI: designware-ep: Add multiple PFs support for DWC
PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode
PCI: designware-ep: Move the function of getting MSI capability
forward
PCI: designware-ep: Modify MSI and MSIX CAP way of finding
d
Add multiple PFs support for DWC, different PF have different config space
we use pf-offset property which get from the DTS to access the different pF
config space.
Signed-off-by: Xiaowei Bao
---
v2:
- Remove duplicate redundant code.
- Reimplement the PF config space access way.
v3:
- Integra
On Sun, Sep 1, 2019 at 4:27 PM syzbot
wrote:
>
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:dd7078f0 enetc: Add missing call to 'pci_free_irq_vectors(..
> git tree: net
> console output: https://syzkaller.appspot.com/x/log.txt?x=115fe0fa60
> kernel config: https
On Sun, Sep 1, 2019 at 3:48 PM syzbot
wrote:
>
> syzbot has found a reproducer for the following crash on:
>
> HEAD commit:38320f69 Merge branch 'Minor-cleanup-in-devlink'
> git tree: net-next
> console output: https://syzkaller.appspot.com/x/log.txt?x=13d7435660
> kernel config: ht
The local variable @priv is set but not used, can be removed
Signed-off-by: Chunfeng Yun
---
drivers/phy/tegra/xusb-tegra210.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/phy/tegra/xusb-tegra210.c
b/drivers/phy/tegra/xusb-tegra210.c
index 0c0df6897a3b..bc71c897298a 100644
---
Eric Dumazet [mailto:eric.duma...@gmail.com]
> Sent: Friday, August 30, 2019 12:32 AM
> To: Hayes Wang; net...@vger.kernel.org
> Cc: nic_swsd; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH net-next] r8152: fix accessing skb after napi_gro_receive
>
> On 8/19/19 5:15 AM, Hayes Wang wrote:
> >
On Thu, 2019-08-29 at 15:50:20 UTC, "Maxiwell S. Garcia" wrote:
> From: Claudio Carvalho
>
> Add the PowerPC name and the PPC_ELFNOTE_CAPABILITIES type in the
> kernel binary ELF note. This type is a bitmap that can be used to
> advertise kernel capabilities to userland.
>
> This patch also defi
Hi Johan,
Johan Hovold 於 2019/8/28 下午 11:02 寫道:
On Thu, Jun 06, 2019 at 10:54:13AM +0800, Ji-Ze Hong (Peter Hong) wrote:
The Fintek F81534A series is contains 1 HUB / 1 GPIO device / n UARTs,
but the UART is default disable and need enabled by GPIO device(2c42/16F8).
When F81534A plug to host,
Michal Suchánek writes:
> On Fri, 30 Aug 2019 20:57:57 +0200
> Michal Suchanek wrote:
>
>> Building callchain.c with !COMPAT proved quite ugly with all the
>> defines. Splitting out the 32bit and 64bit parts looks better.
>>
>
> BTW the powerpc callchain.c does not match any of the patterns of P
Update NC-SI command handler (both standard and OEM) to take into
account of payload paddings in allocating skb (in case of payload
size is not 32-bit aligned).
The checksum field follows payload field, without taking payload
padding into account can cause checksum being truncated, leading to
drop
On 9/1/19 12:10 PM, Randy Dunlap wrote:
> On 9/1/19 10:31 AM, Linus Torvalds wrote:
>> On Sun, Sep 1, 2019 at 10:07 AM Linus Torvalds
>> wrote:
>>>
>>> I guess I'll apply it. I'm not sure why you _care_ about microblaze, but ...
>
> It was just a response to the 0day build bot reporting build err
On 19/8/30 19:16, Colin King wrote:
> From: Colin Ian King
>
> At the end of cfs2_inode_lock_tracker tmp_oh is true because an
s/cfs2_inode_lock_tracker/ocfs2_inode_lock_tracker/
BTW, could you please correct the following description of this
function as well?
"return == -1 if this lock attem
Michal Suchanek writes:
> On bigendian ppc64 it is common to have 32bit legacy binaries but much
> less so on littleendian.
I think the toolchain people will tell you that there is no 32-bit
little endian ABI defined at all, if anything works it's by accident.
So I think we should not make this
"Alastair D'Silva" writes:
> On Wed, 2019-08-21 at 22:27 +0200, Christophe Leroy wrote:
>>
>> Le 20/08/2019 à 06:36, Alastair D'Silva a écrit :
>> > On Fri, 2019-08-16 at 15:52 +, Christophe Leroy wrote:
>>
>> [...]
>>
>> >
>> > Thanks Christophe,
>> >
>> > I'm trying a somewhat different
Stephen Rothwell writes:
> Hi all,
>
> Today's linux-next merge of the powerpc tree got a conflict in:
>
> arch/Kconfig
>
> between commit:
>
> 5cf896fb6be3 ("arm64: Add support for relocating the kernel with RELR
> relocations")
>
> from the arm64 tree and commit:
>
> 0c9c1d563975 ("x86, s
Use devm_reset_controller_register to get rid
of manual unregistration.
Signed-off-by: Chuhong Yuan
---
Changes in v2:
- Remove not needed err_fs.
drivers/usb/chipidea/ci_hdrc_msm.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c
Hi Martin,
On Mon, 2 Sep 2019 at 03:23, Martin Blumenstingl
wrote:
>
> Hi Anand,
>
> On Sun, Sep 1, 2019 at 3:58 PM Anand Moon wrote:
> >
> > Hi Martin,
> >
> > Thanks for your review comments.
> >
> > Their have been some revision changes in S905 Odroid Schematics.
> > [0] https://dn.odroid.com
On Fri, Aug 30, 2019 at 09:35:57PM +0200, Borislav Petkov wrote:
> On Fri, Aug 30, 2019 at 11:08:56PM +0800, Philip Li wrote:
> > hi Boris, for the build status notification, we currently send to below
> > address, is it still valid? If not, can you suggest one for us?
>
> Sure, here's an update p
On 2019/8/31 23:02, Eric Biggers wrote:
> On Sat, Aug 31, 2019 at 06:32:28PM +0800, Chao Yu wrote:
>> Hi,
>>
>> Is this change not necessary? A month has passed...
>>
>> Thanks,
>>
>> On 2019/8/4 17:56, Chao Yu wrote:
>>> From: Chao Yu
>>>
>>> When getting fscrypto policy via EXT4_IOC_GET_ENCRYPTI
Move ADIS16240 driver from staging to mainline.
The ADIS16240 is a fully integrated digital shock detection
and recorder system.
Signed-off-by: Rodrigo Ribeiro Carvalho
---
drivers/iio/accel/Kconfig | 12 +
drivers/iio/accel/Makefile| 1 +
drivers/iio/accel/adis16240.
This patch add device tree binding documentation for ADIS16240.
Signed-off-by: Rodrigo Ribeiro Carvalho
---
I have doubt about what maintainer I may to put in that documentation. I
put Alexandru as maintainer because he reviewed my last patch on this
driver, so I think that he is a good candidate
Hi all,
Today's linux-next merge of the afs tree got conflicts in:
include/trace/events/rxrpc.h
net/rxrpc/ar-internal.h
net/rxrpc/call_object.c
net/rxrpc/conn_client.c
net/rxrpc/input.c
net/rxrpc/recvmsg.c
net/rxrpc/skbuff.c
between various commits from the net tree and similar com
On Tue, 2019-08-27 at 09:13 +0200, David Hildenbrand wrote:
> On 27.08.19 08:39, Alastair D'Silva wrote:
> > On Tue, 2019-08-27 at 08:28 +0200, Michal Hocko wrote:
> > > On Tue 27-08-19 15:20:46, Alastair D'Silva wrote:
> > > > From: Alastair D'Silva
> > > >
> > > > It is possible for firmware to
Hi all,
Today's linux-next merge of the powerpc tree got a conflict in:
arch/Kconfig
between commit:
5cf896fb6be3 ("arm64: Add support for relocating the kernel with RELR
relocations")
from the arm64 tree and commit:
0c9c1d563975 ("x86, s390: Move ARCH_HAS_MEM_ENCRYPT definition to
ar
Hi all,
In commit
b19aca4eb2d2 ("power: supply: sbs-battery: only return health when battery
present")
Fixes tag
Fixes: 76b16f4cdfb8 ("power: supply: sbs-battery: don't assume
has these problem(s):
- Subject has leading but no trailing parentheses
- Subject has leading but no trailin
Hello,
syzbot found the following crash on:
HEAD commit:dd7078f0 enetc: Add missing call to 'pci_free_irq_vectors(..
git tree: net
console output: https://syzkaller.appspot.com/x/log.txt?x=115fe0fa60
kernel config: https://syzkaller.appspot.com/x/.config?x=2a6a2b9826fdadf9
dashboa
On Mon, 02 Sep 2019 08:43:29 +1000, Dave Chinner said:
> I don't know the details of the exfat spec or the code to know what
> the best approach is. I've worked fairly closely with Christoph for
> more than a decade - you need to think about what he says rather
> than /how he says it/ because ther
On 8/9/19 4:41 AM, Julia Lawall wrote:
From: kbuild test robot
Use devm_platform_ioremap_resource helper which wraps
platform_get_resource() and devm_ioremap_resource() together.
Generated by: scripts/coccinelle/api/devm_platform_ioremap_resource.cocci
Fixes: 78958c294246 ("counter: new T
This documents device tree binding for the Texas Instruments Enhanced
Quadrature Encoder Pulse (eQEP) Module found in various TI SoCs.
Signed-off-by: David Lechner
---
v3 changes:
- fixed style issues
- fixed generic node name
- (was suggested to drop descriptions since there is only one interru
The TI PWMSS driver is a simple bus driver for providing power
power management for the PWM peripherals on TI AM33xx SoCs, namely
eCAP, eHRPWM and eQEP. The eQEP is a counter rather than a PWM, so
it does not make sense to have the bus driver in the PWM subsystem
since the PWMSS is not exclusive to
This series adds device tree bindings and a new counter driver for the Texas
Instruments Enhanced Quadrature Encoder Pulse (eQEP).
As mentioned in one of the commit messages, to start with, the driver only
supports reading the current counter value and setting the min/max values.
Other features ca
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