On 23-08-19, 00:37, Srinivas Kandagatla wrote:
> This patch adds bindings for Soundwire Slave devices that includes how
> SoundWire enumeration address and Link ID are used to represented in
> SoundWire slave device tree nodes.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> .../soundwire/soundwi
On 23/08/2019 00:26, Kevin Hilman wrote:
> Neil Armstrong writes:
>
>> This is the first set of DT fixes following the first YAML bindings
>> conversion
>> at [1], [2] and [3].
>>
>> After this set of fixes, the remaining errors are :
>> meson-axg-s400.dt.yaml: sound: 'clocks' is a dependency of
On Tue, Aug 13, 2019 at 4:46 PM Jordan Crouse wrote:
> Now that CONFIG_DRM_MSM is no longer default 'y' add it as a module to all
> ARCH_QCOM enabled defconfigs to restore the previous expected build
> behavior.
>
> Signed-off-by: Jordan Crouse
Reviewed-by: Linus Walleij
I suppose Andy will p
On 8/14/2019 11:49 PM, Stephen Boyd wrote:
Quoting Maulik Shah (2019-08-13 01:24:38)
Resource State Coordinator (RSC) is responsible for powering off/lowering
the requirements from CPU subsystem for the associated hardware like buses,
clocks, and regulators when all CPUs and cluster is powered
On 8/14/2019 11:55 PM, Stephen Boyd wrote:
Quoting Maulik Shah (2019-08-13 01:24:42)
diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c
index e278fc11fe5c..bd8e9f1a43b4 100644
--- a/drivers/soc/qcom/rpmh-rsc.c
+++ b/drivers/soc/qcom/rpmh-rsc.c
@@ -498,6 +498,32 @@ static in
On 22-08-19, 22:54, YueHaibing wrote:
> If CONFIG_ACPI is not set, gcc warning this:
>
> drivers/soundwire/slave.c:16:12: warning:
> 'sdw_slave_add' defined but not used [-Wunused-function]
>
> Now all code in slave.c is only used on ACPI enabled,
> so compiles it while CONFIG_ACPI is set.
Sorr
Add a new optional clock xhci_ck
Signed-off-by: Chunfeng Yun
---
v2 changes:
1. add the new clock at the end, suggested by Rob
---
Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindi
Some SoCs may have an optional clock xhci_ck (125M or 200M), it
usually uses the same PLL as sys_ck, so support it.
Signed-off-by: Chunfeng Yun
---
v2 no changes
---
drivers/usb/host/xhci-mtk.c | 13 +
drivers/usb/host/xhci-mtk.h | 1 +
2 files changed, 14 insertions(+)
diff --git
Add support for eMMC PHY on Intel's Lightning Mountain SoC.
changes in v5:
- many thanks to Andy's for giving me many hints regarding code optimization!
- added Andy's Reviewed-by to the emm-phy patch
- replace magic.no '1' -> macro
chnages in v4:
- As per Andy's review comments,the fo
From: Ramuthevar Vadivel Murugan
Add support for eMMC PHY on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Andy Shevchenko
---
drivers/phy/Kconfig| 1 +
drivers/phy/Makefile | 1 +
drivers/phy/intel/Kconfig |
On Thu, 2019-08-22 at 15:36 +0200, Alexandre Belloni wrote:
> On 22/08/2019 21:26:01+0800, Ran Bi wrote:
> > On Thu, 2019-08-22 at 14:46 +0200, Alexandre Belloni wrote:
> > > On 22/08/2019 20:34:14+0800, Ran Bi wrote:
> > > > > > + /* RTC need POWERKEY1/2 match, then goto normal work mode */
> >
On 21-08-19, 13:58, Pierre-Louis Bossart wrote:
> This patchset enables debugfs support and corrects all the feedback
> provided on an earlier RFC ('soundwire: updates for 5.4')
>
> There is one remaining hard-coded value in intel.c that will need to
> be fixed in a follow-up patchset not specific
Hi,
> > +Required properties:
> > +- compatible : Should be "mediatek,mt2712-rtc" : for MT2712 SoC
> > +- reg : Specifies base physical address and size of the
> > registers;
> > +- interrupts : Should contain the interrupt for RTC alarm;
>
> No clocks for
Add reset hook for sdm845 based platforms to turn off
the wait-for-safe sequence.
Understanding how wait-for-safe logic affects USB and UFS performance
on MTP845 and DB845 boards:
Qcom's implementation of arm,mmu-500 adds a WAIT-FOR-SAFE logic
to address under-performance issues in real-time clie
There are scnenarios where drivers are required to make a
scm call in atomic context, such as in one of the qcom's
arm-smmu-500 errata [1].
[1] ("https://source.codeaurora.org/quic/la/kernel/msm-4.9/
tree/drivers/iommu/arm-smmu.c?h=msm-4.9#n4842")
Signed-off-by: Vivek Gautam
Reviewed-by: B
Previous version of the patches are at [1]:
Qcom's implementation of smmu-500 on sdm845 adds a hardware logic called
wait-for-safe. This logic helps in meeting the invalidation requirements
from 'real-time clients', such as display and camera. This wait-for-safe
logic ensures that the invalidation
Qcom's smmu-500 needs to toggle wait-for-safe sequence to
handle TLB invalidation sync's.
Few firmwares allow doing that through SCM interface.
Add API to toggle wait for safe from firmware through a
SCM call.
Signed-off-by: Vivek Gautam
Reviewed-by: Bjorn Andersson
---
drivers/firmware/qcom_sc
As pointed out in https://kernelnewbies.org/KernelJanitors/Todo
this patch replaces the outdated macro of DPRINTK for pr_debug()
To: Dominik Brodowski
To: Thomas Gleixner
To: Greg Kroah-Hartman
To: Adam Zerella
To: linux-kernel@vger.kernel.org
Signed-off-by: Adam Zerella
---
drivers/pcmcia/i
On Fri, Aug 23, 2019 at 02:42:48AM +0200, Stefan Lippers-Hollmann wrote:
Hi
On 2019-08-22, Greg KH wrote:
On Fri, Aug 23, 2019 at 12:05:27AM +0200, Stefan Lippers-Hollmann wrote:
> On 2019-08-22, Greg KH wrote:
> > On Thu, Aug 22, 2019 at 01:05:56PM -0400, Sasha Levin wrote:
[...]
> It might
Adding "rng-seed" to dtb. It's fine to add this property if original
fdt doesn't contain it. Since original seed will be wiped after
read, so use a default size 128 bytes here.
Signed-off-by: Hsin-Yi Wang
Reviewed-by: Stephen Boyd
---
No change since v7
---
arch/arm64/kernel/machine_kexec_file.
Introducing a chosen node, rng-seed, which is an entropy that can be
passed to kernel called very early to increase initial device
randomness. Bootloader should provide this entropy and the value is
read from /chosen/rng-seed in DT.
Obtain of_fdt_crc32 for CRC check after early_init_dt_scan_nodes(
Currently in arm64, FDT is mapped to RO before it's passed to
early_init_dt_scan(). However, there might be some codes
(eg. commit "fdt: add support for rng-seed") that need to modify FDT
during init. Map FDT to RO after early fixups are done.
Signed-off-by: Hsin-Yi Wang
Reviewed-by: Stephen Boyd
Introducing a chosen node, rng-seed, which is an entropy that can be
passed to kernel called very early to increase initial device
randomness. This can be used for adding sufficient initial entropy
for stack canary. Especially architectures that lack per-stack canary.
Hsin-Yi Wang (3):
arm64: ma
This patch set add perf callchain(FP/DWARF) support for RISC-V.
It comes from the csky version callchain support with some
slight modifications. The patchset base on Linux 5.3.
Changes since v4:
- Add missing PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET
verified with extra CFLAGS(-Wall -Werror)
This patch implements the perf registers sampling and validation API
for riscv arch. The valid registers and their register ID are defined in
perf_regs.h. Perf tool can backtrace in userspace with unwind library
and the registers/user stack dump support.
Signed-off-by: Mao Han
Cc: Paul Walmsley
This patch add support for DWARF register mappings and libdw registers
initialization, which is used by perf callchain analyzing when
--call-graph=dwarf is given.
Signed-off-by: Mao Han
Cc: Paul Walmsley
Cc: Greentime Hu
Cc: Palmer Dabbelt
Cc: linux-riscv
Cc: Christoph Hellwig
Cc: Guo Ren
-
This patch add support for perf callchain sampling on riscv platform.
The return address of leaf function is retrieved from pt_regs as
it is not saved in the outmost frame.
Signed-off-by: Mao Han
Cc: Paul Walmsley
Cc: Greentime Hu
Cc: Palmer Dabbelt
Cc: linux-riscv
Cc: Christoph Hellwig
Cc:
From: Saeed Mahameed
Date: Fri, 23 Aug 2019 05:29:48 +
> On Thu, 2019-08-22 at 15:39 -0700, David Miller wrote:
>> From: Haiyang Zhang
>> Date: Thu, 22 Aug 2019 22:37:13 +
>>
>> > The v5 is pretty much the same as v4, except Eran had a fix to
>> patch #3 in response to
>> > Leon Romanov
On 2019-08-22 19:32, William Tu wrote:
On Thu, Aug 22, 2019 at 10:21 AM Alexander Duyck
wrote:
On Thu, Aug 22, 2019 at 10:12 AM Ilya Maximets wrote:
Tx code doesn't clear the descriptors' status after cleaning.
So, if the budget is larger than number of used elems in a ring, some
descriptor
On 2019-08-22 00:12, Vinod Koul wrote:
Add the regulators found in the mtp platform. This platform consists of
pmic PM8150, PM8150L and PM8009.
Signed-off-by: Vinod Koul
Reviewed-by: Niklas Cassel
---
arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 324
1 file changed, 324
On 23.08.2019 01:15, David Miller wrote:
> From: Marco Hartmann
> Date: Wed, 21 Aug 2019 11:00:46 +
>
>> Commit 34786005eca3 ("net: phy: prevent PHYs w/o Clause 22 regs from calling
>> genphy_config_aneg") introduced a check that aborts phy_config_aneg()
>> if the phy is a C45 phy.
>> This ca
On 22.08.2019 16:55, James Clark wrote:
> Running 'perf test' with zstd compression linked will hang at the test
> 'Zstd perf.data compression/decompression' because /dev/random blocks
> reads until there is enough entropy. This means that the test will
> appear to never complete unless the mouse
On (08/21/19 07:46), John Ogness wrote:
[..]
> The labels are necessary for the technical documentation of the
> barriers. And, after spending much time in this, I find them very
> useful. But I agree that there needs to be a better way to assign label
> names.
[..]
> > Where dp stands for descript
On Thu, 2019-08-22 at 15:39 -0700, David Miller wrote:
> From: Haiyang Zhang
> Date: Thu, 22 Aug 2019 22:37:13 +
>
> > The v5 is pretty much the same as v4, except Eran had a fix to
> patch #3 in response to
> > Leon Romanovsky .
>
> Well you now have to send me a patch relative to v4 in ord
Add YAML schemas for the reset controller on Intel
Lightening Mountain (LGM) SoC.
Signed-off-by: Dilip Kota
---
Changes on v2:
Address review comments
Update the compatible property definition
Add description for reset-cells
Add 'additionalProperties: false' property
Add driver for the reset controller present on Intel
Lightening Mountain (LGM) SoC for performing reset
management of the devices present on the SoC. Driver also
registers a reset handler to peform the entire device reset.
Signed-off-by: Dilip Kota
---
Changes on v2:
No changes
drivers/
On Thu, Aug 22, 2019 at 01:02:05PM -0700, 'Nick Desaulniers' via Clang Built
Linux wrote:
> On Thu, Aug 22, 2019 at 11:30 AM Nathan Huckleberry wrote:
> >
> > The stackframe setup when compiled with clang is different.
> > Since the stack unwinder expects the gcc stackframe setup it
> > fails to
As 4k pages check was removed from cpa [1], set_kernel_text_rw() leads to
split_large_page() for all kernel text pages. This means a single kprobe
will put all kernel text in 4k pages:
root@ ~# grep 8100- /sys/kernel/debug/page_tables/kernel
0x8100-0x8240 20
Hi Rob,
On 8/23/2019 1:54 AM, Rob Herring wrote:
On Thu, Aug 22, 2019 at 2:32 AM Dilip Kota wrote:
Add YAML schemas for the reset controller on Intel
Lightening Mountain (LGM) SoC.
Signed-off-by: Dilip Kota
---
.../bindings/reset/intel,syscon-reset.yaml | 50 ++
Hi Vignesh,
On 22/8/2019 5:03 PM, Vignesh Raghavendra wrote:
Hi,
On 19/08/19 5:24 PM, Ramuthevar, Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
On Intel Lightening Mountain(LGM) SoCs QSPI controller do not use
s/Lightening/Lightning
Thank you so much for the review comments and
On Fri, 2019-07-26 at 22:18 +0800, YueHaibing wrote:
> There expect the 'static' keyword to come first in a
> declaration, and we get a warning for this with "make W=1":
>
> drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c:427:1: warning:
> 'static' is not at beginning of declaration [-Wold-styl
> On Thu, 2019-08-22 at 06:43 -0400, Pankaj Gupta wrote:
> > > This series provides an asynchronous means of reporting to a hypervisor
> > > that a guest page is no longer in use and can have the data associated
> > > with it dropped. To do this I have implemented functionality that allows
> > >
Hi Dmitry
On 2019/08/17 2:24, Dmitry Torokhov wrote:
On Fri, Aug 16, 2019 at 05:34:58PM +0900, Jiada Wang wrote:
From: Kautuk Consul
The upstream Atmel mXT driver implementation seems to handle the
T19 GPIO/PWM object as a key pad. Keys can be defined in the
device tree ("linux,gpio-keymap")
On Thu, 2019-08-01 at 17:44 +0100, Colin King wrote:
> From: Colin Ian King
>
> The variable bufsz is being initialized with a value that is never
> read and it is being updated later with a new value. The
> initialization is redundant and can be removed.
>
> Addresses-Coverity: ("Unused value")
On Wed, 2019-07-24 at 19:27 +0800, Chuhong Yuan wrote:
> Instead of using to_pci_dev + pci_get_drvdata,
> use dev_get_drvdata to make code simpler.
>
> Signed-off-by: Chuhong Yuan
> ---
This patch is not relevant anymore because we have removed all
D0i3/runtime PM code.
Thanks anyway!
--
Cheer
On 8/23/2019 1:43 AM, Haiyang Zhang wrote:
>
>
>> -Original Message-
>> From: David Miller
>> Sent: Thursday, August 22, 2019 3:39 PM
>> To: Haiyang Zhang
>> Cc: sas...@kernel.org; sae...@mellanox.com; l...@kernel.org;
>> era...@mellanox.com; lorenzo.pieral...@arm.com; bhelg...@google
On Fri, 2019-08-23 at 08:11 +0530, Kishon Vijay Abraham I wrote:
>
> On 22/07/19 12:53 PM, Neil Armstrong wrote:
> > On 10/07/2019 07:04, Joe Perches wrote:
> > > Arguments are supposed to be ordered high then low.
> > >
> > > Signed-off-by: Joe Perches
> > > ---
> > > drivers/phy/amlogic/phy-m
On Fri, Aug 23, 2019 at 01:20:37PM +0900, boojin.kim wrote:
>
> If yes, I think the following API needs to be added to skcipher:
> - _set(): BIO submitter (dm-crypt, f2fs, ext4) sets cipher to BIO.
> - _mergeable(): Block layer checks if two BIOs have the same cipher.
> - _get(): Storage driver g
On Wed, Aug 21, 2019 at 17:19:41PM +0900, Herbert Xu wrote:
> On Wed, Aug 21, 2019 at 04:57:41PM +0900, boojin.kim wrote:
> >
> > Can you tell me which patch you mentioned? Is this?
> > https://patches.linaro.org/project/linux-crypto/list/?series=22762
> >
>
> Yes this is the one.
>
> Cheers,
I l
> -Original Message-
> From: Kishon Vijay Abraham I
> Sent: 2019年8月23日 11:40
> To: Xiaowei Bao ; bhelg...@google.com;
> robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo Li
> ; lorenzo.pieral...@arm.co
> ; a...@arndb.de; gre...@linuxfoundation.org;
> M.h. Lian ; Mingkai
syzbot found that a thread can stall for minutes inside read_mem() or
write_mem() after that thread was killed by SIGKILL [1]. Reading 2GB at
one read() is legal, but delaying termination of killed thread for minutes
is bad. Let's insert cond_resched() and SIGKILL check into iteration loop
of readi
From: Rob Clark
I'm sure there is plenty more to remove.. this is just some of the ones
I noticed.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 19 ---
.../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 3 ---
.../drm/msm/disp/dpu1/dpu_encoder_phys
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 3 +--
3 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/
On Thu, 2019-08-22 at 19:52 -0700, Sagi Grimberg wrote:
> > > I'll fix it. Note that I'm going to take it out of the tree soon
> > > because it will have conflicts with Jens for-5.4/block, so we
> > > will send it to Jens after the initial merge window, after he
> > > rebases off of Linus.
> >
> >
While tracing a program that calls isatty(3), I noticed that strace reported
TCGETS for the request argument of the underlying ioctl(2) syscall while perf
trace reported TCSETS. strace is corrrect. The bug in perf was due to the tty
ioctl beauty table starting at 0x5400 rather than 0x5401.
Fixes:
Some pmics don't need backup interrupt settings, so we change to use
pm notifier for the pmics which are necessary to store settings.
Acked-for-mfd-by: Lee Jones
Signed-off-by: Hsin-Hsiung Wang
---
drivers/mfd/mt6397-core.c | 89 +
drivers/mfd/mt639
This patchset including refactoring interrupt add support to MT6358 PMIC.
MT6358 is the primary PMIC for MT8183 platform.
changes since v4:
- fix some comments for mfd driver.
- fix some coding style issues for regulator driver.
- merge the same voltage tables and index tables for regulator driver
refine some variable name for more readable
Acked-for-mfd-by: Lee Jones
Signed-off-by: Hsin-Hsiung Wang
---
drivers/mfd/mt6397-core.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
index 337bccc..c070862
add dt-binding document for MediaTek MT6358 PMIC
Reviewed-by: Rob Herring
Signed-off-by: Hsin-Hsiung Wang
---
.../bindings/regulator/mt6358-regulator.txt| 358 +
1 file changed, 358 insertions(+)
create mode 100644
Documentation/devicetree/bindings/regulator/mt6358
From: Ran Bi
Alarm registers high byte was reserved for other functions.
This add mask in alarm registers operation functions.
This also fix error condition in interrupt handler.
Fixes: fc2979118f3f ("rtc: mediatek: Add MT6397 RTC driver")
Acked-by: Alexandre Belloni
Signed-off-by: Ran Bi
---
The MT6358 is a regulator found on boards based on MediaTek MT8183 and
probably other SoCs. It is a so called pmic and connects as a slave to
SoC using SPI, wrapped inside the pmic-wrapper.
Signed-off-by: Hsin-Hsiung Wang
---
drivers/regulator/Kconfig | 9 +
drivers/regulator/
In order to support different types of irq design, we decide to add
separate irq drivers for different design and keep mt6397 mfd core
simple and reusable to all generations of PMICs so far.
Acked-for-mfd-by: Lee Jones
Signed-off-by: Hsin-Hsiung Wang
---
drivers/mfd/Makefile| 3 +-
This adds compatible for the MediaTek MT6358 PMIC.
Acked-for-mfd-by: Lee Jones
Reviewed-by: Rob Herring
Signed-off-by: Hsin-Hsiung Wang
---
Documentation/devicetree/bindings/mfd/mt6397.txt | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/
This adds support for the MediaTek MT6358 PMIC. This is a
multifunction device with the following sub modules:
- Regulator
- RTC
- Codec
- Interrupt
It is interfaced to the host controller using SPI interface
by a proprietary hardware called PMIC wrapper or pwrap.
MT6358 MFD is a child device of
From: Ran Bi
This add support for the MediaTek MT6358 RTC. Driver using
compatible data to store different RTC_WRTGR address offset.
Signed-off-by: Ran Bi
---
drivers/rtc/rtc-mt6397.c | 38 ++
1 file changed, 30 insertions(+), 8 deletions(-)
diff --git a/dr
add PMIC MT6358 related nodes which is for MT8183 platform
Signed-off-by: Hsin-Hsiung Wang
---
arch/arm64/boot/dts/mediatek/mt6358.dtsi | 361 +++
1 file changed, 361 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt6358.dtsi
diff --git a/arch/arm64/b
From: Sha Zhang
After the commit 334031219a84 ("bonding/802.3ad: fix slave link
initialization transition states") merged,
the slave's link status will be changed to BOND_LINK_FAIL
from BOND_LINK_DOWN in the following scenario:
- Driver reports loss of carrier and
bonding driver receives NETDEV
Hi,
(Fixed Lorenzo's email address. All the patches in the series have wrong email
id)
On 23/08/19 8:09 AM, Xiaowei Bao wrote:
>
>
>> -Original Message-
>> From: Kishon Vijay Abraham I
>> Sent: 2019年8月22日 19:44
>> To: Xiaowei Bao ; bhelg...@google.com;
>> robh...@kernel.org; mark.rutl
> > endmenu
> > diff --git a/drivers/hv/connection.c b/drivers/hv/connection.c
> > index 09829e15d4a0..c9c63a4033cd 100644
> > --- a/drivers/hv/connection.c
> > +++ b/drivers/hv/connection.c
> > @@ -357,6 +357,9 @@ void vmbus_on_event(unsigned long data)
> >
> > trace_vmbus_on_event(channel);
Hi Andy,
On 22/8/2019 9:04 PM, Andy Shevchenko wrote:
On Thu, Aug 22, 2019 at 05:26:33PM +0800, Tanwar, Rahul wrote:
On 22/8/2019 5:02 PM, Andy Shevchenko wrote:
On Thu, Aug 22, 2019 at 03:44:03PM +0800, Rahul Tanwar wrote:
Use a newly introduced optional "status" property of "motorola,mc1468
LGTM, sorry for the mid air collision. Thanks for resolving, Stephen!
On Thu, Aug 22, 2019 at 8:08 PM Stephen Rothwell wrote:
>
> Hi all,
>
> Today's linux-next merge of the crypto tree got a conflict in:
>
> arch/x86/purgatory/Makefile
>
> between commit:
>
> 4ce97317f41d ("x86/purgatory: D
On Wed, Aug 21, 2019 at 01:44:21PM -0700, Ira Weiny wrote:
> On Wed, Aug 21, 2019 at 04:48:10PM -0300, Jason Gunthorpe wrote:
> > On Wed, Aug 21, 2019 at 11:57:03AM -0700, Ira Weiny wrote:
> >
> > > > Oh, I didn't think we were talking about that. Hanging the close of
> > > > the datafile fd conti
On Thu, 2019-08-22 at 09:39 -0400, Joel Fernandes wrote:
> On Wed, Aug 21, 2019 at 04:33:58PM -0700, Paul E. McKenney wrote:
> > On Wed, Aug 21, 2019 at 06:19:04PM -0500, Scott Wood wrote:
> > > Signed-off-by: Scott Wood
> > > ---
> > > Another question is whether non-raw spinlocks are intended to
On Tue, Aug 20, 2019 at 10:33:38AM -0700, Sagi Grimberg wrote:
>
> > From: Long Li
> >
> > When a NVMe hardware queue is mapped to several CPU queues, it is possible
> > that the CPU this hardware queue is bound to is flooded by returning I/O for
> > other CPUs.
> >
> > For example, consider th
Hi all,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/mediatek/mtk_drm_drv.c
between commit:
4c6f3196e6ea ("drm/mediatek: use correct device to import PRIME buffers")
from the drm-fixes tree and commit:
3baeeb21983a ("drm/mtk: Drop drm_gem_prime_export/impo
On Thu, Aug 15, 2019 at 09:11:51AM -0700, Ayush Ranjan wrote:
> This commit aims to fix the following issues in ext4 documentation:
> - Flexible block group docs said that the aim was to group block
> metadata together instead of block group metadata.
> - The documentation consistly uses "locatio
Hi all,
After merging the crypto tree, today's linux-next build (arm
multi_v7_defconfig) produced this warning:
WARNING: modpost: missing MODULE_LICENSE() in lib/crypto/libsha256.o
see include/linux/module.h for more information
Presumably introduced by commit
01d3aee86625 ("crypto: sha256 -
Hi all,
Today's linux-next merge of the crypto tree got a conflict in:
arch/x86/purgatory/Makefile
between commit:
4ce97317f41d ("x86/purgatory: Do not use __builtin_memcpy and
__builtin_memset")
from Linus' tree and commit:
ad767ee858b3 ("crypto: sha256 - Move lib/sha256.c to lib/cryp
On 2019/7/12 16:55, Chao Yu wrote:
> Wrap merge condition into function for readability, no logic change.
>
> Signed-off-by: Chao Yu
> ---
> v2: remove bio validation check in page_is_mergeable().
> fs/f2fs/data.c | 40 +---
> 1 file changed, 33 insertions(+),
Hi Dmitry
On 2019/08/17 2:29, Dmitry Torokhov wrote:
On Fri, Aug 16, 2019 at 05:34:19PM +0900, Jiada Wang wrote:
From: Nick Dyer
Atmel maXTouch chips can be addressed via an "Object Based Protocol" which
defines how i2c registers are mapped to different functions within the
chips. This interf
is only generated and included by
arch/arm/mach-omap2/, so it does not need to reside in the globally
visible include/generated/.
I renamed it to arch/arm/mach-omap2/pm-asm-offsets.h since the prefix
'ti-' is just redundant in mach-omap2/.
My main motivation of this change is to avoid the race c
On Thu, Aug 22, 2019 at 09:36:21PM -0500, Scott Wood wrote:
> On Wed, 2019-08-21 at 16:33 -0700, Paul E. McKenney wrote:
> > On Wed, Aug 21, 2019 at 06:19:04PM -0500, Scott Wood wrote:
> > > diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
> > > index 388ace315f32..d6e357378732 1006
On Wed, Aug 14, 2019 at 12:54:08PM +0300, Rakesh Pandit wrote:
> Really enable warning when CONFIG_EXT4_DEBUG is set and fix missing
> first argument. This was introduced in commit ff95ec22cd7f ("ext4:
> add warning to ext4_convert_unwritten_extents_endio") and splitting
> extents inside endio wou
I'll fix it. Note that I'm going to take it out of the tree soon
because it will have conflicts with Jens for-5.4/block, so we
will send it to Jens after the initial merge window, after he
rebases off of Linus.
Conflicts too hard to fixup at merge time ? Otherwise I could just
rebase on top o
From: Yang Guo
@es_stats_cache_hits and @es_stats_cache_misses are accessed frequently in
ext4_es_lookup_extent function, it would influence the ext4 read/write
performance in NUMA system.
Let's optimize it using percpu_counter, it is profitable for the
performance.
The test command is as below:
Hi Andy,
On 22/8/2019 9:08 PM, Andy Shevchenko wrote:
On Thu, Aug 22, 2019 at 06:28:43PM +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Add support for eMMC PHY on Intel's Lightning Mountain SoC.
Thanks for an update!
One minor comment below. After addressing it
Hi Rob,
On 22/8/2019 8:49 PM, Rob Herring wrote:
On Thu, Aug 22, 2019 at 5:28 AM Ramuthevar,Vadivel MuruganX
wrote:
From: Ramuthevar Vadivel Murugan
Add a YAML schema to use the host controller driver with the
eMMC PHY on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Mur
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 146dc303630aff5fdf006614a67704539c519c33
Gitweb:
https://git.kernel.org/tip/146dc303630aff5fdf006614a67704539c519c33
Author:Arnaldo Carvalho de Melo
AuthorDate:Mon, 19 Aug 2019 11:11:30 -03:0
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 3c84e65a533dbaa1a29bfd847deca73704b675eb
Gitweb:
https://git.kernel.org/tip/3c84e65a533dbaa1a29bfd847deca73704b675eb
Author:Adrian Hunter
AuthorDate:Mon, 12 Aug 2019 12:09:35 +03:00
Committer
is only generated and included by
arch/arm/mach-at91/, so it does not need to reside in the globally
visible include/generated/.
I renamed it to arch/arm/mach-at91/pm_data-offsets.h since the prefix
'at91_' is just redundant in mach-at91/.
My main motivation of this change is to avoid the race c
The following commit has been merged into the perf/core branch of tip:
Commit-ID: b658911731d41a91b9de5458d6f38d6e1c90a453
Gitweb:
https://git.kernel.org/tip/b658911731d41a91b9de5458d6f38d6e1c90a453
Author:Arnaldo Carvalho de Melo
AuthorDate:Mon, 19 Aug 2019 11:14:28 -03:0
The following commit has been merged into the perf/core branch of tip:
Commit-ID: aaa6ef8aa85f33c6dd593e139b7f7d901bbde0e2
Gitweb:
https://git.kernel.org/tip/aaa6ef8aa85f33c6dd593e139b7f7d901bbde0e2
Author:Arnaldo Carvalho de Melo
AuthorDate:Mon, 19 Aug 2019 11:00:54 -03:0
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 6e98bc349ea4219e21785d85809b10bd49e722df
Gitweb:
https://git.kernel.org/tip/6e98bc349ea4219e21785d85809b10bd49e722df
Author:Arnaldo Carvalho de Melo
AuthorDate:Tue, 20 Aug 2019 12:01:38 -03:0
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 0ac10d87a571ae7d68c7f70f1c2229388f1dce9e
Gitweb:
https://git.kernel.org/tip/0ac10d87a571ae7d68c7f70f1c2229388f1dce9e
Author:Arnaldo Carvalho de Melo
AuthorDate:Mon, 19 Aug 2019 10:53:20 -03:0
On 22/07/19 12:53 PM, Neil Armstrong wrote:
> On 10/07/2019 07:04, Joe Perches wrote:
>> Arguments are supposed to be ordered high then low.
>>
>> Signed-off-by: Joe Perches
>> ---
>> drivers/phy/amlogic/phy-meson-g12a-usb2.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff
> -Original Message-
> From: Kishon Vijay Abraham I
> Sent: 2019年8月22日 19:44
> To: Xiaowei Bao ; bhelg...@google.com;
> robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo Li
> ; lorenzo.pieral...@arm.co; a...@arndb.de;
> gre...@linuxfoundation.org; M.h. Lian ; Mingkai
> H
On 27/07/19 5:34 PM, Martin Blumenstingl wrote:
> Various Lantiq (now Intel) SoCs contain one or more PCIe controllers
> and PHYs.
> This adds a driver for the PCIe PHYs found on the Lantiq VRX200 and
> ARX300 SoCs. GRX390 should also be supported as far as I can tell,
> but I don't have any of
On Wed, 2019-08-21 at 16:33 -0700, Paul E. McKenney wrote:
> On Wed, Aug 21, 2019 at 06:19:04PM -0500, Scott Wood wrote:
> > diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
> > index 388ace315f32..d6e357378732 100644
> > --- a/include/linux/rcupdate.h
> > +++ b/include/linux/rcupda
Hi all,
Today's linux-next merge of the net-next tree got conflicts in:
drivers/pci/Kconfig
drivers/pci/controller/pci-hyperv.c
between commit:
f58ba5e3f686 ("PCI: pci-hyperv: Fix build errors on non-SYSFS config")
44b1ece783ff ("PCI: hv: Detect and fix Hyper-V PCI domain number collisi
On Wed, Aug 21, 2019 at 5:10 AM Jens Axboe wrote:
>
> On 8/21/19 12:42 AM, boojin.kim wrote:
> > This patch supports crypto information to be maintained via BIO
> > and passed to the storage driver.
> >
> > To do this, 'bi_aux_private', 'REQ_CYPTE' and 'bi_dun' are added
> > to the block layer.
>
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