The arguments of sizeof are not evaluated so arguments are safe to
re-use in that context. Excludeing sizeof sub-expressions means
macros like ARRAY_SIZE can pass checkpatch.
Signed-off-by: Brendan Jackman
---
scripts/checkpatch.pl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --gi
On Mon, 2019-08-05 at 16:27 +0200, Andrew Lunn wrote:
> [External]
>
> On Mon, Aug 05, 2019 at 07:54:53PM +0300, Alexandru Ardelean wrote:
> > This change adds bindings for the Analog Devices ADIN PHY driver, detailing
> > all the properties implemented by the driver.
> >
> > Signed-off-by: Alexa
On Tue, Aug 6, 2019 at 11:24 AM Aaron Lu wrote:
>
> On Mon, Aug 05, 2019 at 08:55:28AM -0700, Tim Chen wrote:
> > On 8/2/19 8:37 AM, Julien Desfossez wrote:
> > > We tested both Aaron's and Tim's patches and here are our results.
> > >
> > > Test setup:
> > > - 2 1-thread sysbench, one running the
From: Anson Huang
When of_clk_add_provider failed, all clks should be unregistered.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx8mm.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index e494e99..4
From: Anson Huang
When of_clk_add_provider failed, all clks should be unregistered.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx8mq.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index 04302f
On Tue, 2019-08-06 at 07:52 +0200, Heiner Kallweit wrote:
> [External]
>
> On 05.08.2019 18:54, Alexandru Ardelean wrote:
> > Down-speed auto-negotiation may not always be enabled, in which case the
> > PHY won't down-shift to 100 or 10 during auto-negotiation.
> >
> > Signed-off-by: Alexandru Ar
On Mon, 2019-08-05 at 17:22 +0200, Andrew Lunn wrote:
> [External]
>
> On Mon, Aug 05, 2019 at 07:54:51PM +0300, Alexandru Ardelean wrote:
> > Down-speed auto-negotiation may not always be enabled, in which case the
> > PHY won't down-shift to 100 or 10 during auto-negotiation.
>
> Please look at
On Mon, 2019-08-05 at 17:19 +0200, Andrew Lunn wrote:
> [External]
>
> On Mon, Aug 05, 2019 at 07:54:49PM +0300, Alexandru Ardelean wrote:
> > By default, EEE is not advertised on system init. This change allows the
> > user to specify a device property to enable EEE advertisements when the PHY
>
On Tue, Jul 30, 2019 at 03:43:20PM +0200, Arnd Bergmann wrote:
> When syncing 'for_cpu', you should not need to write back, because
> there won't be any dirty cache lines.
>
> If you have a CPU core that does not do speculative loads, you also don't
> need to invalidate here, because you have alre
On Mon, 2019-08-05 at 17:15 +0200, Andrew Lunn wrote:
> [External]
>
> On Mon, Aug 05, 2019 at 07:54:48PM +0300, Alexandru Ardelean wrote:
> > The ADIN PHYs supports 4 types of reset:
> > 1. The standard PHY reset via BMCR_RESET bit in MII_BMCR reg
> > 2. Reset via GPIO
> > 3. Reset via reg GeSftR
On Tue, Jul 30, 2019 at 08:15:44PM +0800, guo...@kernel.org wrote:
> diff --git a/arch/csky/mm/dma-mapping.c b/arch/csky/mm/dma-mapping.c
> index 80783bb..3f1ff9d 100644
> --- a/arch/csky/mm/dma-mapping.c
> +++ b/arch/csky/mm/dma-mapping.c
> @@ -18,71 +18,52 @@ static int __init atomic_pool_init(vo
On Tue, 2019-08-06 at 00:11 +0200, Andrew Lunn wrote:
> [External]
>
> > +static int adin_cl22_to_adin_reg(int devad, u16 cl22_regnum)
> > +{
> > + struct clause22_mmd_map *m;
> > + int i;
> > +
> > + if (devad == MDIO_MMD_VEND1)
> > + return cl22_regnum;
> > +
> > + for (i = 0;
On Mon, Aug 5, 2019 at 10:36 PM Andrey Smirnov wrote:
>
> The vast majority of the serial drivers check for
>
> uart_tx_stopped(&p->port) || uart_circ_empty(xmit)
>
> condition one or more times. Create a dedicated helper function and
> convert drivers to use it.
Sometimes the arguments are s
On Mon 05-08-19 20:27:03, Dan Williams wrote:
> On Sun, Aug 4, 2019 at 10:31 PM Toshiki Fukasawa
> wrote:
> >
> > On 2019/07/26 16:06, Michal Hocko wrote:
> > > On Fri 26-07-19 06:25:49, Toshiki Fukasawa wrote:
> > >>
> > >>
> > >> On 2019/07/25 18:03, Michal Hocko wrote:
> > >>> On Thu 25-07-19 0
On Mon, 2019-08-05 at 16:51 +0200, Andrew Lunn wrote:
> [External]
>
> On Mon, Aug 05, 2019 at 07:54:43PM +0300, Alexandru Ardelean wrote:
> > Sometimes, the connection between a MAC and PHY is done via a
> > mode/interface converter. An example is a GMII-to-RGMII converter, which
> > would mean t
On Mon, 2019-08-05 at 16:39 +0200, Andrew Lunn wrote:
> [External]
>
> On Mon, Aug 05, 2019 at 07:54:42PM +0300, Alexandru Ardelean wrote:
> > The ADIN1300 chip supports RGMII, RMII & MII modes. Default (if
> > unconfigured) is RGMII.
> > This change adds support for configuring these modes via th
On 06. 08. 19 5:07, Luis Araneda wrote:
> This fixes a kernel panic (read overflow) on memcpy when
> FORTIFY_SOURCE is enabled.
>
> The computed size of memcpy args are:
> - p_size (dst): 4294967295 = (size_t) -1
> - q_size (src): 1
> - size (len): 8
>
> Additionally, the memory is marked as __io
On Tue, Aug 6, 2019 at 2:37 AM Steve Longerbeam wrote:
>
> There is nothing v4l2-specific about v4l2_fwnode_{parse|put}_link().
> Make these functions more generally available by moving them to driver
> base, with the appropriate name changes to the functions and struct.
>
> In the process embed a
On Tue, 06 Aug 2019 08:13:06 +0200,
Wenwen Wang wrote:
>
> In add_new_ctl(), a mixer element structure is allocated through kzalloc()
> and the pointer is saved to 'elem'. Later on, a new alsa control element is
> created and added to this structure. In case the add process fails, i.e.,
> the retu
On 06. 08. 19 5:07, Luis Araneda wrote:
> Add .arm directive to headsmp.S to ensure that the
> CPU starts in 32-bit ARM mode and the correct code
> size is copied on smp bring-up
>
> Additionally, start secondary CPUs on secondary_startup_arm
> to automatically switch from ARM to thumb on a thumb
On Mon, 2019-08-05 at 16:25 +0200, Andrew Lunn wrote:
> [External]
>
> > diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c
> > index b75c723bda79..3dd9fe50f4c8 100644
> > --- a/drivers/net/phy/adin.c
> > +++ b/drivers/net/phy/adin.c
> > @@ -14,6 +14,9 @@
> > #define PHY_ID_ADIN1200
On Mon, 2019-08-05 at 23:02 +0200, Heiner Kallweit wrote:
> [External]
>
> On 05.08.2019 18:54, Alexandru Ardelean wrote:
> > This change adds support for enabling PHY interrupts that can be used by
> > the PHY framework to get signal for link/speed/auto-negotiation changes.
> >
> > Signed-off-by
On Mon, 2019-08-05 at 16:21 +0200, Andrew Lunn wrote:
> [External]
>
> On Mon, Aug 05, 2019 at 07:54:40PM +0300, Alexandru Ardelean wrote:
> > This change adds support for enabling PHY interrupts that can be used by
> > the PHY framework to get signal for link/speed/auto-negotiation changes.
> >
On Mon, 2019-08-05 at 22:54 +0200, Heiner Kallweit wrote:
> [External]
>
> On 05.08.2019 18:54, Alexandru Ardelean wrote:
> > This change adds support for Analog Devices Industrial Ethernet PHYs.
> > Particularly the PHYs this driver adds support for:
> > * ADIN1200 - Robust, Industrial, Low Powe
On Mon, 2019-08-05 at 17:17 +0200, Andrew Lunn wrote:
> [External]
>
> > +static struct phy_driver adin_driver[] = {
> > + {
> > + .phy_id = PHY_ID_ADIN1200,
> > + .name = "ADIN1200",
> > + .phy_id_mask= 0xfff0,
> > + .features
On Tue, Aug 6, 2019 at 3:23 PM Xiao Yang wrote:
>
> ld-option implementation has been simplified so variable TMPO
> is no longer needed.
>
> Fixes: Commit 0294e6f4a000 ("kbuild: simplify ld-option implementation")
> Signed-off-by: Xiao Yang
> ---
> scripts/Kbuild.include | 3 +--
> 1 file change
From: "Lowry Li (Arm Technology China)"
The drm_format_info doesn't have any cpp or block_size (both are zero)
information for arm only afbc format YU08/YU10. we need to compute it
by ourselves.
Changes since v1:
1. Removed redundant warning check in komeda_get_afbc_format_bpp();
2. Removed a re
On Mon, 2019-08-05 at 16:16 +0200, Andrew Lunn wrote:
> [External]
>
> > +static int adin_config_init(struct phy_device *phydev)
> > +{
> > + int rc;
> > +
> > + rc = genphy_config_init(phydev);
> > + if (rc < 0)
> > + return rc;
> > +
> > + return 0;
> > +}
>
> Why not just
>
Peter Zijlstra writes:
>
>> +static int futex_wait_multiple(u32 __user *uaddr, unsigned int flags,
>> + u32 count, ktime_t *abs_time)
>> +{
>> +struct futex_wait_block *wb;
>> +struct restart_block *restart;
>> +int ret;
>> +
>> +if (!count)
>> +
LS1028a implements 2 PCIe 3.0 controllers.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
v2:
- Fix up the legacy INTx allocate failed issue.
v3:
- no change.
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 52 ++
1 file changed, 52 insertions(+)
diff --
Add support for the LS1028a PCIe controller.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
v2:
- no change.
v3:
- Reuse the ls2088 driver data structurt.
drivers/pci/controller/dwc/pci-layerscape.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/controller/dwc/pc
Add the PCIe compatible string for LS1028A
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
v2:
- no change.
v3:
- no change.
Documentation/devicetree/bindings/pci/layerscape-pci.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/layerscap
ld-option implementation has been simplified so variable TMPO
is no longer needed.
Fixes: Commit 0294e6f4a000 ("kbuild: simplify ld-option implementation")
Signed-off-by: Xiao Yang
---
scripts/Kbuild.include | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/scripts/Kbuild.inc
On Thu, Aug 1, 2019 at 1:32 PM Jernej Škrabec wrote:
>
> Dne sreda, 31. julij 2019 ob 14:29:53 CEST je Maxime Ripard napisal(a):
> > On Tue, Jul 30, 2019 at 07:57:10PM +0200, Jernej Škrabec wrote:
> > > Dne torek, 04. junij 2019 ob 11:38:44 CEST je Code Kipper napisal(a):
> > > > On Tue, 4 Jun 201
On Tue, Aug 6, 2019 at 4:44 AM Stephen Boyd wrote:
>
> Quoting Chen-Yu Tsai (2019-08-04 20:35:05)
> > On Wed, Jul 31, 2019 at 2:16 AM Stephen Boyd wrote:
> > >
> > >
> > > Please apply directly to subsystem trees
> >
> > I didn't follow this series. Is this for -fixes or -next?
> >
>
> It's for -
On 06/08/19 02:35, Wanpeng Li wrote:
> Thank you, Paolo! Btw, how about other 5 patches?
Queued everything else too.
Paolo
> Regards,
> Wanpeng Li
On Mon, 5 Aug 2019 at 18:50, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 5.2.7 release.
> There are 131 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Respo
In add_new_ctl(), a mixer element structure is allocated through kzalloc()
and the pointer is saved to 'elem'. Later on, a new alsa control element is
created and added to this structure. In case the add process fails, i.e.,
the return value of snd_usb_mixer_add_control() is less than 0, the
alloca
On Fri, Aug 02, 2019 at 11:07:53AM +0200, Thomas Gleixner wrote:
> Last time I did, there was resistance :)
Do you have a pointer? Note that in the buffer head case maybe
a hash lock based on the page address is even better, as we only
ever use the lock in the first buffer head of a page anyway..
On 8/5/2019 5:05 PM, Linus Walleij wrote:
On Mon, Aug 5, 2019 at 1:34 PM Linus Walleij wrote:
On Thu, Aug 1, 2019 at 12:07 PM Rajendra Nayak wrote:
From: Jitendra Sharma
Add the binding for the TLMM pinctrl block found in the SC7180 platform
Signed-off-by: Jitendra Sharma
Signed-off-b
Kindly ping...
On 2019/7/25 19:30, Xiongfeng Wang wrote:
> When I ran the syzkaller testsuite, it prints out the following calltrace.
>
> [ 138.350029] rcu: INFO: rcu_sched self-detected stall on CPU
> [ 138.354703] rcu: 2-: (104998 ticks this GP)
> idle=ece/1/0x4002 softirq=
From: Jitendra Sharma
Add the binding for the TLMM pinctrl block found in the SC7180 platform
Signed-off-by: Jitendra Sharma
Signed-off-by: Vivek Gautam
[rnayak: Fix some copy-paste issues, sort and fix functions]
Signed-off-by: Rajendra Nayak
Reviewed-by: Bjorn Andersson
Reviewed-by: Vinod
From: Jitendra Sharma
Add initial pinctrl driver to support pin configuration with
pinctrl framework for SC7180
Signed-off-by: Jitendra Sharma
Signed-off-by: Vivek Gautam
[rnayak: modify to use upstream tile support
sort and squash some functions]
Signed-off-by: Rajendra Nayak
Review
Hi, Marco
Are you OK with this patch?
Thanks,
Anson.
> On Tue, Jul 02, 2019 at 03:45:45PM +0800, anson.hu...@nxp.com wrote:
> > From: Anson Huang
> >
> > Add i.MX SCU SoC's UID(unique identifier) support, user can read it
> > from sysfs:
> >
> > root@imx8qxpmek:~# cat /sys/devices/soc0/s
On 2019年08月03日 00:09, Steven Rostedt wrote:
On Fri, 2 Aug 2019 11:22:59 -0400
Steven Rostedt wrote:
I think you are not explaining the issue correctly. From looking at the
document, I think what you want to say is that the LR is saved *after*
the data for the function. Is that correct? If s
Changes since v1:
- Clear interrupt shadow in x86_emulate_instruction() instead of SVM's
skip_emulated_instruction() to generalize the fix [Sean Christopherson]
Original description:
Jim rightfully complains that hardcoding instuctions lengths is not always
correct: additional (redundant) prefi
When doing x86_emulate_instruction(EMULTYPE_SKIP) interrupt shadow has to
be cleared if and only if the skipping is successful.
There are two immediate issues:
- In SVM skip_emulated_instruction() we are not zapping interrupt shadow
in case kvm_emulate_instruction(EMULTYPE_SKIP) is used to advan
When we're unable to skip instruction with kvm_emulate_instruction() we
will not advance RIP and most likely the guest will get stuck as
consequitive attempts to execute the same instruction will likely result
in the same behavior.
As we're not supposed to see these messages under normal condition
svm->next_rip is only used by skip_emulated_instruction() and in case
kvm_set_msr() fails we rightfully don't do that. Move svm->next_rip
advancement to 'else' branch to avoid creating false impression that
it's always advanced (and make it look like rdmsr_interception()).
This is a preparatory ch
To avoid hardcoding xsetbv length to '3' we need to support decoding it in
the emulator.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/include/asm/kvm_emulate.h | 3 ++-
arch/x86/kvm/emulate.c | 23 ++-
arch/x86/kvm/svm.c | 1 +
arch/x86/kvm/x86.c
Various intercepts hard-code the respective instruction lengths to optimize
skip_emulated_instruction(): when next_rip is pre-set we skip
kvm_emulate_instruction(vcpu, EMULTYPE_SKIP). The optimization is, however,
incorrect: different (redundant) prefixes could be used to enlarge the
instruction. W
Gentle Ping...
> From: Anson Huang
>
> Add compatible for i.MX8MN and add i.MX8MM/i.MX8MN to the description.
>
> Signed-off-by: Anson Huang
> ---
> Documentation/devicetree/bindings/nvmem/imx-ocotp.txt | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/
On 5/08/19 7:49 PM, Raul Rangel wrote:
> On Fri, Aug 02, 2019 at 07:58:20AM +0300, Adrian Hunter wrote:
>>
>> You seem not to have answered to my suggestion for a change to
>> sdhci_reinit() here:
>>
>>
>> https://lore.kernel.org/lkml/fcdf6cc4-2729-abe2-85c8-b0d04901c...@intel.com/
>>
> I th
On 05.08.2019 18:54, Alexandru Ardelean wrote:
> Down-speed auto-negotiation may not always be enabled, in which case the
> PHY won't down-shift to 100 or 10 during auto-negotiation.
>
> Signed-off-by: Alexandru Ardelean
> ---
> drivers/net/phy/adin.c | 27 +++
> 1 file c
On 8/6/19 1:02 AM, Gustavo A. R. Silva wrote:
> Mark switch cases where we are expecting to fall through.
>
> This patch fixes the following warnings (Building: haps_hs_defconfig arc):
>
> arch/arc/kernel/unwind.c:827:20: warning: this statement may fall through
> [-Wimplicit-fallthrough=]
> arc
On Tue, Aug 06, 2019 at 02:22:34AM -0300, Thiago Jung Bauermann wrote:
> @@ -1318,7 +1319,10 @@ void iommu_init_early_pSeries(void)
> of_reconfig_notifier_register(&iommu_reconfig_nb);
> register_memory_notifier(&iommu_mem_nb);
>
> - set_pci_dma_ops(&dma_iommu_ops);
> + if (is
Hi Andrew,
On Mon, Aug 5, 2019 at 10:47 PM Andrew Lunn wrote:
>
> > Even with the use of this interrupt, the link status actions (link print and
> > netif ops) will still be required. And also the need for macb_open to
> > proceed without phydev. Could you please let me know if that is acceptable
On Mon, 5 Aug 2019 at 18:39, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.19.65 release.
> There are 74 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Resp
The Thermal Monitoring Unit (TMU) monitors and reports the
temperature from 2 remote temperature measurement sites
located on ls1028a chip.
Add TMU dts node to enable this feature.
Signed-off-by: Yuantian Tang
Acked-by: Eduardo Valentin
---
v2:
- remove multiple sensors support
.../arm
This patch adds memory corruption identification at bug report for
software tag-based mode, the report show whether it is "use-after-free"
or "out-of-bound" error instead of "invalid-access" error. This will make
it easier for programmers to see the memory corruption problem.
We extend the slab to
Ping for this patch series...
> From: Anson Huang
>
> This patch adds the soc & board binding for i.MX8MN.
>
> Signed-off-by: Anson Huang
> Reviewed-by: Rob Herring
> ---
> No change.
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++
> 1 file changed, 6 insertions(+)
>
> di
Please ignore this email. Sorry for sending the wrong patch.
BR,
Andy
> -Original Message-
> From: Yuantian Tang
> Sent: 2019年8月6日 13:30
> To: shawn...@kernel.org
> Cc: Leo Li ; robh...@kernel.org;
> mark.rutl...@arm.com; linux-arm-ker...@lists.infradead.org;
> devicet...@vger.kernel.o
Hi all,
Changes since 20190805:
The crypto tree still had its build failure for which I applied a patch.
The integrity tree gained a build failure for which I applied a patch.
Non-merge commits (relative to Linus' tree): 4304
4721 files changed, 249705 insertions(+), 114654 dele
Add nxp sa56004 chip node for temperature monitor.
Signed-off-by: Yuantian Tang
---
v3:
- sort the node in i2c address
v2:
- change the node name and add vcc-supply
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts | 15 +++
arch/arm64/boot/dts/freescale/fsl-ls1028a
Finally new_flags equals old vm_flags *OR* vm_flags.
It is not necessary to mask them first.
Signed-off-by: Wei Yang
---
fs/userfaultfd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/userfaultfd.c b/fs/userfaultfd.c
index ccbdbd62f0d8..653d8f7c453c 100644
--- a/fs/user
Hi there,
On Fri, Aug 02, 2019 at 03:04:25AM -0700, Joe Perches wrote:
> On Fri, 2019-08-02 at 11:40 +0200, Greg Kroah-Hartman wrote:
> > From: Luke Nowakowski-Krijger
> >
> > commit c666355e60ddb4748ead3bdd983e3f7f2224aaf0 upstream.
> >
> > Change devm_k*alloc to k*alloc to manually allocate
On Mon, Aug 05, 2019 at 06:51:51PM -0600, shuah wrote:
> On 8/5/19 7:01 AM, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 5.2.7 release.
> > There are 131 patches in this series, all will be posted as a response
> > to this one. If anyone has any issues with th
From: Sukadev Bhattiprolu
POWER9 processor includes support for Protected Execution Facility (PEF).
Attached documentation provides an overview of PEF and defines the API
for various interfaces that must be implemented in the Ultravisor
firmware as well as in the KVM Hypervisor.
Based on input f
From: Ryan Grimm
Enables running as a secure guest in platforms with an Ultravisor.
Signed-off-by: Ryan Grimm
Signed-off-by: Ram Pai
Signed-off-by: Thiago Jung Bauermann
---
arch/powerpc/configs/ppc64_defconfig | 1 +
arch/powerpc/configs/pseries_defconfig | 1 +
2 files changed, 2 inserti
Hi all
I've got 2 units network:
+--+
| |
|vlan23:172.16.23.2/24 |
+--+
|
|
|
+--+
|VRF lo1 |
|vlan20: 172.16.20.1/24|
|vlan21: 172.16.21.1/24|
|vlan22: 172.16.22.1/24|
On Mon, 2019-08-05 at 13:07 -0700, Sagi Grimberg wrote:
> > > > > > Ping ? I had another look today and I don't feel like mucking around
> > > > > > with all the AQ size logic, AEN magic tag etc... just for that sake
> > > > > > of
> > > > > > that Apple gunk. I'm happy to have it give up IO tags,
On Mon, 2019-08-05 at 11:27 -0700, Sagi Grimberg wrote:
> > > Ping ? I had another look today and I don't feel like mucking
> > > around
> > > with all the AQ size logic, AEN magic tag etc... just for that
> > > sake of
> > > that Apple gunk. I'm happy to have it give up IO tags, it doesn't
> > > s
From: Ryan Grimm
User space might want to know it's running in a secure VM. It can't do
a mfmsr because mfmsr is a privileged instruction.
The solution here is to create a cpu attribute:
/sys/devices/system/cpu/svm
which will read 0 or 1 based on the S bit of the guest's CPU 0.
Signed-off-by
From: Sukadev Bhattiprolu
Normally, the HV emulates some instructions like MSGSNDP, MSGCLRP
from a KVM guest. To emulate the instructions, it must first read
the instruction from the guest's memory and decode its parameters.
However for a secure guest (aka SVM), the page containing the
instructi
From: Anshuman Khandual
Secure guests need to share the DTL buffers with the hypervisor. To that
end, use a kmem_cache constructor which converts the underlying buddy
allocated SLUB cache pages into shared memory.
Signed-off-by: Anshuman Khandual
Signed-off-by: Thiago Jung Bauermann
---
arch/
From: Ram Pai
These functions are used when the guest wants to grant the hypervisor
access to certain pages.
Signed-off-by: Ram Pai
Signed-off-by: Thiago Jung Bauermann
---
arch/powerpc/include/asm/ultravisor-api.h | 2 ++
arch/powerpc/include/asm/ultravisor.h | 24 ++
From: Ram Pai
Make the Enter-Secure-Mode (ESM) ultravisor call to switch the VM to secure
mode. Pass kernel base address and FDT address so that the Ultravisor is
able to verify the integrity of the VM using information from the ESM blob.
Add "svm=" command line option to turn on switching to se
From: Ram Pai
A new kernel deserves a clean slate. Any pages shared with the hypervisor
is unshared before invoking the new kernel. However there are exceptions.
If the new kernel is invoked to dump the current kernel, or if there is a
explicit request to preserve the state of the current kernel,
On Mon, 2019-08-05 at 07:49 -0600, Keith Busch wrote:
> > Ping ? I had another look today and I don't feel like mucking around
> > with all the AQ size logic, AEN magic tag etc... just for that sake of
> > that Apple gunk. I'm happy to have it give up IO tags, it doesn't seem
> > to make much of a
From: Anshuman Khandual
LPPACA structures need to be shared with the host. Hence they need to be in
shared memory. Instead of allocating individual chunks of memory for a
given structure from memblock, a contiguous chunk of memory is allocated
and then converted into shared memory. Subsequent all
Helps document what the hard-coded number means.
Also take the opportunity to fix an #endif comment.
Suggested-by: Alexey Kardashevskiy
Signed-off-by: Thiago Jung Bauermann
---
arch/powerpc/kernel/paca.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/power
From: Anshuman Khandual
SWIOTLB checks range of incoming CPU addresses to be bounced and sees if
the device can access it through its DMA window without requiring bouncing.
In such cases it just chooses to skip bouncing. But for cases like secure
guests on powerpc platform all addresses need to b
From: Claudio Carvalho
The ultracalls (ucalls for short) allow the Secure Virtual Machines
(SVM)s and hypervisor to request services from the ultravisor such as
accessing a register or memory region that can only be accessed when
running in ultravisor-privileged mode.
This patch adds ucall_noret
On Mon, Aug 05, 2019 at 05:51:53PM +0200, Lucas Stach wrote:
> The dma required_mask needs to reflect the actual addressing capabilities
> needed to handle the whole system RAM. When truncated down to the bus
> addressing capabilities dma_addressing_limited() will incorrectly signal
> no limitation
Hello,
There are three new patches from Claudio's "kvmppc: Paravirtualize KVM to
support ultravisor" series. Two of them are borrowed (meaning that he will
submit them with his series as well) and included here so that this series
can stand on its own. They are the one introducing ucall_norets() (
From: Sukadev Bhattiprolu
The ultravisor processor mode is introduced in POWER platforms that
supports the Protected Execution Facility (PEF). Ultravisor is higher
privileged than hypervisor mode.
In PEF enabled platforms, the MSR_S bit is used to indicate if the
thread is in secure state. With
On Mon, 2019-08-05 at 05:38 -0700, syzbot wrote:
> Hello,
>
> syzbot found the following crash on:
A fix for that was submitted recently by Muchun Song and should be queued up by Greg.
Cheers,
Ben.
> HEAD commit:1e78030e Merge tag 'mmc-v5.3-rc1' of
> git://git.kernel.org/..
> git tree:
From: Benjamin Herrenschmidt
For secure VMs, the signing tool will create a ticket called the "ESM blob"
for the Enter Secure Mode ultravisor call with the signatures of the kernel
and initrd among other things.
This adds support to the wrapper script for adding that blob via the "-e"
option to
Introduce CONFIG_PPC_SVM to control support for secure guests and include
Ultravisor-related helpers when it is selected
Signed-off-by: Thiago Jung Bauermann
---
arch/powerpc/include/asm/asm-prototypes.h | 2 +-
arch/powerpc/kernel/Makefile | 4 +++-
arch/powerpc/platforms/pseries
Secure guest memory is inacessible to devices so regular DMA isn't
possible.
In that case set devices' dma_map_ops to NULL so that the generic
DMA code path will use SWIOTLB and DMA to bounce buffers.
Signed-off-by: Thiago Jung Bauermann
---
arch/powerpc/platforms/pseries/iommu.c | 6 +-
1
This fixes a warning of "suspicious rcu_dereference_check() usage"
when nload runs.
Signed-off-by: Stephen Hemminger
Signed-off-by: Dexuan Cui
---
drivers/net/hyperv/netvsc_drv.c | 44 +++--
1 file changed, 26 insertions(+), 18 deletions(-)
diff --git a/drivers/ne
On Mon, Aug 05, 2019 at 11:07:18PM -0400, Luis Araneda wrote:
> This fixes a kernel panic (read overflow) on memcpy when
> FORTIFY_SOURCE is enabled.
>
> The computed size of memcpy args are:
> - p_size (dst): 4294967295 = (size_t) -1
> - q_size (src): 1
> - size (len): 8
>
> Additionally, the me
On Mon, Aug 05, 2019 at 11:07:16PM -0400, Luis Araneda wrote:
> This series adds support for kernel compiled in Thumb mode
> and fixes a kernel panic on smp bring-up when FORTIFY_SOURCE
> is enabled.
>
> The series started with the second patch as an RFC, and
> the first patch were suggested on th
On Mon, Aug 05, 2019 at 11:07:17PM -0400, Luis Araneda wrote:
> Add .arm directive to headsmp.S to ensure that the
> CPU starts in 32-bit ARM mode and the correct code
> size is copied on smp bring-up
>
> Additionally, start secondary CPUs on secondary_startup_arm
> to automatically switch from AR
On Tue, Aug 06, 2019 at 07:20:49AM +0300, Jari Ruusu wrote:
> Greg Kroah-Hartman wrote:
> > On Mon, Aug 05, 2019 at 11:11:01PM +0300, Jari Ruusu wrote:
> > > Peter Zijlstra's "x86/atomic: Fix smp_mb__{before,after}_atomic()"
> > > upstream commit 69d927bba39517d0980462efc051875b7f4db185 seems to
>
On Mon, Aug 05, 2019 at 07:55:44PM -0700, Gavin Li wrote:
> > /* create a coherent mapping */
> > ret = dma_common_contiguous_remap(page, size, VM_USERMAP,
> > - arch_dma_mmap_pgprot(dev, PAGE_KERNEL, attrs),
> > + dma_pgprot(dev, PAGE_KER
From: Boris Brezillon
The m25p80 driver is actually a generic wrapper around the spi-mem
layer. Not only the driver name is misleading, but we'd expect such a
common logic to be directly available in the core. Another reason for
moving this code is that SPI NOR controller drivers should
progressi
spi-mem layer expects all buffers passed to it to be DMA'able. But
spi-nor layer mostly allocates buffers on stack for reading/writing to
registers and therefore are not DMA'able. Introduce bounce buffer to be
used to read/write to registers. This ensures that buffer passed to
spi-mem layer during
From: Boris Brezillon
The spi-mem layer provides a spi_mem_supports_op() function to check
whether a specific operation is supported by the controller or not.
This is much more accurate than the hwcaps selection logic based on
SPI_{RX,TX}_ flags.
Rework the hwcaps selection logic to use spi_mem_
This is repost of patch 6 and 7 split from from Boris Brezillon's X-X-X
mode support series[1]
Background from cover letter for RFC[1]:
m25p80 is just a simple SPI NOR controller driver (a wrapper around the
SPI mem API). Not only it shouldn't be named after a specific SPI NOR
chip, but it also do
1 - 100 of 1302 matches
Mail list logo
