On Tue, Jul 31, 2018 at 12:10:06PM +0530, Amit Pundir wrote:
> On Tue, 31 Jul 2018 at 09:55, John Stultz wrote:
> >
> > On Mon, Jul 30, 2018 at 8:26 PM, Hugh Dickins wrote:
> > > On Mon, 30 Jul 2018, Linus Torvalds wrote:
> > >> On Mon, Jul 30, 2018 at 2:53 PM Hugh Dickins wrote:
> > >> >
> > >>
Add support for the rk809 and rk817 regulator driver.
Their specifications are as follows:
1、The RK809 and RK809 consist of 5 DCDCs, 9 LDOs
and have the same registers for these components except dcdc5.
2、The dcdc5 is a boost dcdc for RK817 and is a buck for RK809.
3、The
Add device tree bindings documentation for Rockchip's RK809 & RK817 PMIC.
Signed-off-by: Tony Xie
---
Documentation/devicetree/bindings/mfd/rk808.txt | 55 +
1 file changed, 55 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/rk808.txt
b/Documentation/de
Add support for the rk809 and rk817 regulator driver.
Their specifications are as follows:
1、The RK809 and RK809 consist of 5 DCDCs, 9 LDOs
and have the same registers for these components except dcdc5.
2、The dcdc5 is a boost dcdc for RK817 and is a buck for RK809.
3、The
The rk809 and rk817 are a Power Management IC (PMIC) for multimedia
and handheld devices. It contains the following components:
- Regulators
- RTC
- Clocking
Both RK809 and RK817 chips are using a similar register map,
so we can reuse the RTC and Clocking a
On Mon 30-07-18 19:05:50, David Rientjes wrote:
> On Mon, 30 Jul 2018, Michal Hocko wrote:
>
> > On Mon 30-07-18 17:03:20, kernel test robot wrote:
> > [...]
> > > [9.034310] BUG: KASAN: null-ptr-deref in dump_header+0x10c/0x448
> >
> > Could you faddr2line on the offset please?
> >
>
> It'
On 31 July 2018 at 14:22, Baolin Wang wrote:
> Hi Bjorn,
>
> On 31 July 2018 at 11:54, Bjorn Andersson wrote:
>> On Mon 30 Jul 05:29 PDT 2018, Baolin Wang wrote:
>>
>>> Some LED controllers have support for autonomously controlling
>>> brightness over time, according to some preprogrammed pattern
Hi Nick,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v4.18-rc7 next-20180727]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/l
> OK. How about:
>
> though this might not work on a path with spaces
> or some such...
>
> ---
> scripts/checkpatch.pl | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
> index f25f708cd2a7..afb9fb27908c 100755
> --- a/scri
On Tue, 31 Jul 2018 at 09:55, John Stultz wrote:
>
> On Mon, Jul 30, 2018 at 8:26 PM, Hugh Dickins wrote:
> > On Mon, 30 Jul 2018, Linus Torvalds wrote:
> >> On Mon, Jul 30, 2018 at 2:53 PM Hugh Dickins wrote:
> >> >
> >> > I have no problem with reverting -rc7's vma_is_anonymous() series.
> >>
On 7/24/2018 12:52 AM, Tal Gilboa wrote:
On 7/24/2018 12:01 AM, Jakub Kicinski wrote:
On Mon, 23 Jul 2018 15:03:38 -0500, Alexandru Gagniuc wrote:
PCIe downtraining happens when both the device and PCIe port are
capable of a larger bus width or higher speed than negotiated.
Downtraining might b
On 27 July 2018 at 17:26, Angus Ainslie wrote:
> Hi Krzysztof,
>
> On 2018-07-26 00:51, Krzysztof Kozlowski wrote:
>>
>> On 25 July 2018 at 21:46, Angus Ainslie (Purism) wrote:
>>>
>>> The BATCMP table isn't used so drop it
>>
>>
>> TBL_VCLAMP also looks unused. TBL_IPRECHG does not have table en
> On Jul 27, 2018, at 11:46 AM, Josh Poimboeuf wrote:
>
> On Fri, Jul 27, 2018 at 04:23:55PM +, Jeremy Cline wrote:
>> 'type' is a user-controlled value used to index into 's_qf_names', which
>> can be used in a Spectre v1 attack. Clamp 'type' to the size of the
>> array to avoid a speculati
From: Alexander Usyskin
Define dma ring buffer sizes for PCH12 (CLN HW and newer)
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/hw-me.c | 13 +
drivers/misc/mei/hw-me.h | 4
2 files changed, 17 insertions(+)
diff --git a/drivers/misc/mei
From: Alexander Usyskin
Bump HBM version to 2.1 to indicate DMA transfer support.
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/hw.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/mei/hw.h b/drivers/misc/mei/hw.h
index acb
From: Alexander Usyskin
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/pci-me.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c
index ea4e152270a3..73ace2d59dea 100644
--- a/driver
Only a firmware with version 2.1 and above supports dma ring feature.
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/misc/mei/debugfs.c | 2 ++
drivers/misc/mei/hbm.c | 6 ++
drivers/misc/mei/hw.h | 6 ++
drivers/misc/mei/mei_dev.h | 2 ++
4 files cha
Implement a circular buffer on allocated system memory. Read and write
indices are stored on the control block which is also shared between the
device and the host.
Two new functions are exported from the DMA module: mei_dma_ring_write,
and mei_dma_ring_empty_slots. The former simply copy a packet
DMA ring is allocated upon HBM handshake and the ring parameters are set
via dedicated HBM_DMA_SETUP request command. The firmware will perform
its setup and respond with a status. On failure the DMA buffers are
released.
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers
The DMA ring control block contains write and read
indices for host and device circular buffers.
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/misc/mei/dma-ring.c | 21 +
drivers/misc/mei/hbm.c | 2 ++
drivers/misc/mei/hw.h | 23 ++
This series adds an alternative method for
transferring data between the mei driver and the device
via a DMA ring. The DMA ring allows transferring
data in bigger chunks, up to 128K, than the HW ring 512B.
The actual sizes depend on particular MEI generations.
The HW ring is faster for packets that
Add dma_ring bit in the mei message header for conveying
that the message data itself are on the dma ring.
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/misc/mei/client.c | 1 +
drivers/misc/mei/hbm.c | 1 +
drivers/misc/mei/hw.h | 16
dr
Allocate DMA ring buffers from managed coherent memory.
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/misc/mei/Makefile | 1 +
drivers/misc/mei/dma-ring.c | 103
drivers/misc/mei/hw-me.c| 6 +++
drivers/misc/mei/
Remove header size knowledge from me and txe hw layers,
this requires to change the write handler to accept
header and its length as well as data and its length.
HBM messages are fixed to use basic header, hence we add mei_hbm2slots()
that converts HBM message length and mei message header,
while
The protocol defines how to setup an I/O ring on top of host
memory to utilize the device DMA engine for faster transport.
Three memory buffers are allocated.
A Host circular buffer for from the Host to Device communication.
A Device circular buffer for from Device to the Host communication.
And f
Implement circular buffer protocol over receive dma
buffer. Add extension to the mei message header that holds
length of the buffer on the dma buffer.
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/misc/mei/client.c| 2 +-
drivers/misc/mei/dma-ring.c | 63 ++
> Am 31.07.2018 um 00:56 schrieb David Rivshin :
>
> On Sun, 29 Jul 2018 20:19:08 +0200
> "H. Nikolaus Schaller" wrote:
>
>> Hi,
>>
>>> Am 29.07.2018 um 20:08 schrieb Ladislav Michl :
>>>
>>> On Sun, Jul 29, 2018 at 08:32:41AM +0200, H. Nikolaus Schaller wrote:
Hi,
> Am 28.0
On Mon, Jul 30, 2018 at 11:19 PM Dmitry Torokhov wrote:
>
> On Sun, Jul 29, 2018 at 12:37 PM Todd Poynor wrote:
> >
> > From: Todd Poynor
> >
> > Hold a reference on the struct pci_dev while a pointer to it is held in
> > the gasket data structures.
> >
> > Signed-off-by: Todd Poynor
> > ---
>
On Mon, Jul 30, 2018 at 06:01:26PM -0700, Linus Torvalds wrote:
> On Mon, Jul 30, 2018 at 2:53 PM Hugh Dickins wrote:
> >
> > I have no problem with reverting -rc7's vma_is_anonymous() series.
>
> I don't think we need to revert the whole series: I think the rest are
> all fairly obvious cleanups
Hi Bjorn,
On 31 July 2018 at 11:54, Bjorn Andersson wrote:
> On Mon 30 Jul 05:29 PDT 2018, Baolin Wang wrote:
>
>> Some LED controllers have support for autonomously controlling
>> brightness over time, according to some preprogrammed pattern or
>> function.
>>
>> This patch adds pattern trigger
On Tue, 31 Jul 2018 06:38:00 +0100,
Erin Lo wrote:
>
> From: Ben Ho
>
> Add basic chip support for Mediatek 8183
>
> Signed-off-by: Ben Ho
> Signed-off-by: Erin Lo
> ---
> arch/arm64/boot/dts/mediatek/Makefile | 1 +
> arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 23 +
> arch/
On Sun, Jul 29, 2018 at 12:37 PM Todd Poynor wrote:
>
> From: Todd Poynor
>
> Hold a reference on the struct pci_dev while a pointer to it is held in
> the gasket data structures.
>
> Signed-off-by: Todd Poynor
> ---
> drivers/staging/gasket/gasket_core.c | 4 ++--
> 1 file changed, 2 insertion
Merge the duplicated complex conditions to improve code readability.
Signed-off-by: Liu Song
Reviewed-by: Jiang Biao
---
fs/ext4/inode.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c
index 7d6c100..c2bc1fd 100644
--- a/fs/ex
On Mon, 30 Jul 2018 23:36:57 +0100,
Thomas Gleixner wrote:
>
> On Mon, 30 Jul 2018, Bjorn Helgaas wrote:
>
> > [+cc Thomas, Christoph, LKML]
>
> + Marc
>
> > On Mon, Jul 30, 2018 at 12:03:42AM +0200, Heiner Kallweit wrote:
> > > If we have a threaded interrupt with the handler being NULL, then
ia64, mips, parisc, powerpc, sh, sparc, x86 architectures use the
same version of huge_ptep_get, so move this generic implementation into
asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
Reviewed-by: Mike Kravetz
---
arch/arm/include/asm/hugetlb-3level.h | 1 +
arch/arm64/include/asm/huget
Commit-ID: 156c8b58ef5cfd97245928c95669fd4cb0f9c388
Gitweb: https://git.kernel.org/tip/156c8b58ef5cfd97245928c95669fd4cb0f9c388
Author: Kan Liang
AuthorDate: Mon, 30 Jul 2018 08:28:08 -0400
Committer: Ingo Molnar
CommitDate: Tue, 31 Jul 2018 07:43:37 +0200
perf/x86/intel/uncore: Fix ha
Commit-ID: 44fe619b1418ff4e9d2f9518a940fbe2fb686a08
Gitweb: https://git.kernel.org/tip/44fe619b1418ff4e9d2f9518a940fbe2fb686a08
Author: Arnaldo Carvalho de Melo
AuthorDate: Mon, 30 Jul 2018 13:15:03 -0300
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 30 Jul 2018 13:15:03 -0300
p
Commit-ID: 1f27a050fc679d16e68a40e0bb575364a89fad66
Gitweb: https://git.kernel.org/tip/1f27a050fc679d16e68a40e0bb575364a89fad66
Author: Arnaldo Carvalho de Melo
AuthorDate: Mon, 30 Jul 2018 12:26:54 -0300
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 30 Jul 2018 12:36:51 -0300
t
Commit-ID: fc73bfd6005c7fe5c3a2f04d4db7fa5d37cd3ebd
Gitweb: https://git.kernel.org/tip/fc73bfd6005c7fe5c3a2f04d4db7fa5d37cd3ebd
Author: Arnaldo Carvalho de Melo
AuthorDate: Mon, 30 Jul 2018 11:56:13 -0300
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 30 Jul 2018 12:35:45 -0300
t
Commit-ID: 7def16d1d2668a4a3663291c9ace307b81934704
Gitweb: https://git.kernel.org/tip/7def16d1d2668a4a3663291c9ace307b81934704
Author: Arnaldo Carvalho de Melo
AuthorDate: Mon, 30 Jul 2018 11:48:19 -0300
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 30 Jul 2018 11:51:13 -0300
t
Commit-ID: 2c3ee0e1779d2e08bc08734bc8475daaf94d0ba4
Gitweb: https://git.kernel.org/tip/2c3ee0e1779d2e08bc08734bc8475daaf94d0ba4
Author: Arnaldo Carvalho de Melo
AuthorDate: Mon, 30 Jul 2018 11:41:56 -0300
Committer: Arnaldo Carvalho de Melo
CommitDate: Mon, 30 Jul 2018 11:41:56 -0300
t
From: Levin Du
In roc-rk3328-cc board, the signal voltage of sdmmc is supplied by the
vcc_sdio regulator, which is a mux between 1.8V and 3.3V, controlled by
a special output only gpio pin labeled "gpiomut_pmuio_iout",
corresponding bit 1 of the syscon GRF_SOC_CON10.
This special pin can now be
On 二, 2018-07-31 at 10:21 +0530, Viresh Kumar wrote:
> On 05-07-18, 10:39, Viresh Kumar wrote:
> >
> > Hi,
> >
> > This is an attempt to fix the broken or partially defined DT
> > bindings
> > for cooling-maps. We should list every device that participates in
> > cooling down at a certain trip po
From: Levin Du
It is necessary for the io domain setting of the SoC to match the voltage
supplied by the regulators.
Signed-off-by: Levin Du
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
Changes in v1:
- Split from V0.
arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 12 ++
From: Levin Du
Adding a GRF GPIO controller labled "grf_gpio" to rk3328, currently
providing access to the GPIO_MUTE pin, which is manupulated by the
GRF_SOC_CON10 register.
The GPIO_MUTE pin is referred to as <&grf_gpio 0>.
Signed-off-by: Levin Du
---
Changes in v4:
- Use binding of "rockch
From: Levin Du
Hi all, this is an attemp to add sdmmc UHS support to the
ROC-RK3328-CC board.
This patch series adds a new compatible `rockchip,rk3328-grf-gpio` to
the gpio-syscon driver, which currently only support for the access of
the GPIO_MUTE pin in RK3328. Support for HDMI pins can be ad
From: Levin Du
In Rockchip RK3328, the output only GPIO_MUTE pin, originally for codec
mute control, can also be used for general purpose. It is manipulated by
the GRF_SOC_CON10 register in GRF. Aside from the GPIO_MUTE pin, the HDMI
pins can also be set in the same way.
Currently this GRF GPIO
This fix rounds the clock rate properly by using quotient and not
remainder in the calculation. This issue was found while testing HDMI
in the Juno platform.
Fixes: 6d6a1d82eaef7 ("clk: add support for clocks provided by SCMI")
Acked-by: Sudeep Holla
Signed-off-by: Amit Daniel Kachhap
---
drive
On Tue, 31 Jul 2018 11:29:24 +0800
Jisheng Zhang wrote:
> Hi Robin,
>
> On Mon, 30 Jul 2018 12:06:08 +0100 Robin Murphy wrote:
>
> > Hi Jisheng,
> >
> > On 26/07/18 08:14, Jisheng Zhang wrote:
> > > When using DMA, if the DMA addr spans 128MB boundary, we have to split
> > > the DMA transfer
Byungchul Park writes:
> On Tue, Jul 31, 2018 at 09:37:50AM +0800, Huang, Ying wrote:
>> Byungchul Park writes:
>>
>> > Hello folks,
>> >
>> > I'm careful in saying.. and curious about..
>> >
>> > In restrictive cases like only addtions happen but never deletion, can't
>> > we safely traverse a
Hi all,
Today's linux-next merge of the pinctrl tree got a conflict in:
Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
between commit:
791d3ef2e111 ("dt-bindings: remove 'interrupt-parent' from bindings")
from the devicetree tree and commit:
de1d08b22974 ("dt-bindings: p
From: Ben Ho
Add basic chip support for Mediatek 8183
Signed-off-by: Ben Ho
Signed-off-by: Erin Lo
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 23 +
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 146
This adds dt-binding documentation of uart for Mediatek MT8183 SoC
Platform.
Signed-off-by: Erin Lo
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt
b/Docume
From: Weiyi Lu
Add MT8183 clock dt-bindings, include topckgen, apmixedsys,
infracfg and subsystem clocks.
Signed-off-by: Weiyi Lu
Signed-off-by: Erin Lo
---
include/dt-bindings/clock/mt8183-clk.h | 413 +
1 file changed, 413 insertions(+)
create mode 100644 in
From: Weiyi Lu
Add clock controller nodes for MT8183, include topckgen, infracfg,
apmixedsys and subsystem.
Signed-off-by: Weiyi Lu
Signed-off-by: Erin Lo
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 92
1 file changed, 92 insertions(+)
diff --git a/arch/ar
From: Weiyi Lu
On some Mediatek platforms, there are critical clocks of
clock gate type.
To register clock gate with flags CLK_IS_CRITICAL,
we need to add the flags field in mtk_gate data and register APIs.
Signed-off-by: Weiyi Lu
Signed-off-by: Erin Lo
---
drivers/clk/mediatek/clk-gate.c | 5
From: Weiyi Lu
This patch adds the binding documentation for apmixedsys, audiosys,
camsys, imgsys, infracfg, mfgcfg, mmsys, topckgen, vdecsys, vencsys
and ipu for Mediatek MT8183.
Signed-off-by: Weiyi Lu
Signed-off-by: Erin Lo
---
.../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 +
...
This adds dt-binding documentation of SYSIRQ for Mediatek MT8183 SoC
Platform.
Signed-off-by: Erin Lo
Acked-by: Rob Herring
---
.../devicetree/bindings/interrupt-controller/mediatek,sysirq.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree/bindings/interru
From: Weiyi Lu
Add MT8183 clock support, include topckgen, apmixedsys,
infracfg and subsystem clocks.
Signed-off-by: Weiyi Lu
Signed-off-by: Erin Lo
---
drivers/clk/mediatek/Kconfig | 74 ++
drivers/clk/mediatek/Makefile | 12 +
drivers/clk/mediatek/clk-mt8183-a
From: Weiyi Lu
Add uart node with correct uart clocks.
Signed-off-by: Erin Lo
Signed-off-by: Weiyi Lu
---
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 8
arch/arm64/boot/dts/mediatek/mt8183.dtsi| 30 +
2 files changed, 38 insertions(+)
diff --git a/
MT8183 is a SoC based on 64bit ARMv8 architecture.
It contains 4 CA53 and 4 CA73 cores.
MT8183 share many HW IP with MT65xx series.
This patchset was tested on MT8183 evaluation board and use correct clock to
shell.
This series contains document bindings, device tree including interrupt, uart,
c
This adds dt-binding documentation of cpu for Mediatek MT8183.
Signed-off-by: Erin Lo
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/arm/mediatek.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt
b/Documentation/devic
Dear Friend,
Good day, this is Mr. Henri Zongo, I'm happy to inform you about my success in
getting the fund $29.6Million transferred under the co-operation of a new
partner from Dubai, Presently I'm in Dubai for investment projects with my own
share of the total sum. Meanwhile,I didn't forget
On Tue, 31 Jul 2018 03:25:06 +0200,
Agrawal, Akshu wrote:
>
>
>
> On 7/30/2018 9:20 PM, Mark Brown wrote:
> > On Mon, Jul 30, 2018 at 05:32:21PM +0200, Takashi Iwai wrote:
> >
> >> That said, if delay callback of CPU dai provides the additional delay,
> >> the patch does correct thing. OTOH, i
On Tue, Jul 31, 2018 at 09:37:50AM +0800, Huang, Ying wrote:
> Byungchul Park writes:
>
> > Hello folks,
> >
> > I'm careful in saying.. and curious about..
> >
> > In restrictive cases like only addtions happen but never deletion, can't
> > we safely traverse a llist? I believe llist can be more
On Mon, Jul 30, 2018 at 5:10 PM, Sudeep Holla wrote:
> On Mon, Jul 30, 2018 at 11:03:51AM +0530, Amit Daniel Kachhap wrote:
>> Hi,
>>
>> On Fri, Jul 27, 2018 at 10:07 PM, Stephen Boyd wrote:
>> > Quoting Amit Daniel Kachhap (2018-07-27 07:01:52)
>> >> This fix rounds the clock rate properly by us
Hi all,
Today's linux-next merge of the mux tree got a conflict in:
MAINTAINERS
between commit:
fe8e81b7e899 ("adp5061: New driver for ADP5061 I2C battery charger")
from the battery tree and commit:
703160ff3e50 ("dt-bindings: mux: add adi,adgs1408")
from the mux tree.
I fixed it up (
Commit-ID: 99811294b063eb44185df9a58923928fccdbe122
Gitweb: https://git.kernel.org/tip/99811294b063eb44185df9a58923928fccdbe122
Author: Kan Liang
AuthorDate: Mon, 30 Jul 2018 08:28:08 -0400
Committer: Ingo Molnar
CommitDate: Mon, 30 Jul 2018 20:13:58 +0200
perf/x86/intel/uncore: Fix ha
Hi Ming
On 07/31/2018 12:58 PM, Ming Lei wrote:
> On Tue, Jul 31, 2018 at 12:02:15PM +0800, Jianchao Wang wrote:
>> Currently, we will always set SCHED_RESTART whenever there are
>> requests in hctx->dispatch, then when request is completed and
>> freed the hctx queues will be restarted to avoid I
On Tue 31-07-18 06:01:48, Tetsuo Handa wrote:
> On 2018/07/31 4:10, Michal Hocko wrote:
> > Since should_reclaim_retry() should be a natural reschedule point,
> > let's do the short sleep for PF_WQ_WORKER threads unconditionally in
> > order to guarantee that other pending work items are started. T
On 05-07-18, 10:39, Viresh Kumar wrote:
> Hi,
>
> This is an attempt to fix the broken or partially defined DT bindings
> for cooling-maps. We should list every device that participates in
> cooling down at a certain trip point, instead of just the first in the
> list as that depends on certain or
On Mon 02 Jul 05:08 PDT 2018, Sekhar Nori wrote:
> Hi Bjorn,
>
> On Thursday 21 June 2018 05:11 PM, Bartosz Golaszewski wrote:
> > 2018-06-21 12:52 GMT+02:00 Sekhar Nori :
> >> Hi Bartosz,
> >>
> >> On Thursday 21 June 2018 01:07 PM, Bartosz Golaszewski wrote:
> >>> From: Bartosz Golaszewski
> >
On Tue, Jul 31, 2018 at 09:58:36AM +0900, Byungchul Park wrote:
> Hello folks,
>
> I'm careful in saying.. and curious about..
>
> In restrictive cases like only addtions happen but never deletion, can't
> we safely traverse a llist? I believe llist can be more useful if we can
> release the rest
On 30-07-18, 12:46, Peter Ujfalusi wrote:
> Vinod,
>
> On 2018-07-24 14:14, Vinod wrote:
> Clients must not mix the two way of handling the metadata.
> The set_len() is intended to tell the DMA driver the client provided
> metadata size (in MEM_TO_DEV case mostly).
>
> MEM
Hi John, Thomas,
Can you please review below patch and update your comments:
Regards
Gaurav
On 7/26/2018 2:12 PM, Gaurav Kohli wrote:
While migrating timer to new base, there is a need
to update base clk by calling forward_timer_base to
avoid stale clock , but at the same time if run_timer
is
On Thu 21 Jun 00:37 PDT 2018, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> Switch to using the reset framework instead of handcoded reset routines
> we used so far.
>
> Signed-off-by: Bartosz Golaszewski
> Reviewed-by: Sekhar Nori
> Reviewed-by: Philipp Zabel
Acked-by: Bjorn A
On Mon, Jul 30, 2018 at 8:26 PM, Hugh Dickins wrote:
> On Mon, 30 Jul 2018, Linus Torvalds wrote:
>> On Mon, Jul 30, 2018 at 2:53 PM Hugh Dickins wrote:
>> >
>> > I have no problem with reverting -rc7's vma_is_anonymous() series.
>>
>> I don't think we need to revert the whole series: I think the
Hi all,
Today's linux-next merge of the kvms390 tree got a conflict in:
include/uapi/linux/kvm.h
between commit:
be26b3a73413 ("arm64: KVM: export the capability to set guest SError
syndrome")
from the kvm-arm tree and commit:
a449938297e5 ("KVM: s390: Add huge page enablement control"
On Mon, Jul 30, 2018 at 02:38:01PM -0700, vnkgu...@codeaurora.org wrote:
> Do you mean the Signed-off-by lines above? That's because
> Channagoud is the one who is the original author of this driver,
> and I'm the one who did the incremental changes (changes in llcc)
> and uploading it upstream.
>
On Wed 18 Jul 04:16 PDT 2018, Arnd Bergmann wrote:
> A new driver got added that depends on QCOM_SMD and fails to link
> as built-in with CONFIG_QCOM_SMD=m:
>
> drivers/remoteproc/qcom_common.o: In function `smd_subdev_stop':
> qcom_common.c:(.text+0x674): undefined reference to `qcom_smd_unregis
Matthew Wilcox wrote on Mon, Jul 30, 2018:
> On Mon, Jul 30, 2018 at 11:34:23AM +0200, Dominique Martinet wrote:
> > -static int p9_fcall_alloc(struct p9_fcall *fc, int alloc_msize)
> > +static int p9_fcall_alloc(struct p9_client *c, struct p9_fcall *fc,
> > + int alloc_msize)
>
On Fri, Jul 27, 2018 at 06:35:10PM +0100, David Howells wrote:
> params->request indicates the attribute/attributes to be queried. This can
> be one of:
>
> fsinfo_attr_statfs - statfs-style info
> fsinfo_attr_fsinfo - Information about fsinfo()
> fsinf
On Thu 26 Jul 18:15 PDT 2018, Suman Anna wrote:
> Unwind the modified table_ptr and restore it to the local copy
> upon any subsequent failures in the rproc_start() function. This
> keeps the function to remain balanced on failures without the need
> to balance any modified variables elsewhere.
>
Dear
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> There is no reason not to use indentation and quotation marks in a changelog.
> Squeezing it into square brackets does not really improve readability.
>
> From the specification [1]:
>
> "With enhanced IBRS, the predicted targets of indirect branches executed
>cannot be controlled by sof
Dear,
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On Mon, Jul 30, 2018 at 01:53:50PM -0400, Prarit Bhargava wrote:
> I think this has to be
>
> boot_cpu_data.microcode = mc_amd->hdr.patch_id;
Yes, it does.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
--
On Mon 30 Jul 04:34 PDT 2018, Baolin Wang wrote:
> Hi Bjorn,
>
> On 28 June 2018 at 10:32, Baolin Wang wrote:
> > The commit 4f1acd758b08 ("hwspinlock: Add devm_xxx() APIs to request/free
> > hwlock") introduces one bug, that will return one error pointer if failed
> > to request one hwlock, but
Add addition argument 'arch_uprobe' to uprobe_write_opcode().
We need this in later set of patches.
Signed-off-by: Ravi Bangoria
---
arch/arm/probes/uprobes/core.c | 2 +-
arch/mips/kernel/uprobes.c | 2 +-
include/linux/uprobes.h| 2 +-
kernel/events/uprobes.c| 9 +
v7 changes:
- Don't allow both zero and non-zero reference counter offset at
the same time. It's painful and error prone.
- Don't call delayed_uprobe_install() if vma->vm_mm does not have
any breakpoint installed.
v6: https://lkml.org/lkml/2018/7/16/353
Description:
Userspace Statically
We assume to have only one reference counter for one uprobe.
Don't allow user to add multiple trace_uprobe entries having
same inode+offset but different reference counter.
Ex,
# echo "p:sdt_tick/loop2 /home/ravi/tick:0x6e4(0x10036)" > uprobe_events
# echo "p:sdt_tick/loop2_1 /home/ravi/tick:0
Simplify uprobe_register() function body and let __uprobe_register()
handle everything. Also move dependency functions around to fix build
failures.
Signed-off-by: Ravi Bangoria
---
kernel/events/uprobes.c | 69 ++---
1 file changed, 36 insertions(+),
We assume to have only one reference counter for one uprobe.
Don't allow user to register multiple uprobes having same
inode+offset but different reference counter.
Signed-off-by: Ravi Bangoria
---
kernel/events/uprobes.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/kernel/events
With this, perf buildid-cache will save SDT markers with reference
counter in probe cache. Perf probe will be able to probe markers
having reference counter. Ex,
# readelf -n /tmp/tick | grep -A1 loop2
Name: loop2
... Semaphore: 0x10020036
# ./perf buildid-cache --add /tmp/tic
Userspace Statically Defined Tracepoints[1] are dtrace style markers
inside userspace applications. Applications like PostgreSQL, MySQL,
Pthread, Perl, Python, Java, Ruby, Node.js, libvirt, QEMU, glib etc
have these markers embedded in them. These markers are added by developer
at important places
On Mon 30 Jul 05:29 PDT 2018, Baolin Wang wrote:
> Some LED controllers have support for autonomously controlling
> brightness over time, according to some preprogrammed pattern or
> function.
>
> This patch adds pattern trigger that LED device can configure the
> pattern and trigger it.
>
> Sig
On Tue, 31 Jul 2018 at 00:43, Vincent Guittot
wrote:
>
> Hi Wanpeng,
>
> On Thu, 26 Jul 2018 at 05:09, Wanpeng Li wrote:
> >
> > Hi Vincent,
> > On Fri, 29 Jun 2018 at 03:07, Vincent Guittot
> > wrote:
> > >
> > > interrupt and steal time are the only remaining activities tracked by
> > > rt_avg
Hi Robin,
On Mon, 30 Jul 2018 12:06:08 +0100 Robin Murphy wrote:
> Hi Jisheng,
>
> On 26/07/18 08:14, Jisheng Zhang wrote:
> > When using DMA, if the DMA addr spans 128MB boundary, we have to split
> > the DMA transfer into two so that each one doesn't exceed the boundary.
>
> Out of interest
On Mon, 30 Jul 2018, Linus Torvalds wrote:
> On Mon, Jul 30, 2018 at 2:53 PM Hugh Dickins wrote:
> >
> > I have no problem with reverting -rc7's vma_is_anonymous() series.
>
> I don't think we need to revert the whole series: I think the rest are
> all fairly obvious cleanups, and shouldn't reall
On 7/27/18 5:04 PM, Atish Patra wrote:
On 7/26/18 7:38 AM, Christoph Hellwig wrote:
This patch adds a driver for the Platform Level Interrupt Controller (PLIC)
specified as part of the RISC-V supervisor level ISA manual, in the memory
layout implemented by SiFive and qemu.
The PLIC connects glo
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