On 7/19/2018 11:12 AM, Bjorn Andersson wrote:
On Wed 18 Jul 22:18 PDT 2018, Rajendra Nayak wrote:
commit '8c1b7dc9b: firmware: qcom: scm: Expose download-mode control'
added support for download-mode control using the scm firmware
driver for platforms which require a secure call to write the
On Tue, 2018-07-17 at 16:52 +0800, Mars Cheng wrote:
> From: Owen Chen
>
> MT6765 add "set/clr" register for each clkmux setting, and
> one update register to trigger value change. It is designed
> to prevent read-modify-write racing issue. The sw design
> need to add a new API to handle this hw
On 18 July 2018 at 22:37, Marcel Ziswiler wrote:
> On Wed, 2018-07-18 at 21:48 +0200, Krzysztof Kozlowski wrote:
>> Fix incorrect format used for OR clause in SPDX license identifier.
>
> Can you please elaborate how you got to that conclusion as there are
> various other device trees having it sp
From: Kunihiko Hayashi
Add DT bindings for SPI controller implemented in UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/spi/spi-uniphier.txt | 26 ++
1 file changed, 26 insertions(+)
create mode 100644 Doc
This series adds support for SPI controller driver implemented on UniPhier SoCs.
Keiji Hayashibara (1):
spi: add SPI controller driver for UniPhier SoC
Kunihiko Hayashi (1):
dt-bindings: spi: add DT bindings for UniPhier SPI controller
.../devicetree/bindings/spi/spi-uniphier.txt | 2
Add SPI controller driver implemented in Socionext UniPhier SoCs.
UniPhier SoCs have two types SPI controllers; SCSSI supports a
single channel, and MCSSI supports multiple channels.
Currently this driver supports SCSSI only.
This controller has 32bit TX/RX FIFO with depth of eight entry,
and sup
* Andy Shevchenko [180718 14:54]:
> On Wed, 2018-05-23 at 11:00 -0700, Tony Lindgren wrote:
> > I thought you said earlier the issue was that you wanted to keep
> > the console enabled all the time and never idle?
>
> Yes, for kernel console.
> To be clear, if user supplies "console=ttySx" it kee
Hi Thomas,
At 07/19/2018 02:25 PM, Thomas Gleixner wrote:
On Thu, 19 Jul 2018, Dou Liyang wrote:
At 07/18/2018 10:22 AM, Pavel Tatashin wrote:
+ (unsigned long)cpu_khz % KHZ);
if (cpu_khz != tsc_khz) {
pr_info("Detected %lu.%03lu MHz TSC",
-
* Andy Shevchenko [180718 15:17]:
> On Wed, 2018-05-23 at 10:58 -0700, Tony Lindgren wrote:
> >
> > OK yeah console.idle sounds good to me. We should default to a
> > safe option.
>
> I'll see what we can do here.
Like we discussed offline I think if we allow detaching and attaching
kernel cons
On Thu, 19 Jul 2018 01:57:10 +0200
Janusz Krzysztofik wrote:
> Don't readw()/writew() data directly from/to GPIO port which is under
> control of gpio-omap driver, use GPIO chip callbacks instead.
>
> Thanks to utilization of get/set_multiple() callbacks, performance
> degrade is minor for typic
On 07/18/2018 10:17 PM, Paul E. McKenney wrote:
> On Wed, Jul 18, 2018 at 09:41:05PM +0200, David Woodhouse wrote:
>>
>>
>> On Wed, 2018-07-18 at 09:37 -0700, Paul E. McKenney wrote:
>>> On Wed, Jul 18, 2018 at 06:01:51PM +0200, David Woodhouse wrote:
On Wed, 2018-07-18 at 08:36 -0700,
On Thu, 19 Jul 2018 01:57:09 +0200
Janusz Krzysztofik wrote:
> The plan is to replace data port readw()/writew() operations with GPIO
> callbacks provided by gpio-omap driver. For acceptable performance the
> GPIO chip must support get/set_multiple() GPIO callbacks.
>
> In order to avoid data c
On Thu, 19 Jul 2018 08:08:06 +0200,
Zhang, Jun wrote:
>
> Hello, Takashi
>
> I think use our patch, it's NOT possible that the returned size is over
> sgbuf->tblsize.
>
> In function snd_malloc_sgbuf_pages,
>
> Pages is align page,
> sgbuf->tblsize is align 32*page,
> chunk is align 2^n*page,
* Neil Armstrong [180717 20:31]:
> On 17/07/2018 07:55, Tony Lindgren wrote:
> > These should all use the clkctrl clock nodes, see:
>
> Even the already configured timer1 & timer2 ?
Yeah that way things will work in a generic way for the SoCs
using clkctrl registers. That's omap4 and later and i
On 18 July 2018 at 22:33, Tobias Jakobi wrote:
> Speaking of the ISP clocks driver, I wonder why this one was never merged?
> https://patches.linaro.org/patch/115531/
Thanks for reminding this!
It seems that Sylwester is out of office so we'll have to wait for reply.
Best regards,
Krzysztof
On Thu, 19 Jul 2018 01:57:07 +0200
Janusz Krzysztofik wrote:
> Data port used by the driver is actually an OMAP MPUIO device, already
> under control of gpio-omap driver. For that reason we used to not
> request the memory region of the port as that would fail because the
> region is already bus
On Thu, 19 Jul 2018, Dou Liyang wrote:
> At 07/18/2018 10:22 AM, Pavel Tatashin wrote:
> > + (unsigned long)cpu_khz % KHZ);
> > if (cpu_khz != tsc_khz) {
> > pr_info("Detected %lu.%03lu MHz TSC",
> > - (unsigned long)tsc_khz / 1000,
> > -
From: Kunihiko Hayashi
Add nodes of SPI controller for LD4, Pro4, sLD8, Pro5 and PXs2.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-ld4.dtsi | 11 +++
arch/arm/boot/dts/uniphier-pro4.dtsi | 22 ++
arch/arm/boot/dts/uniphier-pro5.dtsi | 33
From: Kunihiko Hayashi
This commit adds pin-mux nodes for SPI controller.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-pinctrl.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-pinctrl.dtsi
b/arch/arm/boot/dts/uniphier-
On Thu, 19 Jul 2018 01:57:06 +0200
Janusz Krzysztofik wrote:
> Further optimize processing speed of read/write callback functions by
> resolving private structure pointer only once per callback and passing
> it to all subfunctions instead of mtd_info.
Not sure this has a real impact on perfs, bu
This series adds SPI pin-mux node and SPI node for UniPhier SoCs.
Kunihiko Hayashi (3):
ARM: dts: uniphier: add SPI pin-mux node
ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCs
arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3
arch/arm/boot/dts/uniphier-ld4.dtsi
From: Kunihiko Hayashi
Add nodes of SPI controller for UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 22
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 44
arch/arm64/boot/dts/socionext/uniphier-p
On Thu, 19 Jul 2018 01:57:05 +0200
Janusz Krzysztofik wrote:
> In its current shape, the driver sets data port direction before each
> byte read/write operation, even during multi-byte transfers. Optimize
> that by setting the port direction only on first byte of each transfer.
Sounds like prem
On Thu, 19 Jul 2018 01:57:04 +0200
Janusz Krzysztofik wrote:
> Initialize NWP GPIO pin low to protect the device from hazard during
> probe. Release write protection as soon as the device is under
> control.
>
> Signed-off-by: Janusz Krzysztofik
> ---
> drivers/mtd/nand/raw/ams-delta.c | 10 +
On Wed, Jul 18, 2018 at 10:50:32AM +0200, Michal Hocko wrote:
> On Wed 18-07-18 00:55:29, Naoya Horiguchi wrote:
> > On Tue, Jul 17, 2018 at 04:27:43PM +0200, Michal Hocko wrote:
> > > On Tue 17-07-18 14:32:31, Naoya Horiguchi wrote:
> > > > There's a race condition between soft offline and hugetlb
From: Kunihiko Hayashi
Add pin-mux settings for spi controller.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 10 ++
drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 20
drivers/pinctrl/un
From: Kunihiko Hayashi
Add reset control for SPI controller on UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
---
drivers/reset/reset-uniphier.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c
index e9030ff..5605745 1
On Thu, 19 Jul 2018 01:57:03 +0200
Janusz Krzysztofik wrote:
> Introduce a driver private structure and allocate it on device probe.
> Use it for storing nand_chip structure, GPIO descriptors prevoiusly
> stored in static variables as well as io_base pointer previously passed
> as nand controller
Hi Janusz,
On Thu, 19 Jul 2018 01:57:02 +0200
Janusz Krzysztofik wrote:
> Implement the idea suggested by Artem Bityutskiy and Tony Lindgren
> described in commit b027274d2e3a ("mtd: ams-delta: fix
> request_mem_region() failure").
Thanks for doing that. I'll review the patches, but I already h
Hello, Takashi
I think use our patch, it's NOT possible that the returned size is over
sgbuf->tblsize.
In function snd_malloc_sgbuf_pages,
Pages is align page,
sgbuf->tblsize is align 32*page,
chunk is align 2^n*page,
in our panic case, pages = 123, tlbsize = 128,
1st loop trunk = 32
2nd lo
From: Randy Dunlap
Make the "defconfig" target valid for arch/h8300. Currently
"make ARCH=h8300 defconfig" produces:
*** Can't find default configuration "arch/h8300/defconfig"!
../scripts/kconfig/Makefile:87: recipe for target 'defconfig' failed
By adding a value for KBUILD_DEFCONFIG, "make A
On 2018-07-01 19:23, Manivannan Sadhasivam wrote:
> Add Actions Semiconductor Owl family S900 I2C driver.
>
> Signed-off-by: Manivannan Sadhasivam
> ---
> drivers/i2c/busses/Kconfig | 7 +
> drivers/i2c/busses/Makefile | 1 +
> drivers/i2c/busses/i2c-owl.c | 504 ++
On Wed 18 Jul 22:18 PDT 2018, Rajendra Nayak wrote:
> commit '8c1b7dc9b: firmware: qcom: scm: Expose download-mode control'
> added support for download-mode control using the scm firmware
> driver for platforms which require a secure call to write the magic
> cookie into the tcsr location.
>
> F
On 19-Jul-18 04:54, Krzysztof Kozlowski wrote:
> The driver supports multiple hardware variants of Exynos I2C controller
> which differ in FIFO depth, handling of interrupts and bus recovery in
> HSI2C_MASTER_ST_LOSE state.
>
> The difference in variant was a single bit set for Exynos7 variants an
Hi, Pavel
I am sorry, I didn't point out typo clearly in the previous version.
Please see the concerns below. ;-)
At 07/18/2018 10:22 AM, Pavel Tatashin wrote:
During boot tsc is calibrated twice: once in tsc_early_delay_calibrate(),
and the second time in tsc_init().
Rename tsc_early_delay_ca
Hi Scott,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on phy/next]
[also build test ERROR on v4.18-rc5]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Scott-Telfor
From: Kunihiko Hayashi
Add clock control for SPI controller on UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Masahiro Yamada
---
drivers/clk/uniphier/clk-uniphier-peri.c | 9 +
drivers/clk/uniphier/clk-uniphier-sys.c | 8
2 files changed, 17 insertions(+)
di
Hi Rick,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.18-rc5]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Rick-Edge
On Wed, Jul 18, 2018 at 08:25:26AM +0100, Colin King wrote:
> From: Colin Ian King
Looks good to me, thank you very much.
Hao
>
> Trivial fix to two spelling mistakes
> "execeeded" -> "exceeded"
> "Invaild" -> "Invalid"
>
> Signed-off-by: Colin Ian King
> ---
>
> V2: Fix spelling mistakes i
commit '8c1b7dc9b: firmware: qcom: scm: Expose download-mode control'
added support for download-mode control using the scm firmware
driver for platforms which require a secure call to write the magic
cookie into the tcsr location.
For platforms which *do not* need an scm call and where the kernel
> The checks in proc are moot if we guarantee the non-NULL card at
> snd_timer_new() in the above.
> So it's not about fixing in sound module. It serves right. Your
> patch would add a sanity check to catch a buggy code in the caller
> side.
You are right Takashi, as you said this changes w
There is a race window in device_shutdown(), which may cause
-1. parent device shut down before child or
-2. no shutdown on a new probing device.
For 1st, taking the following scenario:
device_shutdownnew plugin device
list_del_init(parent_dev);
spin_unlock(lis
PTR_RET is deprecated, use PTR_ERR_OR_ZERO instead.
Signed-off-by: Gustavo A. R. Silva
---
arch/s390/hypfs/hypfs_diag.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/s390/hypfs/hypfs_diag.c b/arch/s390/hypfs/hypfs_diag.c
index a2945b2..3452e18 100644
--- a/arch/s39
PTR_RET is deprecated, use PTR_ERR_OR_ZERO instead.
Signed-off-by: Gustavo A. R. Silva
---
drivers/s390/block/dasd_eckd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/s390/block/dasd_eckd.c b/drivers/s390/block/dasd_eckd.c
index bbf95b7..c5a5551 100644
--- a/driver
PTR_RET is deprecated, use PTR_ERR_OR_ZERO instead.
Signed-off-by: Gustavo A. R. Silva
---
drivers/s390/char/tape_class.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/s390/char/tape_class.c b/drivers/s390/char/tape_class.c
index e403edf..b58df0d 100644
--- a/driver
On 18 July 2018 at 01:01, Eddie James wrote:
> From: "eaja...@linux.vnet.ibm.com"
>
> Signed-off-by: Eddie James
Acked-by: Joel Stanley
> ---
> MAINTAINERS | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index fcefb7a..613fd52 100644
> --- a/MAIN
On 18 July 2018 at 01:00, Eddie James wrote:
> This series adds an algorithm for an I2C master physically located on an FSI
> slave device. The I2C master has multiple ports, each of which may be
> connected
> to an I2C slave. Access to the I2C master registers is achieved over FSI bus.
>
> Due t
PTR_RET is deprecated, use PTR_ERR_OR_ZERO instead.
Signed-off-by: Gustavo A. R. Silva
---
drivers/s390/crypto/ap_bus.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/s390/crypto/ap_bus.c b/drivers/s390/crypto/ap_bus.c
index c0a6723..bf27fc4 100644
--- a/drivers/
Dave Hansen writes:
> On 07/17/2018 08:25 PM, Huang, Ying wrote:
>>> Seriously, though, does it hurt us to add a comment or two to say
>>> something like:
>>>
>>> /*
>>> * Should not even be attempting cluster allocations when
>>> * huge page swap is disabled. Warn and fail the all
On Mon, Jul 16, 2018 at 10:22 AM, Eric Biggers wrote:
> On Sun, Jul 15, 2018 at 08:56:57PM -0700, Kees Cook wrote:
>> In the quest to remove all stack VLA usage from the kernel[1], this
>> removes the discouraged use of AHASH_REQUEST_ON_STACK by switching to
>> shash directly and allocating the de
On Thu, 2018-07-19 at 11:58 +0930, Andrew Jeffery wrote:
> > > I agree
> > > that not using /dev/mem is a good thing, but there are several ways
> > > you could do that independent of any DT binding.
> >
> > Such as ? The only other option is to have one or more kernel drivers
> > that have built-
Hi Peter, Josh,
Found following bug. This bug can not be seen with this fix:
https://lkml.org/lkml/2018/5/10/280.
Here unwind_next_frame+0x463 is pointing at: "*ip = regs->ip;" in
deref_stack_iret_regs().
[ 2505.084076] BUG: KASAN: stack-out-of-bounds in
unwind_next_frame+0x463/0x850
[ 25
On Tue, 17 Jul 2018, Nicolas Pitre wrote:
> But still, if nr > 2 that means you need a temporary storage because the
> destination memory has to be preserved before the source memory can be
> moved there, and that destination memory content cannot be stored in the
> vacated source memory until
On 18-07-18, 20:20, Paul Cercueil wrote:
> Hi,
>
> This is the version 2 of my jz4780-dma driver update patchset.
why is this not send to dmaengine mailing list? Please post on that as
well
>
> Changelog:
>
> - All documentation changes have been moved to one single patch [01/17].
>
> - The n
On 2018-07-19 01:14, Bjorn Helgaas wrote:
This is a v3 of Oza's patches [1]. It's available at [2] if you prefer
git.
v3 changes:
- Add pci_aer_clear_fatal_status() to clear ERR_FATAL bits, only
called
from pcie_do_fatal_recovery(). Moved to first in series to avoid a
window where
> Add support for the Zodiac Inflight Innovations CFU1
> board (VF610-based).
>
> Cc: Shawn Guo
> Cc: Fabio Estevam
> Cc: cphe...@gmail.com
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: devicet...@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Andrew Lunn
> Signed-off-by:
piaojun wrote on Thu, Jul 19, 2018:
> > piaojun wrote on Wed, Jul 18, 2018:
> > That's not a fast path operation, I don't mind changing things but I'd
> > like to understand why - these functions are only ever called at unmount
> > time or when something happens on the virtio bus (probe will happen
On 19-07-18, 11:26, Shawn Guo wrote:
> On Thu, Jul 19, 2018 at 08:54:54AM +0530, Viresh Kumar wrote:
> > On 19-07-18, 11:20, Shawn Guo wrote:
> > > On Wed, Jul 18, 2018 at 02:54:49PM +0800, Anson Huang wrote:
> > > > Commit b97872d4eb22 ("ARM: dts: imx: Add missing OPP properties for
> > > > CPUs"
On Thu, Jul 19, 2018 at 08:54:54AM +0530, Viresh Kumar wrote:
> On 19-07-18, 11:20, Shawn Guo wrote:
> > On Wed, Jul 18, 2018 at 02:54:49PM +0800, Anson Huang wrote:
> > > Commit b97872d4eb22 ("ARM: dts: imx: Add missing OPP properties for CPUs")
> > > added "operating-points" property for all CPUs
On 19-07-18, 11:20, Shawn Guo wrote:
> On Wed, Jul 18, 2018 at 02:54:49PM +0800, Anson Huang wrote:
> > Commit b97872d4eb22 ("ARM: dts: imx: Add missing OPP properties for CPUs")
> > added "operating-points" property for all CPUs, but missed i.MX7D's cpu0,
> > this patch adds it.
> >
> > Fixes: b9
On Wed, Jul 18, 2018 at 02:54:49PM +0800, Anson Huang wrote:
> Commit b97872d4eb22 ("ARM: dts: imx: Add missing OPP properties for CPUs")
> added "operating-points" property for all CPUs, but missed i.MX7D's cpu0,
> this patch adds it.
>
> Fixes: b97872d4eb22 ("ARM: dts: imx: Add missing OPP prope
On Thu, Jul 19, 2018 at 02:32:06AM +0200, Frederic Weisbecker wrote:
> On Wed, Jul 11, 2018 at 06:03:42PM +0100, David Woodhouse wrote:
> > On Wed, 2018-07-11 at 09:49 -0700, Paul E. McKenney wrote:
> > > And here is an updated v4.15 patch with Marius's Reported-by and David's
> > > fix to my lost
On Wed, Jul 18, 2018 at 6:18 PM, kbuild test robot wrote:
> Hi Todd,
>
> Thank you for the patch! Yet something to improve:
>
> [auto build test ERROR on staging/staging-testing]
> [also build test ERROR on next-20180718]
> [cannot apply to v4.18-rc5]
> [if your patch is
On Tue, Jul 17, 2018 at 02:55:24PM +0530, Jagan Teki wrote:
> This patch adds parallel display support for i.MX6DL Mamoj board
> along with relevant backlight through pwm.
>
> LCD power sequence is added by 'Michael Trimarchi'.
>
> Signed-off-by: Simone CIANNI
> Signed-off-by: Raffaele RECALCATI
Arguments of 'pin' subcommand should be checked
at the very beginning of do_pin_any().
Otherwise segfault errors can occur when using
'map pin' or 'prog pin' commands, so fix it.
# bpftool prog pin id
Segmentation fault
Fixes: 71bb428fe2c1 ("tools: bpf: add bpftool")
Reviewed-by: Jakub Kicins
On Wed, Jul 18, 2018 at 12:57:21PM +0200, Sebastian Andrzej Siewior wrote:
> On 2018-07-16 17:37:27 [-0700], Shaohua Li wrote:
> > On Mon, Jul 16, 2018 at 02:27:40PM +0200, Sebastian Andrzej Siewior wrote:
> > > On 2018-07-03 22:01:36 [+0200], To linux-kernel@vger.kernel.org wrote:
> > > > From: An
On Mon, Jul 16, 2018 at 09:06:51PM -0700, Andrey Smirnov wrote:
> Add support for Zodiac Inflight Innovations SSMB SPU3
> board (VF610-based).
>
> Cc: Shawn Guo
> Cc: Fabio Estevam
> Cc: cphe...@gmail.com
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: devicet...@vger.kernel.org
> Cc: linux-ker
On 18-07-18, 16:34, Wei Xu wrote:
> Hi Viresh,
>
> On 2018/7/5 6:09, Viresh Kumar wrote:
> > Hi,
> >
> > This is an attempt to fix the broken or partially defined DT bindings
> > for cooling-maps. We should list every device that participates in
> > cooling down at a certain trip point, instead o
Hi,
This patch series adds a driver and DT binding using the interconnect (ICC)
framework [1] to describe the Qualcomm SDM845 platform's topology of its
interconnected buses and internal aggregation nodes known as
Bus Clock Managers(BCM). The SDM845 ICC provider driver would aggregate and
satisfy
Add RSC(Resource State Coordinator) provider
dictating network-on-chip interconnect bus performance
found on SDM845-based platforms.
Signed-off-by: David Dai
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
---
.../bindings/interconnect/qcom-sdm845.txt | 22 +
drivers/interconnect/qcom/Kconfig | 8 +
drivers/interconnect/qcom/Makefile | 1 +
dr
> > I agree
> > that not using /dev/mem is a good thing, but there are several ways
> > you could do that independent of any DT binding.
>
> Such as ? The only other option is to have one or more kernel drivers
> that have built-in the precise and complete list of those tunables that
> need to be
Hi Boris,
After merging the nand tree, today's linux-next build (x86_64
allmodconfig) produced this warning:
In file included from include/linux/platform_device.h:14:0,
from drivers/mtd/nand/raw/jz4740_nand.c:19:
drivers/mtd/nand/raw/jz4740_nand.c: In function 'jz_nand_detect_ban
Hi Dominique,
On 2018/7/18 17:54, Dominique Martinet wrote:
> piaojun wrote on Wed, Jul 18, 2018:
>> spin_lock is more effective for short time protection than mutex_lock, as
>> mutex lock may cause process sleep and wake up which consume much cpu
>> time.
>
> That's not a fast path operation, I
On Tue, Jul 17, 2018 at 11:28:46AM +0800, Anson Huang wrote:
> GPC registers are NOT continuous, some registers are
> reserved and accessing them from userspace will trigger
> external abort, add regmap register access table to
> avoid below abort:
>
> root@imx6slevk:~# cat /sys/kernel/debug/regma
On Wed, Jul 18, 2018 at 2:10 PM, Laura Abbott wrote:
>
> Implementation of stackleak based heavily on the x86 version
>
> Signed-off-by: Laura Abbott
> ---
> Since last time: Minor style cleanups. Re-wrote check_alloca to
> correctly handle all stack types. While doing that, I also realized
> cur
There is a potential execution path in which function
platform_get_resource() returns NULL. If this happens,
we will end up having a NULL pointer dereference.
Fix this by adding a sanity check in order to avoid a
NULL pointer dereference.
This code was detected with the help of Coccinelle.
Cc: s
There is a potential execution path in which function
platform_get_resource() returns NULL. If this happens,
we will end up having a NULL pointer dereference.
Fix this by adding asanity check in order to avoid a
NULL pointer dereference.
This code was detected with the help of Coccinelle.
Cc: st
On Thu, 19 Jul 2018, at 04:37, Rob Herring wrote:
> On Tue, Jul 17, 2018 at 5:28 PM Andrew Jeffery wrote:
> >
> > On Tue, 17 Jul 2018, at 14:26, Benjamin Herrenschmidt wrote:
> > > On Mon, 2018-07-16 at 07:55 -0600, Rob Herring wrote:
> > > > If that data is one set per SoC, then i'm not that conc
David Howells writes:
> Andy Lutomirski wrote:
>
>> > Also you can't currently directly create a bind mount from userspace as you
>> > can only bind from another path point - which you may not be able to access
>> > (either by permission failure or because it's not in your mount namespace).
>> >
Hi Todd,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on staging/staging-testing]
[also build test ERROR on next-20180718]
[cannot apply to v4.18-rc5]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
On Tue, Jul 17, 2018 at 05:59:27PM -0400, Waiman Long wrote:
> On a VM with only 1 vCPU, the locking fast path will always be
> successful. In this case, there is no need to use the the PV qspinlock
> code which has higher overhead on the unlock side than the native
> qspinlock code.
Why not make
Hi There !
Is this email address correct?
Reply for important info .
Thank You
Thanks, we will run the test with your patch, will update the test results in
24 Hours.
Current status is:
We can reproduce the issue in 3000 cycles stress S/R test, we can't reproduce
the kernel panic with our patch in 6000 cycles.
-Original Message-
From: Takashi Iwai
Sent: Wednesda
Add support for the Zodiac Inflight Innovations CFU1
board (VF610-based).
Cc: Shawn Guo
Cc: Fabio Estevam
Cc: cphe...@gmail.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrew Lunn
Signed-off-by: Andrey Smirnov
---
Hi Andrey,
On Wed, Jul 18, 2018 at 9:51 PM, Andrey Smirnov
wrote:
> It's not used in Linux, but I do rely on it in Barebox here:
>
> https://git.pengutronix.de/cgit/barebox/tree/arch/arm/boards/zii-vf610-dev/board.c#n94
>
> and here:
>
> https://git.pengutronix.de/cgit/barebox/tree/arch/arm/boar
On Wed, Jul 18, 2018 at 3:50 PM Fabio Estevam wrote:
>
> Hi Andrey,
>
> On Tue, Jul 17, 2018 at 1:06 AM, Andrey Smirnov
> wrote:
>
> > +/dts-v1/;
> > +#include "vf610.dtsi"
> > +
> > +/ {
> > + model = "ZII VF610 SSMB SPU3 Board";
> > + compatible = "zii,vf610spu3", "zii,vf610dev", "f
On Wed, Jul 11, 2018 at 06:03:42PM +0100, David Woodhouse wrote:
> On Wed, 2018-07-11 at 09:49 -0700, Paul E. McKenney wrote:
> > And here is an updated v4.15 patch with Marius's Reported-by and David's
> > fix to my lost exclamation point.
>
> Thanks. Are you sending the original version of that
On Wed, Jul 18, 2018 at 01:17:00PM -0700, Paul E. McKenney wrote:
> On Wed, Jul 18, 2018 at 09:41:05PM +0200, David Woodhouse wrote:
> >
> >
> > On Wed, 2018-07-18 at 09:37 -0700, Paul E. McKenney wrote:
> > > On Wed, Jul 18, 2018 at 06:01:51PM +0200, David Woodhouse wrote:
> > > >
> > > > On We
On 2018-07-18 11:04, Douglas Anderson wrote:
Add both the interface and core clock.
Signed-off-by: Douglas Anderson
---
drivers/clk/qcom/gcc-sdm845.c | 73 +++
1 file changed, 73 insertions(+)
diff --git a/drivers/clk/qcom/gcc-sdm845.c
b/drivers/clk/qcom/gcc-
On 14 July 2018 at 00:30, Olof Johansson wrote:
> Not all toolchains have the baremetal elf targets, RedHat/Fedora ones
> in particular. So, probe for whether it's available and use the previous
> (linux) targets if it isn't.
>
> Reported-by: Laura Abbott
> Cc: Paul Kocialkowski
> Signed-off-by:
Dear Greg,
This is extcon-next pull request for v4.19. I add detailed description of
this pull request on below. Please pull extcon with following updates.
Best Regards,
Chanwoo Choi
The following changes since commit ce397d215ccd07b8ae3f71db689aedb85d56ab40:
Linux 4.18-rc1 (2018-06-17 08:04
On 07/17/2018 04:20 AM, Kirill A. Shutemov wrote:
> arch/x86/include/asm/mktme.h | 8 +
> arch/x86/mm/init_64.c| 10 +
> arch/x86/mm/mktme.c | 437 +++
> 3 files changed, 455 insertions(+)
I'm not the maintainer. But, NAK from me on this on the
On Wed, 2018-07-18 at 13:50 -0600, Rob Herring wrote:
>
> > So Rob, I think that's precisely where the disconnect is.
> >
> > I think we all (well hopefully) agree that those few tunables don't fit
> > in any existing subystem and aren't likely to ever do (famous last
> > words...).
> >
> > Wher
Initialize NWP GPIO pin low to protect the device from hazard during
probe. Release write protection as soon as the device is under
control.
Signed-off-by: Janusz Krzysztofik
---
drivers/mtd/nand/raw/ams-delta.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/driv
In its current shape, the driver sets data port direction before each
byte read/write operation, even during multi-byte transfers. Optimize
that by setting the port direction only on first byte of each transfer.
Signed-off-by: Janusz Krzysztofik
---
drivers/mtd/nand/raw/ams-delta.c | 42 +++
This should make applications utilizing whole banks work faster.
Signed-off-by: Janusz Krzysztofik
---
drivers/gpio/gpio-omap.c | 88 ++--
1 file changed, 86 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.
Don't readw()/writew() data directly from/to GPIO port which is under
control of gpio-omap driver, use GPIO chip callbacks instead.
Thanks to utilization of get/set_multiple() callbacks, performance
degrade is minor for typical data transfers.
The driver should now work with any 8+-bit bidirectio
Further optimize processing speed of read/write callback functions by
resolving private structure pointer only once per callback and passing
it to all subfunctions instead of mtd_info.
Signed-off-by: Janusz Krzysztofik
---
drivers/mtd/nand/raw/ams-delta.c | 44 +++
Data port used by the driver is actually an OMAP MPUIO device, already
under control of gpio-omap driver. For that reason we used to not
request the memory region of the port as that would fail because the
region is already busy. Despite that, we are still accessing the port
by just ioremapping i
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