On Fri, Jul 28, 2017 at 04:25:03PM -0600, Tyler Baicar wrote:
> Currently we acknowledge errors before clearing the error status.
> This could cause a new error to be populated by firmware in-between
> the error acknowledgment and the error status clearing which would
> cause the second error's sta
On Fri, Jul 28, 2017 at 10:54:30AM -0700, Florian Fainelli wrote:
> On 07/28/2017 07:44 AM, Corentin Labbe wrote:
> > On Fri, Jul 28, 2017 at 04:36:00PM +0200, Andrew Lunn wrote:
> I've probably asked this before: Does the internal PHY use a different
> PHY ID in registers 2 and 3?
>
On Fri, Jul 28, 2017 at 06:50:56PM +, Kani, Toshimitsu wrote:
> This simply sets NULL to pvt, and does not initialize ghes_pvt.
Yeah, I guess we need this ontop:
---
diff --git a/drivers/edac/ghes_edac.c b/drivers/edac/ghes_edac.c
index ecd34b8bd27e..e158bf4ee337 100644
--- a/drivers/edac/ghe
The net_protocol structure is only passed as the first argument to
inet_add_protocol or inet_del_protocol, both of which are declared
as const. Thus the net_protocol structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
s
The net_protocol structure is only passed as the first argument to
inet_add_protocol or inet_del_protocol, both of which are declared
as const. Thus the net_protocol structure itself can be const.
Done with the help of Coccinelle.
---
net/ipv4/af_inet.c |4 ++--
net/l2tp/l2tp_ip.c |2 +
The net_protocol structures are only passed as the first argument to
inet_add_protocol, which is declared as const. Thus the net_protocol
structures themselves can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct net_protoc
On Sat, 2017-07-29 at 04:48 +0200, Mike Galbraith wrote:
> ttwu asm delta says "measure me".
q/d measurement with pipe-test
+cgroup_disable=memory
2.241926 usecs/loop -- avg 2.242376 891.9 KHz 1.000
+patchset
2.284428 usecs/loop -- avg 2.357621 848.3 KHz .951
-cgroup_disable=memory
2.257433 u
The mmc_host_ops structure is only stored in the ops field of an
mmc_host structure, which is declared as const. Thus the mmc_host_ops
structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct mmc_host_ops i@p =
The mmc_host_ops structure is only stored in the ops field of an
mmc_host structure, which is declared as const. Thus the mmc_host_ops
structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct mmc_host_ops i@p =
The mmc_host_ops structure is only stored in the ops field of an
mmc_host structure, which is declared as const. Thus the mmc_host_ops
structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct mmc_host_ops i@p =
The mmc_host_ops structure is only stored in the ops field of an
mmc_host structure, which is declared as const. Thus the mmc_host_ops
structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct mmc_host_ops i@p =
The mmc_host_ops structure is only stored in the ops field of an
mmc_host structure, which is declared as const. Thus the mmc_host_ops
structure itself can be const.
Done with the help of Coccinelle.
---
drivers/mmc/host/bcm2835.c |2 +-
drivers/mmc/host/davinci_mmc.c |2 +-
drive
The mmc_host_ops structure is only stored in the ops field of an
mmc_host structure, which is declared as const. Thus the mmc_host_ops
structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct mmc_host_ops i@p =
The mmc_host_ops structure is only stored in the ops field of an
mmc_host structure, which is declared as const. Thus the mmc_host_ops
structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct mmc_host_ops i@p =
The mmc_host_ops structure is only stored in the ops field of an
mmc_host structure, which is declared as const. Thus the mmc_host_ops
structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct mmc_host_ops i@p =
The mmc_host_ops structure is only stored in the ops field of an
mmc_host structure, which is declared as const. Thus the mmc_host_ops
structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct mmc_host_ops i@p =
The mmc_host_ops structure is only stored in the ops field of an
mmc_host structure, which is declared as const. Thus the mmc_host_ops
structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct mmc_host_ops i@p =
The mmc_host_ops structure is only stored in the ops field of an
mmc_host structure, which is declared as const. Thus the mmc_host_ops
structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct mmc_host_ops i@p =
The mmc_host_ops structure is only stored in the ops field of an
mmc_host structure, which is declared as const. Thus the mmc_host_ops
structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct mmc_host_ops i@p =
The mmc_host_ops structure is only stored in the ops field of an
mmc_host structure, which is declared as const. Thus the mmc_host_ops
structure itself can be const.
Done with the help of Coccinelle.
//
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct mmc_host_ops i@p =
We had disscuss the idea here:
https://www.spinics.net/lists/kvm/msg140593.html
I think it's also suitable for other architectures.
If the vcpu(me) exit due to request a usermode spinlock, then
the spinlock-holder may be preempted in usermode or kernmode.
But if the vcpu(me) is in kernmode, then
On Thu, 27 Jul 2017, Gustavo A. R. Silva wrote:
> Coccinelle script to remove unnecessary static on local variables when
> the variables are not used before update.
>
> Signed-off-by: Gustavo A. R. Silva
Acked-by: Julia Lawall
> ---
> scripts/coccinelle/misc/static_unnecessary.cocci | 89
>
Hi Dima,
[auto build test WARNING on v4.12]
[cannot apply to cgroup/for-next linus/master v4.13-rc2 v4.13-rc1 next-20170728]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Dima-Zavin/cpuset-fix
Split out the priority inheritance support to a file of its own
to make futex.c much smaller, easier to understand and, hopefully,
to maintain. This also makes it easy to preserve basic futex support
and compile out the PI support when RT mutexes are not available.
Signed-off-by: Nicolas Pitre
d
From: Srinath Mannam
Add DT nodes for SATA host controllers and SATA PHYs
on Stingray SoC
Signed-off-by: Srinath Mannam
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
.../boot/dts/broadcom/stingray/bcm958742-base.dtsi | 64 +
.../boot/dts/broadcom/stingray/stingray-sata.dtsi | 278
From: Anup Patel
This patch adds Broadcom SBA-RAID DT nodes for Stingray SoC.
The Stingray SoC has total 32 SBA-RAID FlexRM rings and it has
8 CPUs so we create 8 SBA-RAID instances (one for each CPU).
This way Linux DMAENGINE will have one SBA-RAID DMA device for
each CPU.
Signed-off-by: Anup
From: Anup Patel
We have two instances of FlexRM on Stingray. One for SBA RAID
offload engine and another for SPU2 Crypto offload engine.
This patch adds FlexRM mailbox controller DT nodes for Stingray.
Signed-off-by: Anup Patel
Signed-off-by: Raveendra Padasalagi
---
.../boot/dts/broadcom/s
From: Anup Patel
We have 8 instances of sp804 in Stingray SoC. Let's enable
it in Stingray DT.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
.../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 87 ++
1 file changed, 87 insertions(+)
diff
This patch adds DT node to enable BGMAC driver on Stingray
Signed-off-by: Abhishek Shah
Reviewed-by: Ray Jui
Reviewed-by: Oza Oza
Reviewed-by: Scott Branden
---
arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi | 14 ++
arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts
From: Srinath Mannam
Added MDIO multiplexer iproc DT node for Stingray, which contains
the child nodes of PCIe serdes, RGMII, SATA and USB phy MDIO slaves.
Signed-off-by: Srinath Mannam
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
.../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 3
This is round two of adding DT nodes for Stingray SoC.
Corresponding drivers and dt binding documents are already
checked in the kernel and will be present in v4.14.
Abhishek Shah (1):
arm64: dts: Add DT node to enable BGMAC driver on Stingray
Anup Patel (3):
arm64: dts: Add sp804 DT nodes fo
From: Velibor Markovski
This patch enables stats for CCN-502 interconnect on Stingray.
Signed-off-by: Velibor Markovski
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64
Michal Hocko wrote:
> On Fri 28-07-17 22:55:51, Tetsuo Handa wrote:
> > Michal Hocko wrote:
> > > On Fri 28-07-17 22:15:01, Tetsuo Handa wrote:
> > > > task_will_free_mem(current) in out_of_memory() returning false due to
> > > > MMF_OOM_SKIP already set allowed each thread sharing that mm to selec
Hi Robin,
I am seeing a crash when performing very basic testing on this series
with a Mellanox CX4 NIC. I dug into the crash a bit, and think this
patch is the culprit, but this rcache business is still mostly
witchcraft to me.
# ifconfig eth5 up
# ifconfig eth5 down
Unable to handle kernel
Dear Friend,I would like to discuss a very important issue with you. I am
writing to find out if this is your valid email. Please let me know if this
email is valid Regards
Adrien Saif
Attorney to Quatif Group of Companies
On Fri, Jul 28, 2017 at 07:59:12PM +, Levin, Alexander (Sasha Levin) wrote:
> On Fri, Jul 28, 2017 at 01:57:20PM -0500, Josh Poimboeuf wrote:
> >Thanks, that's much better. I'm relieved the unwinder didn't screw that
> >up, at least.
> >
> >This looks like a tricky one. Is it easily recreatab
On Thu, Jul 27, 2017 at 11:46 PM, Viresh Kumar wrote:
> On many platforms, CPUs can do DVFS across cpufreq policies. i.e CPU
> from policy-A can change frequency of CPUs belonging to policy-B.
>
> This is quite common in case of ARM platforms where we don't
> configure any per-cpu register.
>
> Ad
On Fri, 2017-07-28 at 12:20 +0300, Sergei Shtylyov wrote:
> > +Required properties:
> > + - compatible : Must be "mediatek,ahci".
> > + - reg: Physical base addresses and length of register
> > sets.
> > + - interrupts : Interrupt associated with the SATA device.
>
> On Jul 25, 2017, at 7:55 AM, Peter Zijlstra wrote:
>
>> On Thu, Jul 13, 2017 at 11:19:11AM +0200, Ingo Molnar wrote:
>>
>> * Peter Zijlstra wrote:
>>
One gloriously ugly hack would be to delay the userspace unwind to
return-to-userspace, at which point we have a schedulable context an
On Sat, 2017-07-29 at 04:48 +0200, Mike Galbraith wrote:
> On Thu, 2017-07-27 at 11:30 -0400, Johannes Weiner wrote:
> >
> > Structure
> >
> > The first patch cleans up the different loadavg callsites and macros
> > as the memdelay averages are going to be tracked using these.
> >
> > The second
On Thu, 2017-07-27 at 11:30 -0400, Johannes Weiner wrote:
>
> Structure
>
> The first patch cleans up the different loadavg callsites and macros
> as the memdelay averages are going to be tracked using these.
>
> The second patch adds a distinction between page cache transitions
> (inactive list
When I set the timeout to a specific value such as 500ms, the timeout
event will not happen in time due to the overflow in function
check_msg_timeout:
...
ent->timeout -= timeout_period;
if (ent->timeout > 0)
return;
...
The type of timeout_period is long, but ent->
On Fri, 28 Jul 2017, Zdenek Kabelac wrote:
> Dne 28.7.2017 v 20:33 Alan Stern napsal(a):
> > On Thu, 27 Jul 2017, Zdenek Kabelac wrote:
> >
> >>> Zdenek, you check this explanation by commenting out these last two
> >>> lines at the end of hub_port_connect() in drivers/usb/core/hub.c:
> >>>
> >>>
From: Alexandru Gagniuc
Date: Fri, 28 Jul 2017 15:07:03 -0700
> Before the GMAC on the Anarion chip can be used, the PHY interface
> selection must be configured with the DWMAC block in reset.
>
> This layer covers a block containing only two registers. Although it
> is possible to model this as
On Fri, 28 Jul 2017 17:06:53 + (UTC)
Mathieu Desnoyers wrote:
> - On Jul 28, 2017, at 12:46 PM, Peter Zijlstra pet...@infradead.org wrote:
>
> > On Fri, Jul 28, 2017 at 03:38:15PM +, Mathieu Desnoyers wrote:
> >> > Which only leaves PPC stranded.. but the 'good' news is that mpe sa
From: Julia Lawall
Date: Fri, 28 Jul 2017 22:18:56 +0200
> The inet6_protocol structure is only passed as the first argument to
> inet6_add_protocol or inet6_del_protocol, both of which are declared as
> const. Thus the inet6_protocol structure itself can be const.
>
> Done with the help of Coc
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 0a07b238e5f488b459b6113a62e06b6aab017f71
commit: 6974f0c4555e285ab217cee58b6e874f776ff409 include/linux/string.h: add
the option of fortified string.h functions
date: 2 weeks ago
config: x86_64-randconfig-
On Thu, Jul 27, 2017 at 3:38 PM, Florian Fainelli wrote:
> The Broadcom STB platforms support S5 and we allow specific hardware
> wake-up events to take us out of this state. Because we were not
> defining an irq_pm_shutdown() function pointer, we would not be
> correctly masking non-wakeup events
On Fri, 2017-07-28 at 15:30 -0700, Linus Torvalds wrote:
> So we'd have files like "rdma", "dma", "omap", "pm", "dri", "pci",
> "wireless" etc, all of which sound sane.
[]
> it looks like a promising approach to me, and I like how
> the names seem to end up all fairly sane.
>
> Comments?
Seems so
El Fri, Jul 28, 2017 at 07:55:21PM -0500 Josh Poimboeuf ha dit:
> On Fri, Jul 28, 2017 at 05:38:52PM -0700, Matthias Kaehlcke wrote:
> > El Thu, Jul 20, 2017 at 03:56:52PM -0500 Josh Poimboeuf ha dit:
> >
> > > On Thu, Jul 20, 2017 at 06:30:24PM +0300, Andrey Ryabinin wrote:
> > > > FWIW bellow i
Before I skipped null checks when the master is in the STOP state; this
fixes that.
Signed-off-by: Brendan Higgins
---
drivers/i2c/busses/i2c-aspeed.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c
index
On Fri, Jul 28, 2017 at 07:55:21PM -0500, Josh Poimboeuf wrote:
> +#define ASM_CALL(str, outputs, inputs, clobbers...) \
> + asm volatile(str : outputs : inputs : "sp", ## clobbers)
And note this part isn't right, the sp should be in the output operands.
--
Josh
On Fri, Jul 28, 2017 at 05:38:52PM -0700, Matthias Kaehlcke wrote:
> El Thu, Jul 20, 2017 at 03:56:52PM -0500 Josh Poimboeuf ha dit:
>
> > On Thu, Jul 20, 2017 at 06:30:24PM +0300, Andrey Ryabinin wrote:
> > > FWIW bellow is my understanding of what's going on.
> > >
> > > It seems clang treats l
Daniel Vetter writes:
> On Tue, Jul 25, 2017 at 11:27:16AM -0700, Eric Anholt wrote:
>> Chris Wilson pointed out this little cleanup in a review of new code,
>> so let's fix up the code I was copying from.
>>
>> Signed-off-by: Eric Anholt
>
> Reviewed-by: Daniel Vetter
Thanks! With Chris's r
El Thu, Jul 20, 2017 at 03:56:52PM -0500 Josh Poimboeuf ha dit:
> On Thu, Jul 20, 2017 at 06:30:24PM +0300, Andrey Ryabinin wrote:
> > FWIW bellow is my understanding of what's going on.
> >
> > It seems clang treats local named register almost the same as ordinary
> > local variables.
> > The on
The TPS68470 device is an advanced power management
unit that powers a Compact Camera Module (CCM),
generates clocks for image sensors, drives a dual
LED for Flash and incorporates two LED drivers for
general purpose indicators.
This patch adds support for TPS68470 mfd device.
Signed-off-by: Rajm
This is the patch series for TPS68470 PMIC that works as a camera PMIC.
The patch series provide the following 3 drivers, to help configure the voltage
regulators, clocks and GPIOs provided by the TPS68470 PMIC, to be able to use
the camera sensors connected to this PMIC.
TPS68470 MFD driver:
T
The Kabylake platform coreboot (Chrome OS equivalent of
BIOS) has defined 4 operation regions for the TI TPS68470 PMIC.
These operation regions are to enable/disable voltage
regulators, configure voltage regulators, enable/disable
clocks and to configure clocks.
This config adds ACPI operation reg
This patch adds support for TPS68470 GPIOs.
There are 7 GPIOs and a few sensor related GPIOs.
These GPIOs can be requested and configured as
appropriate.
The GPIOs are also provided with descriptive names.
However, the typical use case is that the OS GPIO
driver will interact with TPS68470 GPIO dr
Hi Jaegeuk,
Could you take time to have a look at this? Is this change reasonable?
Thanks,
On 2017/7/26 22:33, Chao Yu wrote:
> From: Chao Yu
>
> Previously, in order to avoid losing important inode metadata after
> checkpoint & sudden power-off, f2fs uses synchronous approach for
> updating i
On 2017/7/29 3:41, Jaegeuk Kim wrote:
> Change log from v2:
> - add missing new features
> - fix print out features
>
> Change log from v1:
> - add /sys/fs/f2fs/dev/features
>
>>From cf512bfeed89d760138ade12014f17fc5779ca04 Mon Sep 17 00:00:00 2001
> From: Jaegeuk Kim
> Date: Fri, 21 Jul
Hi Yunlong,
On 2017/7/27 20:13, Yunlong Song wrote:
> v1->v2, fix some dead lock problems under some heavy load test
>
> On 2017/7/27 20:11, Yunlong Song wrote:
>> Let node writeback also do f2fs_balance_fs to ensure there are always enough
>> free
>> segments.
Could we cover __write_data_page
This #if 0 block has been commented out for years. Assume it is not
needed and remove it.
Signed-off-by: Dmitriy Cherkasov
---
drivers/staging/lustre/lustre/lov/lov_io.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/staging/lustre/lustre/lov/lov_io.c
b/drivers/staging/lustre/
On Fri, Jul 28, 2017 at 4:30 PM, Greg Kroah-Hartman
wrote:
> On Fri, Jul 28, 2017 at 07:27:02AM -0700, Andrey Smirnov wrote:
>> Greg,
>>
>> I am not sure if you are the right person to send these to, if you are
>> not, please let me know who would be the appropriate recepient and sorry for
>> the
On Fri, Jul 28, 2017 at 2:00 PM, Rick Altherr wrote:
> Is clk_fractional_divider from include/linux/clk-provider.h appropriate here?
>
Alas, no. clk_fractional_divider is not flexible enough to specify the
divider the
way that it is represented in the Aspeed 24xx/25xx parts which have the divider
On Fri, Jul 28, 2017 at 03:21:01PM +0200, Arnd Bergmann wrote:
> vboxvideo fails to link without genalloc:
>
> drivers/staging/vboxvideo/vbox_hgsmi.o: In function `hgsmi_buffer_alloc':
> vbox_hgsmi.c:(.text+0x1e): undefined reference to `gen_pool_dma_alloc'
> drivers/staging/vboxvideo/vbox_hgsmi.o
On 07/25/2017 03:06 PM, Jon Mason wrote:
> Cache related issues with DMA rings and performance issues related to
> caching are being caused by not properly setting the "dma-coherent" flag
> in the device tree entries. Adding it here to correct the issue.
>
> Signed-off-by: Jon Mason
> Fixes: 5fa
On Thu, Jul 20, 2017 at 05:56:36PM +0200, Marcus Wolf wrote:
> Fixes problem with division in rf69_set_deviation
>
> Fixes: 874bcba65f9a ("staging: pi433: New driver")
> Signed-off-by: Marcus Wolf
>
> diff --git a/drivers/staging/pi433/rf69.c b/drivers/staging/pi433/rf69.c
> --- a/drivers/stagin
On Thu, Jul 20, 2017 at 01:01:46PM +0200, Wolf Entwicklungen wrote:
> Declare rf69_set_dc_cut_off_frequency_intern as static since it
> is used internaly only
>
> Fixes: 874bcba65f9a ("staging: pi433: New driver")
> Signed-off-by: Marcus Wolf
>
> diff --git a/drivers/staging/pi433/rf69.c b/drive
On 07/18/2017 12:52 PM, Florian Fainelli wrote:
> On 07/06/2017 03:22 PM, Florian Fainelli wrote:
>> Hi,
>>
>> This patch series adds support for S2/S3/S5 suspend/resume states on
>> ARM and MIPS based Broadcom STB SoCs.
>>
>> This was submitted a long time ago by Brian, and I am now picking this
>
On Tue, Jul 18, 2017 at 02:03:58PM +0100, Colin King wrote:
> From: Colin Ian King
>
> The functions pi433_receive and pi433_tx_thread are local to the source
> and do not need to be in global scope, so make them static
>
> Cleans up sparse warnings:
> symbol 'pi433_receive' was not declared. Sh
The for_each_child_of_node macro itself maintains the correct reference
count of the nodes so the explicit of_node_put() call causes a warning:
[0.098960] OF: ERROR: Bad of_node_put() on /pmc@7000e400/powergates/xusba
[0.098981] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.11.3 #1-NixOS
[
On Sat, 29 Jul 2017, Ard Biesheuvel wrote:
>
>
> > On 28 Jul 2017, at 16:27, Nicolas Pitre wrote:
> >
> >> On Fri, 28 Jul 2017, Arnd Bergmann wrote:
> >>
> >> Matt Hart reports that vf610m4_defconfig kernels grew to 2GB
> >> xipImage size after the __bug_table change.
> >>
> >> I tried out a
Hi Andrew,
> -Original Message-
> From: Andrew Lunn [mailto:and...@lunn.ch]
> Sent: Saturday, July 29, 2017 12:49 AM
> To: Salil Mehta
> Cc: da...@davemloft.net; Zhuangyuzeng (Yisen); huangdaode; lipeng (Y);
> mehta.salil@gmail.com; net...@vger.kernel.org; linux-
> ker...@vger.kernel.o
On Tue, Jul 25, 2017 at 05:38:05PM +0200, Arnd Bergmann wrote:
> I ran into a build error with the new pi433 driver and
> CONFIG_SPI disabled:
>
> drivers/staging/pi433/pi433_if.o: In function `pi433_probe.part.6':
> pi433_if.c:(.text+0x1657): undefined reference to `spi_write_then_read'
> drivers
On 07/26/2017 01:01 PM, Eric Anholt wrote:
> BCM2837 is somewhat unusual in that we build its DT on both arm32 and
> arm64. Most devices are being run in arm32 mode.
>
> Having the body of the DT for 2837 separate from 2835/6 has been a
> source of pain, as we often need to make changes that span
Hi Andrew,
> -Original Message-
> From: linux-rdma-ow...@vger.kernel.org [mailto:linux-rdma-
> ow...@vger.kernel.org] On Behalf Of Andrew Lunn
> Sent: Saturday, July 29, 2017 12:29 AM
> To: Salil Mehta
> Cc: da...@davemloft.net; Zhuangyuzeng (Yisen); huangdaode; lipeng (Y);
> mehta.salil..
Hi Andrew,
> -Original Message-
> From: Andrew Lunn [mailto:and...@lunn.ch]
> Sent: Saturday, July 29, 2017 12:24 AM
> To: Salil Mehta
> Cc: da...@davemloft.net; Zhuangyuzeng (Yisen); huangdaode; lipeng (Y);
> mehta.salil@gmail.com; net...@vger.kernel.org; linux-
> ker...@vger.kernel.o
On Fri, Jul 28, 2017 at 11:26:51PM +0100, Salil Mehta wrote:
> +static const struct hns3_link_mode_mapping hns3_lm_map[] = {
> + {HNS3_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT, FLG},
> + {HNS3_LM_AUTONEG_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT, FLG},
> + {HNS3_LM_TP_BIT, ETHTOOL_LINK_MODE_T
Hi Lee,
> Subject: Re: [PATCH v4 1/3] mfd: Add new mfd device TPS68470
>
> On Tue, 25 Jul 2017, Mani, Rajmohan wrote:
>
> > Hi Lee,
> >
> > > Subject: Re: [PATCH v4 1/3] mfd: Add new mfd device TPS68470
> > >
> > > On Fri, 21 Jul 2017, Mani, Rajmohan wrote:
> > > > > On Wed, 19 Jul 2017, Rajmoha
On Fri, Jul 28, 2017 at 01:56:05PM +0200, Martijn Coenen wrote:
> When comparing the android common kernel branch with
> upstream, I found several differences.
>
> The "add padding" patch has long been applied in common,
> and shipping versions of Android userspace depends on this
> particular ali
On Fri, Jul 28, 2017 at 07:27:02AM -0700, Andrey Smirnov wrote:
> Greg,
>
> I am not sure if you are the right person to send these to, if you are
> not, please let me know who would be the appropriate recepient and sorry for
> the noise.
Why not the platform driver maintainer(s)? Doesn't
scrip
Hi Andy,
> Subject: Re: [PATCH v4 1/3] mfd: Add new mfd device TPS68470
>
> On Fri, Jul 28, 2017 at 3:30 AM, Mani, Rajmohan
> wrote:
> >> On Wed, Jul 26, 2017 at 11:23 AM, Lee Jones
> wrote:
> >> > On Tue, 25 Jul 2017, Andy Shevchenko wrote:
> >> >> On Tue, Jul 25, 2017 at 12:10 PM, Lee Jones
Add the usr/include subdirectory of the top-level tree to the include
path to fix build when cross compiling for ARM.
testptp.c: In function 'main':
testptp.c:289:15: error: 'struct ptp_clock_caps' has no member named
'cross_timestamping'
caps.cross_timestamping);
Signed-off-by: Grygor
On 07/19/2017 10:05 AM, Scott Branden wrote:
> Place northstar2 into its own subdirectory. This helps as the number
> of Broadcom boards grow and we can separate them per SoC.
>
> Signed-off-by: Scott Branden
Applied, thanks Scott.
--
Florian
> +int hclge_mac_mdio_config(struct hclge_dev *hdev)
> +{
..
> +}
> +
> +int hclge_mac_start_phy(struct hclge_dev *hdev)
> +{
> +}
> +
> +void hclge_mac_stop_phy(struct hclge_dev *hdev)
> +{
> +}
> --
These are not static functions. So i would expect them to be in a
header file somewhere
> +static void hclge_mac_adjust_link(struct net_device *netdev)
> +{
> + struct hnae3_handle *h = *((void **)netdev_priv(netdev));
> + struct hclge_vport *vport = hclge_get_vport(h);
> + struct hclge_dev *hdev = vport->back;
> + int duplex, speed;
> + int ret;
> +
> + speed
The Keystone 2 66AK2E SoC has one TMS320C66x DSP Core Subsystem
(C66x CorePac), with a 1.4 GHz C66x Fixed or Floating-Point DSP
Core, and 32 KB of L1P & L1D SRAMs and a 1 MB L2 SRAM. Add the
DT node for this DSP processor sub-system. The processor does
not have a MMU, and uses various IPC Generatio
The Keystone 2 66AK2L SoCs have 4 TMS320C66x DSP Core Subsystems
(C66x CorePacs), each with a 1.0 GHz or 1.2 GHz C66x Fixed /
Floating-Point DSP Core, and 32 KB of L1P & L1D SRAMs and a 1 MB
L2 SRAM. Add the DT nodes for these DSP processor sub-systems.
The processors do not have an MMU, and use va
From: Sam Nelson
A common CMA memory pool reserved memory node is added, and is attached
to all the DSP nodes through the 'memory-region' property on the 66AK2L
EVM board. This area will be used for allocating virtio rings and buffers.
The common node allows the DSP Memory Protection and Address
From: Sam Nelson
A CMA memory pool reserved memory node is added, and is attached to
the DSP node through the 'memory-region' property on the K2E EVM board.
This area will be used for allocating virtio rings and buffers. This
node allows the DSP Memory Protection and Address Extension (MPAX)
modu
The Keystone 2 66AK2H/66AK2K SoCs have upto 8 TMS320C66x DSP Core
Subsystems (C66x CorePacs), each with a 1.0 GHz or 1.2 GHz C66x
Fixed/Floating-Point DSP Core, and 32 KB of L1P & L1D SRAMs and a
1 MB L2 SRAM. Add the DT nodes for these DSP processor sub-systems.
The processors do not have an MMU,
Hi Santosh,
The following series adds the DT nodes for the DSP devices present
on the Keystone2 66AK2H/K, 66AK2L and 66AK2E SoCs. They are disabled
in the base dts files, and enabled in the corresponding board files
alongside an added common reserved CMA pool that is used by all the
DSP devices. T
From: Sam Nelson
A common CMA memory pool reserved memory node is added, and is attached
to all the DSP nodes through the 'memory-region' property on the 66AK2H
EVM board. This area will be used for allocating virtio rings and buffers.
The common node allows the DSP Memory Protection and Address
Contains a QCA6174A-5 chipset, with USB BT. Let's support loading
firmware on it.
Signed-off-by: Brian Norris
---
drivers/bluetooth/btusb.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index 1cefff772cd0..24cc8383fdd4 100644
--- a/driv
On Thu, Jul 27, 2017 at 03:15:15PM +0200, Borislav Petkov wrote:
> On Thu, Jul 27, 2017 at 11:08:56AM +0200, Jan Glauber wrote:
> > OK. As fixing the firmware will take quite some time I'll go for the memory
> > controller driver that starts EDAC / PMU depending on their CONFIG_.
> >
> > What woul
On Thu, Jul 27, 2017 at 10:50:11AM +0800, Wei Wang wrote:
> > > > OK I thought this over. While we might need these new APIs in
> > > > the future, I think that at the moment, there's a way to implement
> > > > this feature that is significantly simpler. Just add each s/g
> > > > as a separate inpu
> On 28 Jul 2017, at 16:27, Nicolas Pitre wrote:
>
>> On Fri, 28 Jul 2017, Arnd Bergmann wrote:
>>
>> Matt Hart reports that vf610m4_defconfig kernels grew to 2GB
>> xipImage size after the __bug_table change.
>>
>> I tried out a few things and found that moving the bug table
>> into the .dat
On Fri, Jul 28, 2017 at 04:25:19PM +0800, Wei Wang wrote:
> On 07/12/2017 08:40 PM, Wei Wang wrote:
> > Add a new feature, VIRTIO_BALLOON_F_SG, which enables to
> > transfer a chunk of ballooned (i.e. inflated/deflated) pages using
> > scatter-gather lists to the host.
> >
> > The implementation o
On Fri, 28 Jul 2017 11:50:43 -0700
Feng Kan wrote:
> The APM X-Gene PCIe root port does not support ACS at this point.
> However, the hw provides isolation and source validation through
> the SMMU. The stream ID generated by the PCIe ports contain both
> the BDF as well as the port ID in its 3 mo
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