Linux 4.7 (9ecda41acb971ebd07c8fb35faf24005c0baea12) introduces write_backward
attribute to perf_event_attr. Document this feature.
Signed-off-by: Wang Nan
Reviewed-by: Vince Weaver
Cc: Michael Kerrisk
---
man2/perf_event_open.2 | 57 --
1 file c
Decribe PERF_EVENT_IOC_PAUSE_OUTPUT and write_backward in man pages.
v2 -> v3:
Correct words.
Explain the relationship between readonly ring buffer and
over-writable ring buffer in patch 1/2.
Wang Nan (2):
perf_event_open.2: Document PERF_EVENT_IOC_PAUSE_OUTPUT
perf_event_open.2: Docum
Hi Lorenzo
Many thanks for your review.
在 2016/10/22 0:08, Lorenzo Pieralisi 写道:
On Fri, Oct 21, 2016 at 02:12:44PM +0800, Dongdong Liu wrote:
[...]
+static int hisi_pcie_init(struct pci_config_window *cfg)
+{
+ int ret;
+ struct acpi_device *adev = to_acpi_device(cfg->parent);
Linux 4.7 (86e7972f690c1017fd086cdfe53d8524e68c661c) introduces
PERF_EVENT_IOC_PAUSE_OUTPUT feature. Document it.
Signed-off-by: Wang Nan
Reviewed-by: Vince Weaver
Cc: Michael Kerrisk
---
man2/perf_event_open.2 | 24
1 file changed, 24 insertions(+)
diff --git a/man2/
Eric,
On 21.10.2016 20:42, Eric Biggers wrote:
> On Fri, Oct 21, 2016 at 02:48:35PM +0200, Richard Weinberger wrote:
>> +
>> +if (!dentry)
>> +return ERR_PTR(-ECHILD);
>> +
>> +if (ubifs_crypt_is_encrypted(inode)) {
>> +err = fscrypt_get_encryption_info(inode);
>> +
From: Michael Zoran
Signed-off-by: Michael Zoran
---
drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c
b/drivers/staging/vc04_services/interfa
On 10/11/2016 10:36 AM, Nikolay Borisov wrote:
> This patchset converts inotify to using the newly introduced
> per-userns sysctl infrastructure.
>
> Currently the inotify instances/watches are being accounted in the
> user_struct structure. This means that in setups where multiple
> users in un
On 2016/10/22 18:05, Michael Kerrisk (man-pages) wrote:
On 10/21/2016 11:25 PM, Vince Weaver wrote:
On Fri, 21 Oct 2016, Wang Nan wrote:
context_switch : 1, /* context switch data */
-
- __reserved_1 : 37;
+ write_backward : 1, /* Write ring buffer from en
On Sat, Oct 15, 2016 at 01:33:29AM +0100, Al Viro wrote:
> IMO that's a plain and simple "just before -rc1" fodder, to be sent
> straight to Linus. No objections from me, anyway.
It's "just after -rc2" now, but maybe it's still time for this
trivial removal?
Al,
any chance to send this user triggerable use after free on to Linus?
On Sun, Oct 16, 2016 at 07:51:22AM +0200, Christoph Hellwig wrote:
> From: Jan Kara
>
> Currently we dropped freeze protection of aio writes just after IO was
> submitted. Thus aio write could be in flight while the filesy
> -Original Message-
> From: Randy Dunlap [mailto:rdun...@infradead.org]
> Sent: Sunday, October 23, 2016 7:57 PM
> To: Vadim Pasternak ; dvh...@infradead.org;
> fengguang...@intel.com
> Cc: da...@davemloft.net; ge...@linux-m68k.org; akpm@linux-
> foundation.org; kv...@codeaurora.org; gre
On Sun, Oct 23, 2016 at 04:47:19PM -0700, Andi Kleen wrote:
> > hm, most likely you did not generate any remote HITMs.. if it was on the
> > laptop?
> > you might get some results for local HITMs with -d option:
> >
> > $ perf c2c report -d lcl
> >
> > the default display/filter is for Remote
As per Ingo's request I've cc'ed a bunch more x86/PAT people.
Dave.
A recent change to the mm code in:
87744ab3832b83ba71b931f86f9cfdb000d07da5
mm: fix cache mode tracking in vm_insert_mixed()
started enforcing checking the memory type against the registered list for
amixed pfn insertion mappings. It happens that the drm drivers for a number
of gpus relied on this
This fixes a regression in all these drivers since the cache
mode tracking was fixed for mixed mappings. It uses the new
arch API to add the VRAM range to the PAT mapping tracking
tables.
Fixes: 87744ab3832 (mm: fix cache mode tracking in vm_insert_mixed())
Signed-off-by: Dave Airlie
---
drivers
A recent change to the mm code in:
87744ab3832b83ba71b931f86f9cfdb000d07da5
mm: fix cache mode tracking in vm_insert_mixed()
started enforcing checking the memory type against the registered list for
amixed pfn insertion mappings. It happens that the drm drivers for a number
of gpus relied on this
This is the working set, I messed up a git add on CONFIG_PAT vs
CONFIG_X86_PAT. This set of changes fixes a regression since
the change to the pfn_insert_mixed code to use the memtype tracking
code.
All the GPU drivers using TTM need to insert the VRAM mapping
into the memtype table so don't get U
* Dave Airlie wrote:
> On 24 October 2016 at 16:03, Dave Airlie wrote:
> > I messed up one of the mailing lists last time (copied ancient
> > address from another script).
> >
>
> Oops ignore both of those sets, forgot a git add, will repost once it
> finish rebuild/boot cycle.
Could you plea
Hi,
Unless I read C wrong, pat.c seems to break all non-strict devmem use. I
discovered this while reversing a bunch of pci and other low-level
stuff. Here is a link to the fix, http//users.dhp.com/~n/pubs/
the one starting with Linux-86...txt is the correct file, those kernel
bugs in OpenBSD an
On 24 October 2016 at 16:03, Dave Airlie wrote:
> I messed up one of the mailing lists last time (copied ancient
> address from another script).
>
Oops ignore both of those sets, forgot a git add, will repost once it
finish rebuild/boot cycle.
Dave.
On Mon, Oct 24, 2016 at 08:04:31AM +0200, Markus Trippelsdorf wrote:
> On 2016.10.24 at 15:02 +0900, Namhyung Kim wrote:
> > On Mon, Oct 24, 2016 at 07:53:12AM +0200, Markus Trippelsdorf wrote:
> > > Another issue: all entries vanish if one scrolls to the left two times.
> >
> > Hmm.. Did you mean
On Monday 24 October 2016 02:53:31, Linus Walleij wrote:
> On Fri, Oct 21, 2016 at 5:00 PM, Enric Balletbo i Serra
>
> wrote:
> > Default is without pullups, but if property is specified in DT and the bit
> > is set, set a pullup on GPIO-n.
> >
> > Signed-off-by: Enric Balletbo i Serra
>
> I d
On 2016.10.24 at 15:02 +0900, Namhyung Kim wrote:
> On Mon, Oct 24, 2016 at 07:53:12AM +0200, Markus Trippelsdorf wrote:
> > On 2016.10.24 at 13:55 +0900, Namhyung Kim wrote:
> > > Hi,
> > >
> > > Sorry for late reply.
> > >
> > > On Mon, Oct 10, 2016 at 07:54:27PM +0200, Markus Trippelsdorf wrot
This fixes a regression in all these drivers since the cache
mode tracking was fixed for mixed mappings. It uses the new
arch API to add the VRAM range to the PAT mapping tracking
tables.
Fixes: 87744ab3832 (mm: fix cache mode tracking in vm_insert_mixed())
Signed-off-by: Dave Airlie
---
drivers
A recent change to the mm code in:
87744ab3832b83ba71b931f86f9cfdb000d07da5
mm: fix cache mode tracking in vm_insert_mixed()
started enforcing checking the memory type against the registered list for
amixed pfn insertion mappings. It happens that the drm drivers for a number
of gpus relied on this
I messed up one of the mailing lists last time (copied ancient
address from another script).
Dave.
On Mon, Oct 24, 2016 at 07:53:12AM +0200, Markus Trippelsdorf wrote:
> On 2016.10.24 at 13:55 +0900, Namhyung Kim wrote:
> > Hi,
> >
> > Sorry for late reply.
> >
> > On Mon, Oct 10, 2016 at 07:54:27PM +0200, Markus Trippelsdorf wrote:
> > > On 2016.10.08 at 13:21 +0200, Markus Trippelsdorf wrote
Increase ADC reference clock from 3MHz to 24MHz so that the
sampling rates goes up from 100K samples per second to 800K
samples per second on AM335x and AM437x SoC.
Also increase opendelay for touchscreen configuration to
equalize the increase in ADC reference clock frequency,
which results in the
On Mon, Oct 24, 2016 at 02:20:44PM +0900, Sergey Senozhatsky wrote:
> Hi Minchan,
>
> On (10/24/16 13:47), Minchan Kim wrote:
> > Hi Sergey,
> >
> > > > +static void zram_unplug(struct blk_plug_cb *cb, bool from_schedule)
> > > > +{
> > > > + spin_lock(&workers.req_lock);
> > > > + if
On 2016.10.24 at 13:55 +0900, Namhyung Kim wrote:
> Hi,
>
> Sorry for late reply.
>
> On Mon, Oct 10, 2016 at 07:54:27PM +0200, Markus Trippelsdorf wrote:
> > On 2016.10.08 at 13:21 +0200, Markus Trippelsdorf wrote:
> > > On 2016.10.07 at 07:09 +0200, Markus Trippelsdorf wrote:
> > > > On 2016.10
A recent change to the mm code in:
87744ab3832b83ba71b931f86f9cfdb000d07da5
mm: fix cache mode tracking in vm_insert_mixed()
started enforcing checking the memory type against the registered list for
amixed pfn insertion mappings. It happens that the drm drivers for a number
of gpus relied on this
This fixes a regression in all these drivers since the cache
mode tracking was fixed for mixed mappings. It uses the new
arch API to add the VRAM range to the PAT mapping tracking
tables.
Fixes: 87744ab3832 (mm: fix cache mode tracking in vm_insert_mixed())
Signed-off-by: Dave Airlie
---
drivers
> -Original Message-
> From: Darren Hart [mailto:dvh...@infradead.org]
> Sent: Sunday, October 23, 2016 5:52 PM
> To: Vadim Pasternak
> Cc: fengguang...@intel.com; da...@davemloft.net; ge...@linux-m68k.org;
> a...@linux-foundation.org; kv...@codeaurora.org;
> gre...@linuxfoundation.org;
Hi Sricharan,
On 2016-10-23 11:49, Sricharan wrote:
Hi Marek,
This patch uses recently introduced device dependency links to track the
runtime pm state of the master's device. This way each SYSMMU controller
is set to runtime active only when its master's device is active and can
restore or sa
On (10/24/16 13:54), Minchan Kim wrote:
> > On (09/22/16 15:42), Minchan Kim wrote:
> > [..]
> > > +static int __zram_cpu_notifier(void *dummy, unsigned long action,
> > > + unsigned long cpu)
> > > {
> > > struct zram_worker *worker;
> > >
> > > - while (!list_empty(&w
Hello Michal,
your latest patch doesn't help on my system:
http://git.kernel.org/cgit/linux/kernel/git/mmarek/kbuild.git/commit/?h=rc-fixes&id=989cea5c14be024e879c0055dc6d033680a52610
Regards,
Oliver
On 10/21/2016 06:23 PM, Oliver Hartkopp wrote:
Hello Michal,
I waited some days for a fix
Hi Minchan,
On (10/24/16 13:47), Minchan Kim wrote:
> Hi Sergey,
>
> > > +static void zram_unplug(struct blk_plug_cb *cb, bool from_schedule)
> > > +{
> > > + spin_lock(&workers.req_lock);
> > > + if (workers.nr_req)
> > > + worker_wake_up();
> > > + spin_unlock(&workers.req_lock);
> > >
Hi Sricharan
On 2016-10-22 07:50, Sricharan wrote:
This patch adds runtime pm implementation, which is based on previous
suspend/resume code. SYSMMU controller is now being enabled/disabled mainly
> from the runtime pm callbacks. System sleep callbacks relies on generic
pm_runtime_force_sus
Hi Arnaldo,
Sorry for late reply.
On Fri, Oct 07, 2016 at 11:35:45AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Fri, Oct 07, 2016 at 01:53:57PM +0900, Namhyung Kim escreveu:
> > Cc-ing perf maintainers,
> >
> > On Fri, Oct 07, 2016 at 06:32:29AM +0200, Markus Trippelsdorf wrote:
> > > On 2016.1
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 1992aa9..d64a835 100644
--- a/Documentation/devicetree/bindings/vendor-
The Lattice iCE40 is a family of FPGAs with a minimalistic architecture
and very regular structure, designed for low-cost, high-volume consumer
and system applications.
This patch adds support to the FPGA manager for configuring the SRAM of
iCE40LM, iCE40LP, iCE40HX, iCE40 Ultra, iCE40 UltraLite a
The Lattice iCE40 is a family of FPGAs with a minimalistic architecture
and very regular structure, designed for low-cost, high-volume consumer
and system applications.
This patch adds support to the FPGA manager for configuring the SRAM of
iCE40LM, iCE40LP, iCE40HX, iCE40 Ultra, iCE40 UltraLite a
From: Joel Holdsworth
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 1992aa9..d64a835 100644
--- a/Documentation/dev
Andrey Utkin writes:
> --- a/drivers/media/pci/solo6x10/solo6x10.h
> +++ b/drivers/media/pci/solo6x10/solo6x10.h
> @@ -284,7 +284,10 @@ static inline u32 solo_reg_read(struct solo_dev
> *solo_dev, int reg)
> static inline void solo_reg_write(struct solo_dev *solo_dev, int reg,
>
Hi,
Sorry for late reply.
On Mon, Oct 10, 2016 at 07:54:27PM +0200, Markus Trippelsdorf wrote:
> On 2016.10.08 at 13:21 +0200, Markus Trippelsdorf wrote:
> > On 2016.10.07 at 07:09 +0200, Markus Trippelsdorf wrote:
> > > On 2016.10.07 at 06:56 +0200, Markus Trippelsdorf wrote:
> > > > On 2016.10.
On Fri, Oct 21, 2016 at 03:23:27PM +0900, Sergey Senozhatsky wrote:
> On (09/22/16 15:42), Minchan Kim wrote:
> [..]
> > +static int __zram_cpu_notifier(void *dummy, unsigned long action,
> > + unsigned long cpu)
> > {
> > struct zram_worker *worker;
> >
> > - whi
On Fri, Oct 21, 2016 at 03:08:09PM +0900, Sergey Senozhatsky wrote:
> Hello Minchan,
>
> On (10/17/16 14:04), Minchan Kim wrote:
> > Hi Sergey,
> >
> > On Fri, Oct 07, 2016 at 03:33:22PM +0900, Minchan Kim wrote:
> >
> > < snip >
> >
> > > > so the question is -- can we move this parallelizatio
On Sun, Oct 23, 2016 at 3:47 AM, Linus Walleij wrote:
> On Sun, Oct 23, 2016 at 4:50 AM, Andrey Smirnov
> wrote:
>> On Fri, Oct 21, 2016 at 2:09 AM, Neil Armstrong
>> wrote:
>>> Since the I2C sx150x GPIO expander driver uses platform_data to manage
>>> the pins configurations, rewrite the drive
Hi Sergey,
On Fri, Oct 21, 2016 at 03:03:34PM +0900, Sergey Senozhatsky wrote:
> On (09/22/16 15:42), Minchan Kim wrote:
> > +static ssize_t use_aio_store(struct device *dev,
> > + struct device_attribute *attr, const char *buf, size_t len)
> > +{
> > + int ret;
> > + u16 do_async;
>
On 24 October 2016 at 15:31, Sinan Kaya wrote:
> Ondrej reported that IRQs stopped working in v4.7 on several
> platforms. A typical scenario, from Ondrej's VT82C694X/694X, is:
>
> ACPI: Using PIC for interrupt routing
> ACPI: PCI Interrupt Link [LNKA] (IRQs 1 3 4 5 6 7 10 *11 12 14 15)
> ACPI: N
On 24 October 2016 at 15:31, Sinan Kaya wrote:
> Commit 103544d86976 ("ACPI,PCI,IRQ: reduce resource requirements")
> replaced the addition of PIRQ_PENALTY_PCI_USING in acpi_pci_link_allocate()
> with an addition in acpi_irq_pci_sharing_penalty(), but f7eca374f000
> ("ACPI,PCI,IRQ: separate ISA pe
On 24 October 2016 at 15:31, Sinan Kaya wrote:
> We do not want to store the SCI penalty in the acpi_isa_irq_penalty[]
> table because acpi_isa_irq_penalty[] only holds ISA IRQ penalties and
> there's no guarantee that the SCI is an ISA IRQ. We add in the SCI
> penalty as a special case in acpi_i
On Fri, 21 Oct 2016, Tetsuo Handa wrote:
> (1) CaitSith can use both string / numeric arguments (like TOMOYO and
> AppArmor) and security labels (like SELinux and Smack). There is no
> reason that access control implementation must not use both.
>
I believe that AppArmor will be ga
From: Reza Arbab
Onlining memory into ZONE_MOVABLE requires CONFIG_MOVABLE_NODE.
Enable the use of this config option on PPC64 platforms.
Signed-off-by: Reza Arbab
Signed-off-by: Anshuman Khandual
---
Documentation/kernel-parameters.txt | 2 +-
mm/Kconfig | 2 +-
2 f
From: Reza Arbab
Remove the check which prevents us from hotplugging into an empty node.
Signed-off-by: Reza Arbab
Signed-off-by: Anshuman Khandual
---
arch/powerpc/mm/numa.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/arch/powerpc/mm/numa.c b/arch/powerp
From: Reza Arbab
Signed-off-by: Reza Arbab
Signed-off-by: Anshuman Khandual
---
.../bindings/powerpc/opal/hotplug-aperture.txt | 26 ++
1 file changed, 26 insertions(+)
create mode 100644
Documentation/devicetree/bindings/powerpc/opal/hotplug-aperture.txt
diff --git
Each individual node in the system has a ZONELIST_FALLBACK zonelist
and a ZONELIST_NOFALLBACK zonelist. These zonelists decide fallback
order of zones during memory allocations. Sometimes it helps to dump
these zonelists to see the priority order of various zones in them.
Particularly platforms wh
zone_names[] is used to identify any zone given it's index which
can be used in many other places. So exporting the definition
through include/linux/mmzone.h header for it's broader access.
Signed-off-by: Anshuman Khandual
---
include/linux/mmzone.h | 1 +
mm/page_alloc.c| 2 +-
2 files
Just enable MOVABLE_NODE config option for PPC64 platform by default.
This prevents accidentally building the kernel without the required
config option.
Signed-off-by: Anshuman Khandual
---
arch/powerpc/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/Kconfig b/arch/p
Isolation seeking coherent memory nodes which wish to be MNODE_ISOLATION
in core VM will have "ibm,hotplug-aperture" as one of the compatible
properties in their respective device nodes in device tree. Detect them
during platform NUMA initialization and mark their respective coherent
mask in pglist
This adds two different drivers inside drivers/char/ directory under two
new kernel config options COHERENT_HOTPLUG_DEMO and COHERENT_MEMORY_DEMO.
1) coherent_hotplug_demo: Detects, hoptlugs the coherent device memory
2) coherent_memory_demo: Exports debugfs interface for VMA migrations
Signed-o
This is a test script which creates a workload (e.g ebizzy) and go through
it's VMAs (/proc/pid/maps) and initiate migration to random nodes which can
be either system memory node or coherent memory node.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/vm/cdm_migration.sh | 76 +
From: Reza Arbab
When scanning the device tree to initialize the system NUMA topology,
process dt elements with compatible id "ibm,hotplug-aperture" to create
memoryless numa nodes.
These nodes will be filled when hotplug occurs within the associated
address range.
Signed-off-by: Reza Arbab
Si
Coherent device memory support has been experimented around on
POWER platform with simulations and QEMU changes. This series contains
patches which can be classified into three categories.
(1) Memory less node hot plug support
(2) Identifying coherent device nodes during NUMA init
(3) Debu
On Sun, Oct 23, 2016 at 05:32:21PM -0400, Chris Mason wrote:
>
>
> On 10/22/2016 11:20 AM, Dave Jones wrote:
> > On Fri, Oct 21, 2016 at 04:02:45PM -0400, Dave Jones wrote:
> >
> > > > It could be worth trying this, too:
> > > >
> > > >
> > https://git.kernel.org/cgit/linux/kernel
There are certain devices like accelerators, GPU cards, network
cards, FPGA cards, PLD cards etc which might contain on board memory. This
on board memory can be coherent along with system RAM and may be accessible
from either the CPU or from the device. The coherency is usually achieved
th
This adds a new virtual address range based migration interface which
can migrate all the mapped pages from a virtual range of a process to
a destination node. This also exports this new function symbol.
Signed-off-by: Anshuman Khandual
---
include/linux/mempolicy.h | 7
include/linux/migr
This change is part of the isolation requiring coherent device memory nodes
implementation.
Currently MPOL_MBIND interface simply fails on a coherent device memory
node after the zonelist changes introduced earlier. Without __GFP_THISNODE
flag, the first node of the nodemask will not be selected i
Auto NUMA does migratability check on any given VMA before scanning it for
marking purpose. For now if the coherent device memory has been faulted in
or migrated into a process VMA, it should not be part of the auto NUMA
migration scheme. The check is based on VM_CDM flag.
Signed-off-by: Anshuman
This change is part of the isolation requiring coherent device memory nodes
implementation.
Isolation seeking coherent device memory node requires allocation isolation
from implicit memory allocations from user space. Towards that effect, the
memory should not be used for generic HugeTLB page pool
Add a new member N_COHERENT_DEVICE into node_states[] nodemask array to
enlist all those nodes which contain only coherent device memory. Also
creates a new sysfs interface /sys/devices/system/node/is_coherent_device
to list down all those nodes which has coherent device memory.
Signed-off-by: Ans
There are certain devices like specialized accelerator, GPU cards, network
cards, FPGA cards etc which might contain onboard memory which is coherent
along with the existing system RAM while being accessed either from the CPU
or from the device. They share some similar properties with that of norma
This change is part of the isolation requiring coherent device memory
node's implementation.
Isolation seeking coherent memory node requires isolation from implicit
memory allocations from user space but at the same time there should also
have an explicit way to do the allocation. Kernel allocatio
VMAs containing coherent device memory should be marked with VM_CDM. These
VMAs need to be identified in various core kernel paths and this new flag
will help in this regard.
Signed-off-by: Anshuman Khandual
---
include/linux/mm.h | 5 +
mm/mempolicy.c | 43 +
Ondrej reported that IRQs stopped working in v4.7 on several
platforms. A typical scenario, from Ondrej's VT82C694X/694X, is:
ACPI: Using PIC for interrupt routing
ACPI: PCI Interrupt Link [LNKA] (IRQs 1 3 4 5 6 7 10 *11 12 14 15)
ACPI: No IRQ available for PCI Interrupt Link [LNKA]
8139too :
Commit 103544d86976 ("ACPI,PCI,IRQ: reduce resource requirements")
replaced the addition of PIRQ_PENALTY_PCI_USING in acpi_pci_link_allocate()
with an addition in acpi_irq_pci_sharing_penalty(), but f7eca374f000
("ACPI,PCI,IRQ: separate ISA penalty calculation") removed the use
of acpi_irq_pci_shar
We do not want to store the SCI penalty in the acpi_isa_irq_penalty[]
table because acpi_isa_irq_penalty[] only holds ISA IRQ penalties and
there's no guarantee that the SCI is an ISA IRQ. We add in the SCI
penalty as a special case in acpi_irq_get_penalty().
But if we called acpi_penalize_isa_ir
On 23-10-16, 20:08, Dave Gerlach wrote:
> Overall this series looks good to me apart from a few small things. Most
> importantly I was able to get a working implementation using two regulators
> on ti dra7xx platform with proper sequencing built on top of this series. We
> have cpu regulator and Ad
On 24 October 2016 at 15:17, Sinan Kaya wrote:
> Thanks,
>
> On 10/22/2016 11:48 PM, Jonathan Liu wrote:
>> This series fixes one or more network adapters not working in Linux
>> 32-bit x86 guest running inside VirtualBox if I have 4 network
>> adapters enabled. The following message no longer app
Thanks,
On 10/22/2016 11:48 PM, Jonathan Liu wrote:
> This series fixes one or more network adapters not working in Linux
> 32-bit x86 guest running inside VirtualBox if I have 4 network
> adapters enabled. The following message no longer appears in the
> kernel log:
> ACPI: No IRQ available for P
On 10/22/2016 7:58 PM, Bjorn Helgaas wrote:
> On Sat, Oct 15, 2016 at 12:31:05AM -0400, Sinan Kaya wrote:
>> The change introduced in commit 103544d86976 ("ACPI,PCI,IRQ: reduce
>> resource requirements") removed PCI_USING penalty from
>> acpi_pci_link_allocate function as there is no longer a fixed
On 10/22/2016 7:59 PM, Bjorn Helgaas wrote:
> Since V4 3/3 is so much bigger and makes this quite subtle change in
> how _CRS is handled, I like V3 1/3 better.
>
OK
> Are we all set to go now? I think I've acked the patches you
> mentioned.
Yes, I'll post a follow up with your recommendations.
Hi Greg, any more comments, thanks.
On 2016/9/27 21:15, Kefeng Wang wrote:
>
>
> On 2016/9/27 18:57, Greg Kroah-Hartman wrote:
>> On Sat, Sep 24, 2016 at 05:14:25PM +0800, Kefeng Wang wrote:
>>> Declare an OF early console for SBSA UART so that the early console device
>>> can be specified via t
I thought we had sorted all the AUX issues, though interestingly this is
on a core2 system.
this is:
static void __rb_free_aux(struct ring_buffer *rb)
{
/*
* Should never happen, the last reference should be dropped from
* perf_mmap_close() path, which
> On Fri, Oct 21, 2016 at 9:31 AM, Liu Gang wrote:
>
> > From the beginning of the gpio-mpc8xxx.c, the "handle_level_irq"
> > has being used to handle GPIO interrupts in the PowerPC/Layerscape
> > platforms. But actually, almost all PowerPC/Layerscape platforms
> > assert an interrupt request u
Though not sure, having trouble parsing this one. This is on a core2
system. Somewhat unusual in that it seems
as though the network watchdog caught the lockup.
[19849.952009] [ cut here ]
[19849.956645] WARNING: CPU: 0 PID: 23863 at net/sched/sch_generic.c:316
dev_wat
On 10/21/2016 12:13 PM, Sinan Kaya wrote:
>> Wait a minute, I still have a question here: what about other ACPI
>> > arches (ia64, arm64)? Don't they need to call acpi_penalize_sci_irq()
>> > somewhere?
>> >
> ACPI ARM64 architecture implements reduced ACPI profile which doesn't
> have GED object
On 10/20/2016 9:58 PM, Bjorn Helgaas wrote:
> I like this patch fine, except for the changelog. I don't think it's
> useful to describe this as a revert and give all the historical
> details. I think the important part is something like this:
>
> We previously used irq_get_trigger_type(irq) to
> Fix this bug:
> drivers/media/platform/mtk-vcodec/vdec_drv_if.c:38 vdec_if_init() info:
> ignoring unreachable code.
>
> With is indeed a real problem that prevents the driver to work!
>
> While here, also remove an used var, as reported by smatch:
>
> drivers/media/platform/mtk
Most windows guests which I have on hand currently still utilize APIC Timer
periodic/oneshot mode instead of APIC Timer tsc-deadline mode:
- windows 2008 server r2
- windows 2012 server r2
- windows 7
- windows 10
This patchset adds the APIC Timer periodic/oneshot mode VMX preemption
timer support
On 10/20/2016 5:39 PM, Rafael J. Wysocki wrote:
>> @@ -871,7 +871,7 @@ static int __init acpi_irq_penalty_update(char *str, int
>> used)
>> > void acpi_penalize_isa_irq(int irq, int active)
>> > {
>> > if ((irq >= 0) && (irq < ARRAY_SIZE(acpi_isa_irq_penalty)))
>> > - acpi_
From: Wanpeng Li
Check apic_lvtt_tscdeadline() mode directly instead of apic_lvtt_oneshot()
and apic_lvtt_period() to guarantee the timer is in tsc-deadline mode when
rdmsr MSR_IA32_TSCDEADLINE.
Suggested-by: Radim Krčmář
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Yunhong Jiang
Signed-off-by: Wa
From: Wanpeng Li
Introdce kvm_get_lapic_target_expiration_tsc() to get APIC Timer target
deadline tsc.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Yunhong Jiang
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c | 9 +
arch/x86/kvm/lapic.h | 1 +
arch/x86/kvm/x86.c | 2 +-
3 files chan
From: Wanpeng Li
Rename start/cancel_hv_tscdeadline to start/cancel_hv_timer since
they will handle both APIC Timer periodic/oneshot mode and tsc-deadline
mode.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Yunhong Jiang
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c | 16
1 f
From: Wanpeng Li
Most windows guests still utilize APIC Timer periodic/oneshot mode
instead of tsc-deadline mode, and the APIC Timer periodic/oneshot
mode are still emulated by high overhead hrtimer on host. This patch
converts the expected expire time of the periodic/oneshot mode to
guest deadli
From: Wanpeng Li
Extract start_sw_period() to handle periodic/oneshot mode, it will be
used by later patch.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Yunhong Jiang
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c | 89 +++-
1 file changed, 47 i
On 21-10-16, 17:32, Dave Gerlach wrote:
> Hi,
> On 10/20/2016 03:44 AM, Viresh Kumar wrote:
> > This patch adds infrastructure to manage multiple regulators and updates
> > the only user (cpufreq-dt) of dev_pm_opp_set{put}_regulator().
> >
> > This is preparatory work for adding full support for de
On 22-10-16, 23:37, Robert Jarzmik wrote:
> Viresh Kumar writes:
>
> > On 15-10-16, 21:57, Robert Jarzmik wrote:
> >> As the clock settings have been introduced into the clock pxa drivers,
> >> which are now available to change the CPU clock by themselves, remove
> >> the clock handling from this
Hi Mauro,
On Fri, 2016-10-21 at 11:01 -0200, Mauro Carvalho Chehab wrote:
> Em Fri, 2 Sep 2016 20:19:54 +0800
> Tiffany Lin escreveu:
>
> > Add v4l2 layer decoder driver for MT8173
> >
> > Signed-off-by: Tiffany Lin
>
> > +int vdec_if_init(struct mtk_vcodec_ctx *ctx, unsigned int fourcc)
> >
On 10/20/2016 9:39 PM, Bjorn Helgaas wrote:
>> These API need to bypass the acpi_irq_get_penalty function.
> I don't mind this patch, but the changelog doesn't tell me what's
> broken and why we need this fix. Apparently acpi_irq_get_penalty()
> doesn't work before ACPI is initialized, but I don't
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