There are two sentences in the Sync File documentation where the
english is a little off. This patch is an attempt to fix these.
Signed-off-by: Javier Martinez Canillas
---
Documentation/sync_file.txt | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/sync_
From: Cai Zhiyong
Date: Sat, 14 May 2016 14:13:30 +0800
Subject: [PATCH] devfreq: fix double call put_device
1295 */
1296 void device_unregister(struct device *dev)
1297 {
1298 pr_debug("device: '%s': %s\n", dev_name(dev), __func__);
1299 device_del(dev);
1300 put_device(
On Fri, May 13, 2016 at 10:09:52AM +0200, Borislav Petkov wrote:
> Try this one better - it fixes an unitialized var.
Nosireebob, VMs crash even with this patch in the host as soon as the
host has THP enabled.
Greetings
Marc
--
---
From: Cai Zhiyong
Date: Sat, 14 May 2016 14:13:30 +0800
Subject: [PATCH] devfreq: fix double call put_device
1295 */
1296 void device_unregister(struct device *dev)
1297 {
1298 pr_debug("device: '%s': %s\n", dev_name(dev), __func__);
1299 device_del(dev);
1300 put_device(
Hello all:
Shall I send patch v2 for it? (if really need, please let me know, and I
shall try).
Default, I shall continue to try to find and send another patches for mm
in "include/linux/*.h".
Thanks.
On 5/3/16 00:38, Chen Gang wrote:
> On 5/3/16 00:23, Chen Gang wrote:
>> On 5/2/16 23:35, Alex
On May 8, 2016 7:05 PM, "Stas Sergeev" wrote:
>
> 09.05.2016 04:32, Andy Lutomirski пишет:
>
>> On May 7, 2016 7:38 AM, "Stas Sergeev" wrote:
>>>
>>> 03.05.2016 20:31, Andy Lutomirski пишет:
>>>
If a signal stack is set up with SS_AUTODISARM, then the kernel
inherently avoids incorrectl
On May 1, 2016 at 9:51 AM, Lnus Torvalds wrote:
> On Sun, May 1, 2016 at 2:43 AM, George Spelvin wrote:
>> * If you feel ambitious, add a 32-bit CONFIG_ARCH_HAS_SLOW_MULTIPLIER
>> exception path.
> Let's make that a separate worry, and just fix hash_64() first.
>
> In particular, that means "l
Hi Doug,
On 2016年05月14日 04:10, Doug Anderson wrote:
Hi,
On Fri, May 13, 2016 at 11:42 AM, Brian Norris wrote:
From: Xing Zheng
There was a typo, swapping 'c' <--> 'g'.
Signed-off-by: Xing Zheng
Signed-off-by: Brian Norris
---
drivers/clk/rockchip/clk-rk3399.c | 4 ++--
1 file changed,
Instead of comparing the thread's euid to GLOBAL_ROOT_UID, use
capabilities to check the additional privileges required to migrate
processes between cgroups. In addition, add further permissions to
cgroup namespaces where:
* Both tasks are in the same cgroup namespace; and
* The current task has C
This is an updated (and rewritten) version of v3 of this patchset[1].
The main difference is that I changed how we the "allow management" is
implemented. Rather than just chmod-ing the cgroup directory (which
everyone agreed was quite an odd way of doing it),
unshare(CLONE_NEWCGROUP) will create a
Allow unprivileged processes to control subtrees of their associated
processes, a necessary feature if a rootless container wishes to take
advantage of cgroups for its own processes.
As cgroups are hierarchical, having the ability to set limits in a
subtree does not preclude the ability to modify
On 5/13/2016 6:53 AM, Arnd Bergmann wrote:
> A patch that went into Linux-4.4 to fix big-endian mode on a Lantiq
> MIPS system unfortunately broke big-endian operation on PowerPC
> APM82181 as reported by Christian Lamparter, and likely other
> systems.
>
> It actually introduced multiple issues:
HI Andrew,
On Fri, May 13, 2016 at 11:13 PM, Andrew Lunn wrote:
> Hi Harini
>
> Is this backward compatible? Will devices using the old binding still
> work?
It isn't right now.
I will have to assign the bus read/write functions conditionally in order to
do that - I'll see if I can make it clean
On (05/14/16 08:08), Minchan Kim wrote:
[..]
> Fortunately, Andrew isn't pick up this patch yet so I want to replace
> it to below suggested by Sergey which is better.
[..]
>
> + atomic64_inc(&zram->stats.writestall);
looks good to me. thanks!
-ss
Hello Minchan,
On (05/14/16 08:05), Minchan Kim wrote:
[..]
> > recompress:
> > compress
> > handle = zs_malloc FAST PATH
> >
> > if (!handle) {
> > release stream
> > handle = zs_malloc SLOW PATH
> >
> > << my patch accounts SLOW PATH here >>
> >
From: Andi Kleen
Add declarations for the events needed for TopDown to the
Intel big core CPUs starting with Sandy Bridge. We need
to report different values if HyperThreading is on or off.
The only thing this patch does is to export some events
in sysfs.
TopDown level 1 uses a set of abstracte
From: Andi Kleen
Add topdown event declarations to Silvermont / Airmont.
These cores do not support the full Top Down metrics, but an useful
subset (FrontendBound, Retiring, Backend Bound/Bad Speculation).
The perf stat tool automatically handles the missing events
and combines the available met
Note to reviewers: includes both tools and kernel patches.
The kernel patches are at the beginning.
[v2: Address review feedback.
Metrics are now always printed, but colored when crossing threshold.
--topdown implies --metric-only.
Various smaller fixes, see individual patches]
[v3: Add --single-t
From: Andi Kleen
Add basic plumbing for TopDown in perf stat
Add a new --topdown options to enable events.
When --topdown is specified set up events for all topdown
events supported by the kernel.
Add topdown-* as a special case to the event parser, as is
needed for all events containing -.
The
From: Andi Kleen
When the scaling factor is a full integer don't display fractional
digits. This avoids unnecessary .00 output for topdown metrics
with scale factors.
v2: Remove redundant check.
Signed-off-by: Andi Kleen
---
tools/perf/builtin-stat.c | 7 ---
1 file changed, 4 insertions(+
From: Andi Kleen
Now that we have topology_max_smt_threads() use it
to detect the HT workarounds for older CPUs.
v2: Use topology_max_smt_threads()
Signed-off-by: Andi Kleen
---
arch/x86/events/intel/core.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/x86/even
From: Andi Kleen
For SMT specific workarounds it is useful to know if SMT is active
on any online CPU in the system. This currently requires a loop
over all online CPUs.
Add a global variable that is updated with the maximum number
of smt threads on any CPU on online/offline, and use it for
topo
From: Andi Kleen
Add a way to show different sysfs events attributes depending on
HyperThreading is on or off. This is difficult to determine
early at boot, so we just do it dynamically when the sysfs
attribute is read.
v2:
Compute HT status only once in CPU online/offline hooks.
v3: Use topolog
From: Andi Kleen
Implement the TopDown formulas in perf stat. The topdown basic metrics
reported by the kernel are collected, and the formulas are computed
and output as normal metrics.
See the kernel commit exporting the events for details on the used
metrics.
v2: Always print all metrics, onl
Hi David,
Vivien Didelot writes:
> Now that the bridge code defers the switchdev port state setting, there
> is no need to defer the port STP state change within the mv88e6xxx code.
> Thus get rid of the driver's bridge work code.
>
> This also fixes a race condition where the DSA layer assumes
On Fri, 2016-03-18 at 22:26 +0100, Richard Cochran wrote:
> When performing a suspend operation, the kernel brings all of the
> non-boot CPUs offline, calling the hot plug notifiers with the flag,
> CPU_TASKS_FROZEN, set in the action code. Similarly, during resume,
> the CPUs are brought back onl
Now that the bridge code defers the switchdev port state setting, there
is no need to defer the port STP state change within the mv88e6xxx code.
Thus get rid of the driver's bridge work code.
This also fixes a race condition where the DSA layer assumes that the
bridge code already set the unbridge
This is useful for running the script from somewhere besides the root of
the source tree.
Signed-off-by: Martin Kelly
---
scripts/kconfig/merge_config.sh | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/scripts/kconfig/merge_config.sh b/scripts/kconfig/merge_conf
On Thu 12 May 20:46 PDT 2016, Andy Gross wrote:
> From: Kumar Gala
>
> Add an implementation of the SCM interface that works on ARM64 SoCs. This
> is used by things like determine if we have HDCP support or not on the
> system.
>
> Signed-off-by: Kumar Gala
> Signed-off-by: Andy Gross
Revie
On Thu 12 May 20:46 PDT 2016, Andy Gross wrote:
> This patch converts the Qualcomm SCM driver to use the streaming DMA APIs
> for communication buffers.
>
> Signed-off-by: Andy Gross
> ---
> drivers/firmware/qcom_scm-32.c | 189
> +++--
> drivers/firmware/qc
On Fri, May 13, 2016 at 11:56:12PM +0300, Sergei Shtylyov wrote:
> On 05/13/2016 11:44 PM, Andrew Lunn wrote:
>
> >>>Another issue is that on some boards we have one reset line tied to
> >>>multiple PHYs.How do we prevent multiple resets being taking place when
> >>>each of
> >>>the PHYs are regi
The following patch[1] adds a new "cpumode" to the perf_sample
structure that gets initialised as events are read from the data
event file.
With the advent of HW tracers and more specifically the decoding of
the traces they generate, function perf_session__deliver_synth_event()
gets called directl
On Thu 12 May 20:46 PDT 2016, Andy Gross wrote:
> This patch changes the cold_set_boot_addr function to use atomic SCM
> calls. cold_set_boot_addr required adding qcom_scm_call_atomic2 to
> support the two arguments going to the smc call. Using atomic removes
> the need for memory allocation and
On Thu 12 May 20:46 PDT 2016, Andy Gross wrote:
> This patch converts the Qualcomm SCM firmware driver into a platform
> driver.
>
> Signed-off-by: Andy Gross
Acked-by: Bjorn Andersson
Regards,
Bjorn
Tadeusz -
David updated the keys-asym-keyctl branch, and this patch set won't build
any more.
On Thu, 5 May 2016, Tadeusz Struk wrote:
diff --git a/crypto/algif_akcipher.c b/crypto/algif_akcipher.c
index e00793d..f486b6d 100644
--- a/crypto/algif_akcipher.c
+++ b/crypto/algif_akcipher.c
+st
On Thu 12 May 20:46 PDT 2016, Andy Gross wrote:
> This patch adds the device tree support for the Qualcomm SCM firmware.
>
> Signed-off-by: Andy Gross
Acked-by: Bjorn Andersson
Regards,
Bjorn
On Fri, May 13, 2016 at 10:03:58PM +0900, Sergey Senozhatsky wrote:
> debug_stat sysfs is read-only and represents various debugging
> data that zram developers may need. This file is not meant to be
> used by anyone else: its content is not documented and will change
> any time w/o any notice. Th
Hello Sergey,
On Fri, May 13, 2016 at 05:06:43PM +0900, Sergey Senozhatsky wrote:
> On (05/13/16 16:20), Minchan Kim wrote:
> > > > > @@ -737,12 +737,12 @@ static int zram_bvec_write(struct zram *zram,
> > > > > struct bio_vec *bvec, u32 index,
> > > > > zcomp_strm_release(zram->com
There is invalid error code check of register_chrdev() in megaraid_init().
register_chrdev() returns negative code in case of error,
as a result current code can try to unregister_chrdev() with error code
instead of major that may lead to unregistering somebody else's chardev.
Found by Linux Driv
From: Rafael J. Wysocki
The design of the cpufreq governor API is not very straightforward,
as struct cpufreq_governor provides only one callback to be invoked
from different code paths for different purposes. The purpose it is
invoked for is determined by its second "event" argument, causing it
From: Rafael J. Wysocki
None of the cpufreq governors currently in the tree will ever fail
an invocation of the ->governor() callback with the event argument
equal to CPUFREQ_GOV_LIMITS (unless invoked with incorrect arguments
which doesn't matter anyway) and had it ever failed, the result of
it
From: Rafael J. Wysocki
The performance and powersave cpufreq governors handle the
CPUFREQ_GOV_START event in the same way as CPUFREQ_GOV_LIMITS.
However, the cpufreq core always invokes cpufreq_governor() with the
event argument equal to CPUFREQ_GOV_LIMITS right after invoking it with
event equa
From: Rafael J. Wysocki
The cpufreq_governor() routine is used by the cpufreq core to invoke
the current governor's ->governor() callback with appropriate arguments
and do some housekeeping related to that. Unfortunately, the way it
mixes different governor events in one code path makes it rathe
From: Rafael J. Wysocki
It is not necessary to check the governor's max_transition_latency
attribute every time cpufreq_governor() runs, so check it only if
the event argument is CPUFREQ_GOV_POLICY_INIT.
Signed-off-by: Rafael J. Wysocki
---
drivers/cpufreq/cpufreq.c | 25 +---
On Fri, May 13, 2016 at 03:12:45PM -0400, Vivek Goyal wrote:
> On Tue, May 10, 2016 at 05:16:30PM -0700, Shaohua Li wrote:
> > Hi,
> >
> > This patch set adds low/high limit for blk-throttle cgroup. The interface is
> > io.low and io.high.
> >
> > low limit implements best effort bandwidth/iops p
Hi,
This series is on top of the current linux-next witn the following two patches
applied:
https://patchwork.kernel.org/patch/9080801/
https://patchwork.kernel.org/patch/9080791/
It cleans up a few things and then reworks the governor API to get rid of
governor events and use callbacks represen
Hi,
On Fri, May 13, 2016 at 3:12 PM, Brian Norris wrote:
> Rockchip's rk3399 evaluation board has eMMC. Let's enable the
> newly-added nodes.
>
> Signed-off-by: Brian Norris
> ---
> v4:
>
> * alphabetize &node references
>
> v3:
>
> * no change
>
> v2:
>
> * better commit description
>
> arc
Hi,
On Fri, May 13, 2016 at 3:12 PM, Brian Norris wrote:
> Per the examples in
> Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt, we need the
> grf node to be a simple-mfd in order to properly enumerate child devices
> like our eMMC PHY.
>
> Signed-off-by: Brian Norris
> ---
> v4:
>
On 13 May 2016 at 17:19, Bjorn Andersson wrote:
> On Fri 13 May 14:01 PDT 2016, Arnd Bergmann wrote:
>
>> On Tuesday 10 May 2016 11:39:34 Bjorn Andersson wrote:
> [..]
>> > I assume we could have the QRTR go through Andy and arm-soc, with
>> > David's approval and this fix squashed in. But we're r
On 5/13/2016 7:58 AM, Peter Zijlstra wrote:
On Thu, May 12, 2016 at 11:39:47PM -0700, Vikram Mulukutla wrote:
Hi,
I came across a piece of engineering code that looked like:
preempt_disable();
/* --cut, lots of code-- */
preempt_enable_no_resched();
put_user()
preempt_disable();
(If you wish
On Thu 12 May 17:52 PDT 2016, Andrew Duggan wrote:
> On 05/11/2016 08:05 PM, Bjorn Andersson wrote:
> >On Wed 11 May 16:30 PDT 2016, Andrew Duggan wrote:
> >
> >>Hi Bjorn,
> >>
> >>On 05/10/2016 08:49 AM, Bjorn Andersson wrote:
> >[..]
> >>>So either we duplicate the regulator support in spi/i2c o
Hi,
On Thu, May 12, 2016 at 3:43 PM, Brian Norris wrote:
> Some of the spacing was wrong (spaces instead of tabs), and due to
> longer entries added later, the columns weren't aligned. Let's get
> everything consistent.
>
> Signed-off-by: Brian Norris
> ---
> drivers/phy/phy-rockchip-emmc.c | 7
Hi,
On Thu, May 12, 2016 at 3:43 PM, Brian Norris wrote:
> The output tap delay controls helps maintain the hold requirements for
> eMMC. The exact value is dependent on the SoC and other factors, though
> it isn't really an exact science. But the default of 0 is not very good,
> as it doesn't gi
On Fri 13 May 14:01 PDT 2016, Arnd Bergmann wrote:
> On Tuesday 10 May 2016 11:39:34 Bjorn Andersson wrote:
[..]
> > I assume we could have the QRTR go through Andy and arm-soc, with
> > David's approval and this fix squashed in. But we're running rather late
> > in this cycle, perhaps we should j
If a command with a Simple task attribute is failed due to a Unit
Attention, then a subsequent command with an Ordered task attribute will
hang forever. The reason for this is that the Unit Attention status is
checked for in target_setup_cmd_from_cdb, before the call to
target_execute_cmd, which c
Am Freitag, 13. Mai 2016, 14:57:24 schrieb Brian Norris:
> On Fri, May 13, 2016 at 11:47:57PM +0200, Heiko Stuebner wrote:
> > Am Donnerstag, 12. Mai 2016, 15:35:51 schrieb Brian Norris:
> > > Add description for the SDHCI v5.1 eMMC controller on rk3399. Fix it
> > > to
> > > 200 MHz, to support al
From: Dave Hansen
When I added support for the Memory Protection Keys processor
feature, I had to reindent the REQUIRED/DISABLED_MASK macros, and
also consult the later cpufeature words.
I'm not quite sure how I bungled it, but I consulted the wrong
word at the end. This only affected required
Per the examples in
Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt, we need the
grf node to be a simple-mfd in order to properly enumerate child devices
like our eMMC PHY.
Signed-off-by: Brian Norris
---
v4:
* New, split out of patch 2, per Heiko's recommendation
arch/arm64/boot/
Rockchip's rk3399 evaluation board has eMMC. Let's enable the
newly-added nodes.
Signed-off-by: Brian Norris
---
v4:
* alphabetize &node references
v3:
* no change
v2:
* better commit description
arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 12
1 file changed, 12 insertion
Add description for the SDHCI v5.1 eMMC controller on rk3399. Fix it to
200 MHz, to support all supported timing modes.
Note that 'rockchip,rk3399-sdhci-5.1' is not documented; we presumably
have a compliant Arasan controller, but let's have a rockchip property
as the canonical backup/precautionar
(Including more folks, quoting entire patch)
On Thu, 12 May, at 08:19:54PM, Shannon Zhao wrote:
> From: Shannon Zhao
>
> The EFI DT parameters for bare metal are located under /chosen node,
> while for Xen Dom0 they are located under /hyperviosr/uefi node. These
> parameters under /chosen and /h
On Monday, May 09, 2016 09:02:04 PM Viresh Kumar wrote:
> On 03-05-16, 20:49, Akshay Adiga wrote:
> > Fixes are based on patch https://patchwork.ozlabs.org/patch/612058/ which
> > is in Rafael's linux-next.
> >
> > - Patch [1] fixes WARN_ON in powernv_target_index()
> > - Patch [2] Deleting any pe
On 05/09/2016 11:04 PM, Lijun Ou wrote:
> +static void hns_roce_v1_cq_clean(struct hns_roce_cq *hr_cq, u32 qpn,
> + struct hns_roce_srq *srq)
> +{
> + spin_lock_irq(&hr_cq->lock);
> + hns_roce_v1_clean_cq(hr_cq, qpn, srq);
> + spin_unlock_irq(&hr_cq->lock);
Hi,
On Fri, May 13, 2016 at 2:09 PM, Brian Norris wrote:
> From: Shawn Lin
>
> Signal integrity analysis has suggested we set these values. Do this in
> power_on(), so that they get reconfigured after suspend/resume.
>
> Signed-off-by: Shawn Lin
> Signed-off-by: Brian Norris
> ---
> v2:
> * S
Hi,
On Thu, May 12, 2016 at 3:43 PM, Brian Norris wrote:
> From: Shawn Lin
>
> According to the databook, 10.2us is the max time for dll to be ready to
> work. However in testing, some chips need 20us for dll to be ready. This
> patch adds some extra margin for dllrdy to be ready, fixing our
> -
On Thu, May 12, 2016 at 11:00 PM, Arnd Bergmann wrote:
> A recent patch added a stub function for acpi_video_get_levels when
> CONFIG_ACPI_VIDEO is disabled. However, this is marked as 'static'
> and causes a warning about an unused function whereever the header
> gets included:
>
> In file includ
On Fri, May 13, 2016 at 11:47:57PM +0200, Heiko Stuebner wrote:
> Am Donnerstag, 12. Mai 2016, 15:35:51 schrieb Brian Norris:
> > Add description for the SDHCI v5.1 eMMC controller on rk3399. Fix it to
> > 200 MHz, to support all supported timing modes.
> >
> > Note that 'rockchip,rk3399-sdhci-5.1
On 05/09/2016 11:04 PM, Lijun Ou wrote:
> +int __hns_roce_cmd(struct hns_roce_dev *hr_dev, u64 in_param, u64 *out_param,
> +unsigned long in_modifier, u8 op_modifier, u16 op,
> +unsigned long timeout);
> +
> +/* Invoke a command with no output parameter */
> +static
Am Donnerstag, 12. Mai 2016, 15:35:52 schrieb Brian Norris:
> Rockchip's rk3399 evaluation board has eMMC. Let's enable the
> newly-added node.
>
> Signed-off-by: Brian Norris
> ---
> v2:
>
> * better commit description
>
> arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 12
> 1 fi
Hello.
On 05/13/2016 10:06 AM, Uwe Kleine-König wrote:
[...]
Index: net-next/drivers/of/of_mdio.c
===
--- net-next.orig/drivers/of/of_mdio.c
+++ net-next/drivers/of/of_mdio.c
@@ -44,6 +44,7 @@ static int of_get_phy_id(struct device
Am Donnerstag, 12. Mai 2016, 15:35:51 schrieb Brian Norris:
> Add description for the SDHCI v5.1 eMMC controller on rk3399. Fix it to
> 200 MHz, to support all supported timing modes.
>
> Note that 'rockchip,rk3399-sdhci-5.1' is not documented; we presumably
> have a compliant Arasan controller, b
Add description for the SDHCI v5.1 eMMC controller on rk3399. Fix it to
200 MHz, to support all supported timing modes.
Note that 'rockchip,rk3399-sdhci-5.1' is not documented; we presumably
have a compliant Arasan controller, but let's have a rockchip property
as the canonical backup/precautionar
On Fri, May 13, 2016 at 02:42:06PM -0700, Doug Anderson wrote:
> On Thu, May 12, 2016 at 3:35 PM, Brian Norris
> wrote:
> > + emmc_phy: phy@f780 {
> > + compatible = "rockchip,rk3399-emmc-phy";
> > + reg = <0xf780 0x20>;
>
> This is sligh
Rockchip's rk3399 evaluation board has eMMC. Let's enable the
newly-added node.
Signed-off-by: Brian Norris
---
v3:
* no change
v2:
* better commit description
arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/
Hi,
On Thu, May 12, 2016 at 3:35 PM, Brian Norris wrote:
> Add description for the SDHCI v5.1 eMMC controller on rk3399. Fix it to
> 200 MHz, to support all supported timing modes.
>
> Note that 'rockchip,rk3399-sdhci-5.1' is not documented; we presumably
> have a compliant Arasan controller, but
Hello, Linus.
During v4.6-rc1 cgroup namespace support was merged. There is an
issue where it's impossible to tell whether a given cgroup mount point
is bind mounted or namespaced. Serge has been working on the issue
but it took longer than expected to resolve, so the late pull request.
Given t
On 05/09/2016 11:04 PM, Lijun Ou wrote:
> --- a/drivers/infiniband/hw/hns/hns_roce_device.h
> +++ b/drivers/infiniband/hw/hns/hns_roce_device.h
> @@ -29,10 +31,93 @@
> #define HNS_ROCE_AEQE_VEC_NUM1
> #define HNS_ROCE_AEQE_OF_VEC_NUM 1
>
> +#define ADDR_SHI
Hi,
On Fri, May 13, 2016 at 1:50 PM, Brian Norris wrote:
> From: Xing Zheng
>
> These clocks are all core clocks used by many blocks/peripherals, many
> of whose drivers don't set their clock rates at all. Let's assign
> reasonable default clock rates for these core clocks, so that these
> perip
> -Original Message-
> From: linux-kernel-ow...@vger.kernel.org [mailto:linux-kernel-
> ow...@vger.kernel.org] On Behalf Of Calvin Owens
> Sent: Friday, May 13, 2016 3:28 PM
...
> Subject: [PATCH] mpt3sas: Do scsi_remove_host() before deleting SAS PHY
> objects
>
...
> The issue is that
Hello, Linus.
CPU hotplug callbacks can invoke DOWN_FAILED w/o preceding
DOWN_PREPARE which can trigger a WARN_ON() in workqueue. The bug has
been there for a very long time. It only triggers if CPU down fails
at a specific point and I don't think it has adverse effects other
than the warning me
Hello.
On 05/13/2016 07:06 AM, Andrew Lunn wrote:
+ gpiod = fwnode_get_named_gpiod(&child->fwnode, "reset-gpios");
+ /* Deassert the reset signal */
+ if (!IS_ERR(gpiod))
+ gpiod_direction_output(gpiod, 0);
This is wrong I think. You must only ignore -ENODEV, a
On 05/09/2016 11:04 PM, Lijun Ou wrote:
> The HiSilicon Network Substem is a long term evolution IP which is
> supposed to be used in HiSilicon ICT SoCs. HNS (HiSilicon Network
> Sybsystem) also has a hardware support of performing RDMA with
> RoCEE.
> The driver for HiSilicon RoCEE(RoCE Engine) is
From: Shawn Lin
Signal integrity analysis has suggested we set these values. Do this in
power_on(), so that they get reconfigured after suspend/resume.
Signed-off-by: Shawn Lin
Signed-off-by: Brian Norris
---
v2:
* Sent only patch 2/4 with version 2, to avoid spamming; will move on to v3
f
This patch series adds device tree support for generic memory-mapped GPIOs.
The GPIO library already allows drivers and architecture support code to
reuse generic code for managing a GPIO chip. Currently, a developer has
to create a platform device "basic-mmio-gpio" and attach a bgpio_pdata
platfor
This patch adds support for the Western Digital's
MyBook Live memory-mapped GPIO controllers.
The GPIOs will be supported by the generic driver
for memory-mapped GPIO controllers.
Signed-off-by: Christian Lamparter
---
drivers/gpio/gpio-mmio.c | 4
1 file changed, 4 insertions(+)
diff --g
From: Álvaro Fernández Rojas
This patch adds support for defining memory-mapped GPIOs which
are compatible with the existing gpio-mmio interface. The generic
library provides support for many memory-mapped GPIO controllers
that are found in various on-board FPGA and ASIC solutions that
are used t
On Fri, May 13, 2016 at 11:46:33AM -0700, Doug Anderson wrote:
> On Thu, May 12, 2016 at 6:02 PM, Shawn Lin wrote:
> > On 2016/5/13 6:43, Brian Norris wrote:
> >> @@ -154,6 +167,20 @@ static int rockchip_emmc_phy_power_on(struct phy
> >> *phy)
> >> struct rockchip_emmc_phy *rk_phy = phy_ge
On Tuesday 10 May 2016 11:39:34 Bjorn Andersson wrote:
> On Mon 09 May 18:29 PDT 2016, Stephen Rothwell wrote:
>
> > Hi all,
> >
> > After merging the net-next tree, today's linux-next build (x86_64
> > allmodconfig) failed like this:
> >
> > net/qrtr/smd.c:106:14: error: initialization from inc
Hi Marcel,
> so I am not big fan of the conditional locking in case of parent is set or
> not. Do you have a test case that reproduces the mentioned race. It would
> love to have that in tools/l2cap-tester or similar.
So far I could only reproduce the bug by repeatedly performing RFCOMM
connec
Use setup_timer() and instead of init_timer(), being the preferred way
of setting up a timer.
Also, quoting the mod_timer() function comment:
-> mod_timer() is a more efficient way to update the expire field of an
active timer (if the timer is inactive it will be activated).
Use setup_timer()
Use setup_timer() and instead of init_timer(), being the preferred way
of setting up a timer.
Also, quoting the mod_timer() function comment:
-> mod_timer() is a more efficient way to update the expire field of an
active timer (if the timer is inactive it will be activated).
Use setup_timer()
Use setup_timer() and instead of init_timer(), being the preferred way
of setting up a timer.
Also, quoting the mod_timer() function comment:
-> mod_timer() is a more efficient way to update the expire field of an
active timer (if the timer is inactive it will be activated).
Use setup_timer()
We use netconsole to collect kernel logs from all the servers at
Facebook. We use this patch internally so each logline has a record of
which kernel version emitted it.
At first glance, this might seem lazy: as you would expect, we have a
database which records which kernel version a host is curre
Okay, I think it's finally time to release version 1.0 of rt-tests.
There aren't too many interesting changes this round, just a bunch of house
keeping things, like adding missing man-pages, and updating old ones.
Two interesting changes though are:
- We now compile with HAVE_PARSE_CPUSTRING_A
On 05/13/2016 11:44 PM, Andrew Lunn wrote:
Another issue is that on some boards we have one reset line tied to
multiple PHYs.How do we prevent multiple resets being taking place when each of
the PHYs are registered?
My patch just doesn't address this case -- it's about the
individual resets
On Thu, May 12, 2016 at 01:40:06PM -0600, Jason Gunthorpe wrote:
> On Thu, May 12, 2016 at 03:27:27PM -0400, Dennis Dalessandro wrote:
>
> > >>+static inline int check_ioctl_access(unsigned int cmd, unsigned long arg)
> > >>+{
> > >>+ int read_cmd, write_cmd, read_ok, write_ok;
> > >>+
> > >>+ rea
From: Xing Zheng
These clocks are all core clocks used by many blocks/peripherals, many
of whose drivers don't set their clock rates at all. Let's assign
reasonable default clock rates for these core clocks, so that these
peripherals get something reasonable by default, and also so that if
child
On 05/12/16 15:54, Kees Cook wrote:
>>
>> It would be far better to warn on the *type* of relocations rather than in
>> which section they feel.
>
> I'm open to specific changes. What's the best way to detect what you want
> here?
>
Use readelf -r and look for inappropriate relocation types (w
> >Another issue is that on some boards we have one reset line tied to
> >multiple PHYs.How do we prevent multiple resets being taking place when each
> >of
> >the PHYs are registered?
>
>My patch just doesn't address this case -- it's about the
> individual resets only.
This actually needs
On 05/13/2016 03:40 PM, Jeff Kirsher wrote:
> On Fri, 2016-05-13 at 12:50 -0400, Doug Ledford wrote:
>> On 05/01/2016 08:07 AM, Julia Lawall wrote:
>>> The i40e_client_ops structure is never modified, so declare it as
>> const.
>>>
>>> Done with the help of Coccinelle.
>>>
>>> Signed-off-by: Ju
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