On Fri 22-04-16 22:53:00, Sergey Senozhatsky wrote:
> Change `synchronous' printk param to be RW, so user space
> can change printk mode back and forth to/from sync mode
> (which is considered to be more reliable).
>
> Signed-off-by: Sergey Senozhatsky
The patch looks good to me. One suggestion
Hi,
On Fri, Apr 22, 2016 at 01:02:55PM +0300, Dan Carpenter wrote:
> - int err, pipe, len, size, count, sent = 0;
> + int len = 0;
> + int err, pipe, size, count, sent = 0;
Is there any particular reason to avoid more than 1 variable
initialization in definition on a single line ?, l
Some generic-ehci compatible controllers have more than one reset signal
lines, e.g., Synopsys DWC USB2.0 Host-AHB Controller has two resets bus_reset
and roothub_reset. Two more resets are added in this patch in order for this
kind of controller to use this driver directly.
Signed-off-by: Jianche
---
MDaemon has detected restricted attachments within an email message
---
>From : linux-kernel@vger.kernel.org
To: chen...@interocean.in
Subject : Hello
Hi Rob,
Thanks for the review...
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Saturday, April 23, 2016 1:07 AM
> To: Appana Durga Kedareswara Rao
> Cc: pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk; ga...@codeaurora.org; Mi
On Fri, Apr 22, 2016 at 04:41:05PM -0700, Bjorn Andersson wrote:
> On Fri 22 Apr 15:17 PDT 2016, Andy Gross wrote:
>
> [..]
> > diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
> [..]
> > +
> > +/**
> > + * struct qcom_scm_desc
> > + * @arginfo: Metadata describing the
On Fri, 2016-04-22 at 21:02 -0700, Shi, Yang wrote:
> Hi David,
>
> When I ran some test on a nfs mounted rootfs, I got the below warning
> with LOCKDEP enabled on linux-next-20160420:
>
> WARNING: CPU: 9 PID: 0 at include/net/sock.h:1408
> udp_queue_rcv_skb+0x3d0/0x660
> Modules linked in:
> C
On Fri, Apr 22, 2016 at 04:50:05PM -0700, Bjorn Andersson wrote:
> On Fri 22 Apr 15:17 PDT 2016, Andy Gross wrote:
>
> > This patch changes the cold_set_boot_addr function to use atomic SCM
> > calls. This removes the need for memory allocation and instead places
> > all arguments in registers.
>
On Fri, Apr 22, 2016 at 04:23:31PM -0700, Bjorn Andersson wrote:
> On Fri 22 Apr 15:17 PDT 2016, Andy Gross wrote:
>
> > This patch adds APIs for the scm-32 and scm-64 to use for coherent memory
> > allocation.
> >
> > Signed-off-by: Andy Gross
>
> This patch must come before the ARM64 implemen
On Fri, Apr 22, 2016 at 04:11:11PM -0700, Bjorn Andersson wrote:
> On Fri 22 Apr 15:17 PDT 2016, Andy Gross wrote:
>
> [..]
> > diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
> [..]
> > +static struct qcom_scm *__scm;
> > +
> > +static int qcom_scm_clk_enable(void)
> > +{
>
On 04/22/2016 12:56 AM, Adrian Hunter wrote:
The call_paths table already has symbol_id which belongs uniquely to a DSO,
so why do we need dso_id as well?
If the symbol_id is 0 because the IP could not be resolved to a symbol,
this is not necessarily a valid assumption. Without a dso_id in the
When kernel oops happens in some kernel thread, i.e. kcompactd in the test,
the below bug might be triggered by the oops handler:
BUG: sleeping function called from invalid context at include/linux/sched.h:2858
in_atomic(): 0, irqs_disabled(): 1, pid: 110, name: kcompactd0
CPU: 6 PID: 110 Comm: kc
Hi David,
When I ran some test on a nfs mounted rootfs, I got the below warning
with LOCKDEP enabled on linux-next-20160420:
WARNING: CPU: 9 PID: 0 at include/net/sock.h:1408
udp_queue_rcv_skb+0x3d0/0x660
Modules linked in:
CPU: 9 PID: 0 Comm: swapper/9 Tainted: G D
4.6.0-rc4-next-2016
On Fri, Apr 22, 2016 at 05:53:11PM +0100, Will Deacon wrote:
> On Sat, Apr 23, 2016 at 12:08:57AM +0800, Boqun Feng wrote:
> > On Tue, Apr 12, 2016 at 05:59:41PM +0100, Will Deacon wrote:
> > [...]
> > > > +static inline void __cmpwait(volatile void *ptr, unsigned long val,
> > > > int size)
> > >
Hello Petr,
On (04/21/16 13:48), Petr Mladek wrote:
> extern void printk_nmi_flush(void);
> +extern void printk_nmi_flush_on_panic(void);
> #else
> static inline void printk_nmi_flush(void) { }
> +static inline void printk_nmi_flush_on_panic(void) { }
[..]
> +void printk_nmi_flush_on_panic(void
Hi, Yury
On 2016/4/6 6:44, Yury Norov wrote:
There are about 20 failing tests of 782 in lite scenario.
float_bessel
float_exp_log
float_iperb
float_power
float_trigo
pipeio_1
pipeio_3
pipeio_5
pipeio_8
abort01
clone02
kill11
mmap16
open12
pause01
rename11
rmdir02
umount2_01
umount2_02
umount2_03
On Sat, Apr 23, 2016 at 04:37:36AM +0200, Peter Zijlstra wrote:
> On Sat, Apr 23, 2016 at 12:08:57AM +0800, Boqun Feng wrote:
> > How about replace smp_rmb() with a smp_acquire_barrier__after_cmpwait()?
> > This barrier is designed to provide an ACQUIRE ordering when combining a
> > cmpwait() .
>
Modifying perf script to print call trees in the opposite order or
applying patch 2 from this series and comparing the results output from
export-to-postgtresql.py are the easiest ways to see the bug, however it
can still be seen in current builds using perf report.
Here is how i can reproduce
On Fri, Apr 22, 2016 at 09:35:06PM +0300, Kalle Valo wrote:
> Fengguang Wu writes:
>
> >> OK, weirdness. I received the "BUILD SUCCESS" email without any arm64
> >> builds listed, but I just received a build bot email telling me the
> >> arm64 build was borked (which I know it is).
> >
> > Sorry,
On Sat, Apr 23, 2016 at 12:08:57AM +0800, Boqun Feng wrote:
> How about replace smp_rmb() with a smp_acquire_barrier__after_cmpwait()?
> This barrier is designed to provide an ACQUIRE ordering when combining a
> cmpwait() .
That's a horrible name for a barrier :-)
> And cmpwait() only has minimal
Hi, Yury
On 2016/4/23 5:59, Yury Norov wrote:
On Fri, Apr 22, 2016 at 04:58:18PM +0100, Catalin Marinas wrote:
On Wed, Apr 06, 2016 at 01:08:34AM +0300, Yury Norov wrote:
From: Bamvor Jian Zhang
With the patches of ILP32, COMPAT is not equivalent to AARCH32 in EL0.
This patch fix this by upd
On Sat, Apr 23, 2016 at 12:41:57AM +0800, Boqun Feng wrote:
> > +#define ATOMIC_FETCH_OP_RELAXED(op, asm_op)
> > \
> > +static inline int atomic_fetch_##op##_relaxed(int a, atomic_t *v) \
> > +{ \
> >
The file atari_NCR5380.c has been removed from the tree so remove it
from the MAINTAINERS file as well.
While we are here, add the file dtc3x80.txt as it is only relevant
to the dtc driver.
Signed-off-by: Finn Thain
---
The patch which removed atari_NCR5380.c is queued in jejb-scsi/for-next
On Fri, Apr 22, 2016 at 11:04:23AM +0200, Peter Zijlstra wrote:
> +#define ATOMIC_FETCH_OP(op) \
> +static inline int atomic_fetch_##op(int i, atomic_t *v)
> \
> +{\
>
Thanks for the review.
Atleast for ext4 this crash happens on a sys_umount() call, timing of
which is not in control of block driver. Block driver cannot force the
filesystems to be unmounted, and the file system does not expect
buffers to get unmapped under it.
Ext4 can be fixed with the this
On 04/22/2016 06:16 AM, Mike Galbraith wrote:
> On Fri, 2016-04-22 at 17:23 +0900, Greg Kroah-Hartman wrote:
>> On Fri, Apr 22, 2016 at 10:10:59AM +0200, Sebastian M. Bobrecki wrote:
>>> W dniu 22.04.2016 o 09:55, Greg Kroah-Hartman pisze:
On Fri, Apr 22, 2016 at 09:47:04AM +0200, Sebastian M.
On Fri, Apr 22, 2016 at 04:23:03PM +0200, Peter Zijlstra wrote:
> On Fri, Apr 22, 2016 at 08:56:56PM +0800, Fengguang Wu wrote:
> > I'll add arm64-defconfig to P1 list to improve its coverage.
>
> Thanks; any more architectures missing from P1?
Good question! Just double checked and find s390 sti
On Fri, Apr 22, 2016 at 09:57:04AM -0700, Richard Henderson wrote:
> On 04/22/2016 02:04 AM, Peter Zijlstra wrote:
> > + "1: ldl_l %0,%1\n" \
> > + " mov %0,%2\n"\
> > + " " #asm_op " %0,%3,%0
Forwarding to mailing list.
I think this is useful info so I like to share.
-Original Message-
From: Tejun Heo [mailto:hte...@gmail.com] On Behalf Of Tejun Heo
Sent: Friday, April 22, 2016 1:29 PM
To: m...@mkp.net; Soohoon Lee
Cc: Ben Hutchings; Arnd Bergmann
Subject: Re: SATA hot unplug q
> From: Vitaly Kuznetsov [mailto:vkuzn...@redhat.com]
> Sent: Saturday, April 23, 2016 0:21
> To: de...@linuxdriverproject.org
> Cc: linux-kernel@vger.kernel.org; KY Srinivasan ; Haiyang
> Zhang ; Dexuan Cui
> Subject: [PATCH] tools: hv: lsvmbus: add pci pass-through UUID
>
> lsvmbus keeps its ow
There are no users of rtctimer left. Remove its code as this is the
in-kernel user of the legacy PC RTC driver that will hopefully be removed
at some point.
Signed-off-by: Alexandre Belloni
---
Note that I've kept the definition of SNDRV_TIMER_GLOBAL_RTC as it is exposed to
userspace. USerspace w
On Fri, Apr 22, 2016 at 11:30:45AM +0200, Greg Kurz wrote:
>On Fri, 22 Apr 2016 17:21:03 +0800
>Wei Yang wrote:
>
>> Hi, Greg
>>
>
>Hi Wei !
>
>> One confusion.
>>
>> There are 5 kvm_arch_vcpu_create() while in this patch you changed 2 of them.
>> Some particular reason?
>>
>
>Yes and the reaso
When CONFIG_FS_DAX_PMD is set, DAX supports mmap() using pmd page
size. This feature relies on both mmap virtual address and FS
block (i.e. physical address) to be aligned by the pmd page size.
Users can use mkfs options to specify FS to align block allocations.
However, aligning mmap address requ
When CONFIG_FS_DAX_PMD is set, DAX supports mmap() using pmd page
size. This feature relies on both mmap virtual address and FS
block (i.e. physical address) to be aligned by the pmd page size.
Users can use mkfs options to specify FS to align block allocations.
However, aligning mmap address requ
To support DAX pmd mappings with unmodified applications,
filesystems need to align an mmap address by the pmd size.
Call thp_get_unmapped_area() from f_op->get_unmapped_area.
Note, there is no change in behavior for a non-DAX file.
Signed-off-by: Toshi Kani
Cc: Andrew Morton
Cc: Alexander Vir
The cgroup support for cqm is broken. Instead of mapping RMID to a
cgroup currently its mapped to the task and then hence when task moves
cgroup we get incorrect count.
Also the conflict handling code which is meant to handle the case of
co-existing cgroup and task events, is broken. It reports ve
For MBM, since we report total bytes for the duration the perf counts,
we need to keep the total bytes counted every time we loose an RMID.
Introduce rc_count(recycle count) per event
keep this history count(all bytes counted before the current RMID).
If we do not keep this count separately then w
When multiple instances of perf reuse RMID, then we need to start
counting for each instance rather than reporting the current RMID count.
This patch adds a st_count(start count) per event to track the same.
Signed-off-by: Vikas Shivappa
---
arch/x86/events/intel/cqm.c | 71 +
Sending some urgent fixes for the MBM(memory b/w monitoring) which is
upstreamed from 4.6-rc1. Patches apply on 4.6-rc1.
CQM and MBM counters reported some incorrect counts for different
scenarios like interval mode or for multiple perf instances. The
1/4,2/4,3/4 address these issues.
The last pa
During RMID recycling, when an event loses the RMID we saved the counter
for group leader but it was not being saved for all the events in an
event group. This would lead to a situation where if 2 perf instances
are counting the same PID one of them would not see the updated count
which other perf
Hi Linus,
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input.git for-linus
to receive updates for the input subsystem. Just minor driver fixes.
Changelog:
-
Charles Keepax (1):
Input: arizona-haptic - don't assign input_dev parent
Dmitry Torokhov
On Fri 22 Apr 15:17 PDT 2016, Andy Gross wrote:
> This adds the devicetree node for the SCM firmware.
>
> Signed-off-by: Andy Gross
Acked-by: Bjorn Andersson
Regards,
Bjorn
On Fri 22 Apr 15:17 PDT 2016, Andy Gross wrote:
> This patch adds the firmware node for the SCM
>
> Signed-off-by: Andy Gross
Acked-by: Bjorn Andersson
Regards,
Bjorn
On 4/11/2016 3:25 PM, William Breathitt Gray wrote:
The PNPBIOS driver requires preprocessor defines (located in
include/asm/segment.h) only declared if the architecture is set to
X86_32. If the architecture is set to X86_64, the PNPBIOS driver will
not build properly. The X86 dependecy for the P
On Fri 22 Apr 15:17 PDT 2016, Andy Gross wrote:
> This patch changes the cold_set_boot_addr function to use atomic SCM
> calls. This removes the need for memory allocation and instead places
> all arguments in registers.
>
> Signed-off-by: Andy Gross
> ---
> drivers/firmware/qcom_scm-32.c | 40
On 21/04/2016 at 20:24:19 +0200, Mylène Josserand wrote :
> @@ -731,11 +786,9 @@ static void rv3029_hwmon_register(struct device *dev,
> const char *name)
>
> #endif /* CONFIG_RTC_DRV_RV3029_HWMON */
>
> -static const struct rtc_class_ops rv3029_rtc_ops = {
> +static struct rtc_class_ops rv30
On Fri 22 Apr 15:17 PDT 2016, Andy Gross wrote:
[..]
> diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
[..]
> +
> +/**
> + * struct qcom_scm_desc
> + * @arginfo: Metadata describing the arguments in args[]
> + * @args: The array of arguments for the secure syscall
> +
On 21/04/2016 at 20:24:18 +0200, Mylène Josserand wrote :
> The RTC RV3029 handles different types of alarms : seconds, minutes, ...
> These alarms can be enabled or disabled individually using an AE_x bit
> which is the last bit (BIT(7)) on each alarm registers.
>
> To prepare the alarm IRQ suppo
On 23/04/2016 at 01:29:46 +0200, Alexandre Belloni wrote :
> Hi,
>
> On 21/04/2016 at 20:24:17 +0200, Mylène Josserand wrote :
> > @@ -829,8 +829,6 @@ static void rv3029_unregister_driver(void)
> >
> > static int rv3049_probe(struct spi_device *spi)
> > {
> > - int res;
> > - unsigned int
Hi,
On 21/04/2016 at 20:24:17 +0200, Mylène Josserand wrote :
> @@ -829,8 +829,6 @@ static void rv3029_unregister_driver(void)
>
> static int rv3049_probe(struct spi_device *spi)
> {
> - int res;
> - unsigned int tmp;
Well, you just introduced those variables in the previous patch.
>
On Fri 22 Apr 15:17 PDT 2016, Andy Gross wrote:
> This patch adds APIs for the scm-32 and scm-64 to use for coherent memory
> allocation.
>
> Signed-off-by: Andy Gross
This patch must come before the ARM64 implementation.
> ---
> drivers/firmware/qcom_scm.c | 17 +
> drivers/f
On Fri, 2016-04-22 at 14:27 +0800, Yangbo Lu wrote:
> Add maintainer entry for Freescale SoC specific driver including
> the QE library and the GUTS driver. Also add entry for GUTS driver
> and add maintainer for QE library.
>
> Signed-off-by: Yangbo Lu
> ---
> Changes for v8:
> - Added thi
On Fri, 2016-04-22 at 10:20 +0100, Mark Brown wrote:
> On Wed, Apr 13, 2016 at 11:15:13AM -0400, David Miller wrote:
> > From: Stephen Rothwell
>
> > > After merging the net-next tree, today's linux-next build (arm
> > > allmodconfig) failed like thisi (this has actually been failing
> for a
> >
Current kernel (4.6.0-rc4+) + GCC 5.3.0 definitely truncated
qla2x00_get_host_fabric_name() routine. Just like Josh indicated, we’re
dropping down to the next routine.
root@mars:/sys/class/fc_host/host3 2016-04-22 16:07:30
> cat fabric_name
Killed
——
static void
qla2x00_get_host_fabric_name(s
On 04/04/2016 at 11:00:52 +0100, Russell King - ARM Linux wrote :
> > + /* Copy chunk specific code/data */
> > + fncpy((char *)chunk->addr, code_start, code_sz);
>
> Sorry, NAK. This abuses fncpy(). There is extensive documentation on
> the proper use of this in asm/fncpy.h, and anything th
This code is used to unlock a device during resume from "suspend to RAM". It
allows the userspace to set a key for a locking range. This key is stored in
the module memory, and will be replayed later (using the OPAL protocol, through
the NVMe driver) to unlock the locking range.
The nvme_opal_unlo
On Fri, Apr 22, 2016 at 11:53:48PM +0200, Florian Margaine wrote:
> On Tue, Apr 19, 2016 at 1:06 AM, Dave Chinner wrote:
> >> A way to query freeze state might be nice, I think, but yeah, it's
> >> racy, so you can't depend on it - but it might be useful in the "huh,
> >> IO is failing, what's goi
This patch series implement a small set of the Opal protocol for self
encrypting devices. It's implemented only what is needed for saving a password
and unlocking a given "locking range". The password is saved on the driver and
replayed back to the device on resume from suspend to RAM. It is specif
On Fri 22 Apr 15:17 PDT 2016, Andy Gross wrote:
> This patch moves the qcom_scm_remap_error function to the include file
> where can be used by both the 32 and 64 bit versions of the code.
>
> Signed-off-by: Andy Gross
> Signed-off-by: Andy Gross
Acked-by: Bjorn Andersson
Regards,
Bjorn
Two ioctls are added to the NVMe namespace: NVME_IOCTL_SAVE_OPAL_KEY and
NVME_IOCTL_UNLOCK_OPAL. These ioctls map directly to the respective
nvme_opal_register() and nvme_opal_unlock() functions.
Additionally, nvme_opal_unlock() is called upon nvme_revalidate_disk, so it
will try to unlock a locki
On Fri 22 Apr 15:17 PDT 2016, Andy Gross wrote:
> This patch adds the device tree support for the Qualcomm SCM firmware.
>
> Signed-off-by: Andy Gross
Acked-by: Bjorn Andersson
Regards,
Bjorn
On Fri 22 Apr 15:17 PDT 2016, Andy Gross wrote:
[..]
> diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
[..]
> +static struct qcom_scm *__scm;
> +
> +static int qcom_scm_clk_enable(void)
> +{
> + int ret;
> +
> + ret = clk_prepare_enable(__scm->core_clk);
> + if (
On 04/21, Stephen Boyd wrote:
> Add registration APIs in the clk mux code to return struct clk_hw
> pointers instead of struct clk pointers. This way we hide the
> struct clk pointer from providers unless they need to use
> consumer facing APIs.
>
> Signed-off-by: Stephen Boyd
> ---
Applied to c
On 04/21, Stephen Boyd wrote:
> Add registration APIs in the clk fixed-rate code to return struct
> clk_hw pointers instead of struct clk pointers. This way we hide
> the struct clk pointer from providers unless they need to use
> consumer facing APIs.
>
> Signed-off-by: Stephen Boyd
> ---
Appli
On 04/21, Stephen Boyd wrote:
> Add registration APIs in the clk gpio code to return struct
> clk_hw pointers instead of struct clk pointers. This way we hide
> the struct clk pointer from providers unless they need to use
> consumer facing APIs.
>
> Signed-off-by: Stephen Boyd
> ---
Applied to
On 04/21, Stephen Boyd wrote:
> Add registration APIs in the clk fractional divider code to
> return struct clk_hw pointers instead of struct clk pointers.
> This way we hide the struct clk pointer from providers unless
> they need to use consumer facing APIs.
>
> Signed-off-by: Stephen Boyd
> --
On 04/21, Stephen Boyd wrote:
> Add registration APIs in the clk composite code to return struct
> clk_hw pointers instead of struct clk pointers. This way we hide
> the struct clk pointer from providers unless they need to use
> consumer facing APIs.
>
> Signed-off-by: Stephen Boyd
> ---
Applie
On 04/21, Stephen Boyd wrote:
> Add registration APIs in the clk fixed-factor code to return
> struct clk_hw pointers instead of struct clk pointers. This way
> we hide the struct clk pointer from providers unless they need to
> use consumer facing APIs.
>
> Signed-off-by: Stephen Boyd
> ---
App
On 04/21, Stephen Boyd wrote:
> Add registration APIs in the clk gate code to return struct
> clk_hw pointers instead of struct clk pointers. This way we hide
> the struct clk pointer from providers unless they need to use
> consumer facing APIs.
>
> Signed-off-by: Stephen Boyd
> ---
Applied to
On 04/22/16 12:44, Nicolas Pitre wrote:
> On Fri, 22 Apr 2016, Nicolas Pitre wrote:
>
>> On Fri, 22 Apr 2016, Randy Dunlap wrote:
>>
>>> Yes, this patch helps, but I think there is still a problem.
>>> I think that trim needs to be done after CONFIG_BUILD_DOCSRC and possibly
>>> after CONFIG_SAMPL
Hi Dan,
On Fri, Apr 22, 2016 at 06:01:08PM +0800, dan.huang wrote:
> From: "jeffrey.lin"
>
> Raydium I2C touch driver.
>
> Signed-off-by: jeffrey.lin
When you are sending a patch over you need to add your sign-off to it.
Also I am still getting compile errors/warnings:
CC [M] drivers/inp
Hi,
On 04/04/2016 at 10:57:57 +0100, Russell King - ARM Linux wrote :
> [Manually reformatted your email so I can reply to it sensibly - please
> don't make me have to do this again, next time I'll ignore your message
> as it's too much effort, thanks]
>
Well, I fixed my editor configuration so
The mm-of-the-moment snapshot 2016-04-22-15-49 has been uploaded to
http://www.ozlabs.org/~akpm/mmotm/
mmotm-readme.txt says
README for mm-of-the-moment:
http://www.ozlabs.org/~akpm/mmotm/
This is a snapshot of my -mm patch queue. Uploaded at random hopefully
more than once a week.
You wi
On Thursday 21 April 2016 14:29:02 Viresh Kumar wrote:
> diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
> index 79d0a5d9da8e..f24f46776fbb 100644
> --- a/arch/arm/mach-mvebu/pmsu.c
> +++ b/arch/arm/mach-mvebu/pmsu.c
> @@ -685,8 +685,6 @@ static int __init armada_xp_pmsu_cpufre
On Thu, Apr 21, 2016 at 02:11:19PM +0200, Holger Schurig wrote:
> Thierry Reding writes:
> > Applied, thanks.
>
> I once read that this is the recommended way to go, instead of
> specifying the timings in the device tree. Why is this so? Any new
> display just increases the .text size of the ker
--
Dear Friend,
I am Mr. Derick Ahmed , I am a Pharmacist with an Agro Allied Industry
This company engages in the production of animal injections, dietary
supplements and Antiviral Drugs also partners with World Health
Organization (WHO) in producing vaccines used on animals for related
diseases
On 04/21, Viresh Kumar wrote:
> @@ -167,14 +167,16 @@ static int cpufreq_init(struct cpufreq_policy *policy)
> /* Get OPP-sharing information from "operating-points-v2" bindings */
> ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, policy->cpus);
> if (ret) {
> + if (ret
Stephan has recently proposed some extensive changes to this driver,
and I proposed a quite different set earlier. My set can be found at:
https://github.com/sandy-harris
This post tries to find the bits of both proposals that seem clearly
worth doing and entail neither large implementation proble
Instead of having non-standard memcpy() behavior, explicitly call the new
function memmove(), make it available to the decompressors, and switch
the two overlap cases (screen scrolling and ELF parsing) to use memmove().
Additionally documents the purpose of compressed/string.c.
Suggested-by: Lasse
On 04/21, Viresh Kumar wrote:
> There are no more users of platform-data for cpufreq-dt driver, get rid
> of it.
>
> Signed-off-by: Viresh Kumar
> ---
Reviewed-by: Stephen Boyd
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On Fri, Apr 22, 2016 at 01:05:47PM +0200, Jiri Slaby wrote:
> This is the start of the stable review cycle for the 3.12.59 release.
> There are 78 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> R
On 04/21, Viresh Kumar wrote:
> @@ -683,10 +678,15 @@ static int __init armada_xp_pmsu_cpufreq_init(void)
> clk_put(clk);
> return ret;
> }
> +
> + ret = dev_pm_opp_set_sharing_cpus(cpu_dev,
> + (struc
* Peter Ujfalusi [160422 06:15]:
>
> From the documents it is also clear that McBSPLP.sidetone is using the
> McBSPLP's ICLK, but what is not explained in the TRM is that there are
> internal clocks going from McBSP to sidetone for the data bus between them.
> The iclk is needed so the core can k
On 04/21, Viresh Kumar wrote:
> Move dev_pm_opp_set_sharing_cpus() towards the end of the file. This
> is required for better readability after the next patch is applied,
> which adds dev_pm_opp_get_sharing_cpus().
>
> Signed-off-by: Viresh Kumar
> ---
Reviewed-by: Stephen Boyd
Although the ne
On 04/21, Viresh Kumar wrote:
> diff --git a/drivers/base/power/opp/cpu.c b/drivers/base/power/opp/cpu.c
> index 55cbf9bd8707..9c4eb90759fb 100644
> --- a/drivers/base/power/opp/cpu.c
> +++ b/drivers/base/power/opp/cpu.c
> @@ -329,3 +329,48 @@ int dev_pm_opp_set_sharing_cpus(struct device *cpu_dev,
* Pali Rohár [160422 06:50]:
> On Tuesday 05 January 2016 17:12:50 Tony Lindgren wrote:
> > * Pali Rohár [160105 02:19]:
> > > On Saturday 02 January 2016 09:06:57 Tony Lindgren wrote:
> > > >
> > > > Yup please take a look at thread "[PATCH 0/3] pwm: omap: Add PWM support
> > > > using dual-mode
This patch adds the device tree support for the Qualcomm SCM firmware.
Signed-off-by: Andy Gross
---
.../devicetree/bindings/firmware/qcom,scm.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt
diff
On 04/21, Viresh Kumar wrote:
> opp core allows OPPs to be explicitly marked as shared from platform
> code, in case of operating-point v1 bindings.
>
> Though we do everything fine in that case, we don't set the flag in the
> opp-table to indicate that the OPPs are shared. It works fine today as
The nommu do_mmap expects f_op->get_unmapped_area to either succeed or
return -ENOSYS for VM_MAYSHARE (e.g. private read-only) mappings.
Returning addr in the non-MAP_SHARED case was completely wrong, and
only happened to work because addr was 0. However, it prevented
VM_MAYSHARE mappings from shar
The following set of patches does a bit of rework on the existing
Qualcomm SCM firmware. The first couple of patches deals with turning
the current SCM into a platform driver. The next couple are cleanups
that make adding the 64 support a little easier.
I took Kumar's 64 bit support patch and mo
From: Kumar Gala
Add an implementation of the SCM interface that works on ARM64 SoCs. This
is used by things like determine if we have HDCP support or not on the
system.
Signed-off-by: Kumar Gala
Signed-off-by: Andy Gross
---
drivers/firmware/qcom_scm-32.c | 4 +
drivers/firmware/qcom_scm-
This patch converts the Qualcomm SCM firmware driver into a platform
driver.
Signed-off-by: Andy Gross
---
arch/arm64/Kconfig.platforms | 1 +
drivers/firmware/qcom_scm.c | 154 ---
2 files changed, 147 insertions(+), 8 deletions(-)
diff --git a/arch/a
On Fri, Apr 22, 2016 at 12:56:03PM -0600, Bruce Rogers wrote:
> Commit d28bc9dd25ce reversed the order of two lines which initialize cr0,
> allowing the current (old) cr0 value to mess up vcpu initialization.
> This was observed in the checks for cr0 X86_CR0_WP bit in the context of
> kvm_mmu_reset
This patch moves the qcom_scm_remap_error function to the include file
where can be used by both the 32 and 64 bit versions of the code.
Signed-off-by: Andy Gross
Signed-off-by: Andy Gross
---
drivers/firmware/qcom_scm-32.c | 17 -
drivers/firmware/qcom_scm.h| 16 +++
This patch adds APIs for the scm-32 and scm-64 to use for coherent memory
allocation.
Signed-off-by: Andy Gross
---
drivers/firmware/qcom_scm.c | 17 +
drivers/firmware/qcom_scm.h | 4
2 files changed, 21 insertions(+)
diff --git a/drivers/firmware/qcom_scm.c b/drivers/fir
On Fri, Apr 22, 2016 at 04:05:31PM -0600, David Ahern wrote:
> On 4/22/16 2:52 PM, Arnaldo Carvalho de Melo wrote:
> >Em Wed, Apr 20, 2016 at 04:04:12PM -0700, Alexei Starovoitov escreveu:
> >>On Wed, Apr 20, 2016 at 07:47:30PM -0300, Arnaldo Carvalho de Melo wrote:
> >
> >>Nice. I like it. That's
This patch changes the cold_set_boot_addr function to use atomic SCM
calls. This removes the need for memory allocation and instead places
all arguments in registers.
Signed-off-by: Andy Gross
---
drivers/firmware/qcom_scm-32.c | 40 ++--
1 file changed, 26 i
On Fri, Apr 22, 2016 at 12:49 AM, Ingo Molnar wrote:
>
> * Kees Cook wrote:
>
>> Two uses of memcpy (screen scrolling and ELF parsing) were handling
>> overlapping memory areas. While there were no explicitly noticed bugs
>> here (yet), it is best to fix this so that the copying will always be
>>
This patch adds the firmware node for the SCM
Signed-off-by: Andy Gross
---
arch/arm/boot/dts/qcom-apq8084.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi
b/arch/arm/boot/dts/qcom-apq8084.dtsi
index a33a09f..711b6fb 100644
--- a/arch/arm/
This adds the devicetree node for the SCM firmware.
Signed-off-by: Andy Gross
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 9681200..d912cd7 100644
---
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