> -Original Message-
> From: Anup Patel [mailto:anup.pa...@broadcom.com]
> Sent: 30 October 2015 11:49
> To: David Woodhouse; Brian Norris; Linux MTD
> Cc: Rob Herring; Pawel Moll; Mark Rutland; Catalin Marinas; Will Deacon;
> Sudeep Holla; Ian Campbell; Kumar Gala; Ray Jui; Scott Branden
Hi All,
Please disregard this patchset.
There is an accidental typo in patch2.
We should use ~CFG_BUS_WIDTH instead of CFG_BUS_WIDTH
in patch2. I will quickly send v5 patchset to fix this.
Sorry, for the noise.
Regards,
Anup
--
To unsubscribe from this list: send the line "unsubscribe linux-ke
Hello!
> > Add documentation for new subnode properties, allowing bank configuration.
> > Based on u-boot implementation, but heavily reworked.
>
> Please, carefully look at:
> Documentation/devicetree/bindings/net/gpmc-eth.txt
> Documentation/devicetree/bindings/bus/ti-gpmc.txt
Thank you very
Hello!
> > .../bindings/arm/samsung/exynos-srom.txt | 50 ++-
> > arch/arm/boot/dts/exynos5410-smdk5410.dts | 41 +++
> > arch/arm/boot/dts/exynos5410.dtsi | 15 ++
> > arch/arm/mach-exynos/Kconfig | 2 +-
Hello!
> -Original Message-
> From: linux-samsung-soc-ow...@vger.kernel.org
> [mailto:linux-samsung-soc-ow...@vger.kernel.org]
> On Behalf Of Pankaj Dubey
> Sent: Thursday, October 29, 2015 8:28 PM
> To: Pavel Fedin
> Cc: devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
Add DT bindings documentation for the rk3288 crypto drivers.
Signed-off-by: Zain Wang
---
.../devicetree/bindings/crypto/rk-crypto.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/rk-crypto.txt
diff --git a/Docu
set an id for crypto clk, so that it can be called in other part.
Signed-off-by: Zain Wang
---
drivers/clk/rockchip/clk-rk3288.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip/clk-rk3288.c
index 9040878..d74bd5d 10064
Add Crypto drivers for rk3288 including crypto controller and dma clk.
Signed-off-by: Zain Wang
---
arch/arm/boot/dts/rk3288.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 6a79c9c..1706706 100644
---
This commit support three cipher(AES/DES/DES3) and two chainmode(ecb/cbc),
and the more algorithms or new hash drivers will be added later on.
Zain Wang (4):
Crypto: Crypto driver support aes/des/des3 for rk3288
clk: rockchip: set an id for crypto clk
ARM: dts: rockchip: Add Crypto drivers f
Crypto driver support cbc/ecb two chainmode, and aes/des/des3 three cipher mode.
The names registered are:
ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
You can alloc tags above in your case.
And other algorithms and platforms will be added later on.
Signed-off-by: Zain Wang
On 29.10.2015 21:42, Pavel Fedin wrote:
> Add documentation for new subnode properties, allowing bank configuration.
> Based on u-boot implementation, but heavily reworked.
Please, carefully look at:
Documentation/devicetree/bindings/net/gpmc-eth.txt
Documentation/devicetree/bindings/bus/ti-gpmc.t
On Thu, Oct 29, 2015 at 10:45:44AM +0100, Paolo Bonzini wrote:
>
>
> On 29/10/2015 04:11, Alex Williamson wrote:
> > > The irqfd is already able to schedule a work item, because it runs with
> > > interrupts disabled, so I think we can always return IRQ_HANDLED.
> >
> > I'm confused by this. The
From: Thomas Abraham
The S2MPS15 PMIC is similar in functionality to S2MPS11/14 PMIC. It contains
27 LDO and 10 Buck regulators and allows programming these regulators via a
I2C interface. This patch adds initial support for LDO/Buck regulators of
S2MPS15 PMIC.
Signed-off-by: Thomas Abraham
Sig
From: Thomas Abraham
Add support for S2MPS15 PMIC which is similar to S2MPS11 PMIC. The S2MPS15
PMIC supports 27 LDO regulators, 10 buck regulators, RTC, three 32.768KHz
clock outputs and battery charger. This patch adds initial support for
LDO and buck regulators of S2MPS15 device.
Signed-off-b
RTC found in s2mps15 is almost same as one found on s2mps13
with few differences in RTC_UPDATE register fields, like:
1> Bit[4] and Bit[1] are reversed
- On s2mps13
WUDR -> bit[4], AUDR -> bit[1]
- On s2mps15
WUDR -> bit[1], AUDR -> bit[4]
2> In case of s2mps13, for alarm
From: Thomas Abraham
Add dt-binding documentation for s2mps15 PMIC device. The s2mps15 device
is similar to s2mps11/14 PMIC device and has 27 LDO and 10 buck regulators.
This also supports RTC and three 32.768KHz clock outputs.
Cc: devicet...@vger.kernel.org
Signed-off-by: Thomas Abraham
Signed
Samsung's S2MPS15 PMIC is targetted to be used with Samsung's Exynos7 SoC.
The S2MPS15 PMIC is similar in functionality to S2MPS11/14 PMIC. It contains
27 LDO and 10 Buck regulators, RTC, three 32.768 KHz clock outputs and allows
programming these blocks via a I2C interface. This patch series adds
On Saturday 17 October 2015 07:06 PM, Alexey Brodkin wrote:
> Perf uses atomic options and so it is required to have atomics enabled
> in toolchain.
>
> In case of ARC atomics are enabled by default for ARCv2 but disabled for
> ARCv1. Now we explicitly enable atomics for either ARC achitecture
> ve
On Thursday 29 October 2015 09:28 PM, Alexey Brodkin wrote:
> Hi Vineet,
>
> On Tue, 2015-10-20 at 10:45 +, Vineet Gupta wrote:
>> On Tuesday 20 October 2015 03:41 PM, Peter Zijlstra wrote:
> Can we use existing syscall(s) - again this is what our good old pthread
> library
> code
The NAND controller on NS2 SoC is compatible with existing
BRCM IPROC NAND driver so let's enable it in NS2 DT and
NS2 SVK DT.
This patch also fixes use of node labels in ns2-svk.dts.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
Reviewed-by: Brian Norris
---
arch
as return type of function rds_iw_flush_mr_pool no where checked, chnaging its
return type from int to void.
also removing the unused variable rc as there is nothing to return.
Signed-off-by: Saurabh Sengar
---
net/rds/iw_rdma.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff
On 2015/10/23 10:44, Luck, Tony wrote:
> First part of each memory controller. I have two memory controllers on each
> node
>
If each memory controller has the same distance/latency, you (your firmware)
don't need
to allocate reliable memory per each memory controller.
If distance is problem, a
From: Brian Norris
Use enum instead of magic numbers for CFG and CFG_EXT bitfields.
Signed-off-by: Brian Norris
Tested-by: Anup Patel
---
drivers/mtd/nand/brcmnand/brcmnand.c | 38 +---
1 file changed, 31 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/
Just like other NAND controllers, the NAND READID command only works
in 8bit mode for all versions of BRCMNAND controller.
This patch forces 8bit mode for each NAND CS in brcmnand_init_cs()
before doing nand_scan_ident() to ensure that BRCMNAND controller
is in 8bit mode when NAND READID command i
We enable NAND support for Broadcom NS2 SoC by reusing existing
BRCMNAND driver.
This patchset applies on-top of "arm64: Simple additions to
NS2 DT" v1 patchset and is available in ns2_nand_v4 branch of
https://github.com/Broadcom/arm64-linux.git.
The patchset is tested on NS2 SVK.
Changes since
On Thu, Oct 29, 2015 at 03:07:58AM -0400, Steven Rostedt wrote:
> static ssize_t
> ftrace_event_pid_write(struct file *filp, const char __user *ubuf,
> size_t cnt, loff_t *ppos)
> @@ -1711,6 +1727,12 @@ ftrace_event_pid_write(struct file *filp, const char
> __user *ubuf,
>
Hi Daniel,
[auto build test ERROR on tip/timers/core -- if it's inappropriate base, please
suggest rules for selecting the more suitable base]
url:
https://github.com/0day-ci/linux/commits/Daniel-Lezcano/time-Define-dummy-functions-for-the-generic-sched-clock/20151030-065823
config: parisc-a
在 2015/10/29 23:09, Will Deacon 写道:
> On Thu, Oct 29, 2015 at 09:35:42PM +0800, kbuild test robot wrote:
>> [auto build test ERROR on arm64/for-next/core -- if it's inappropriate base,
>> please suggest rules for selecting the more suitable base]
>>
>> url:
>> https://github.com/0day-ci/linu
Wei,
On 2015/10/30 13:14, Wei Yang wrote:
On Thu, Oct 29, 2015 at 05:23:22PM -0500, Bjorn Helgaas wrote:
From: Alexander Duyck
Per sec 3.3.3.1 of the SR-IOV spec, r1.1, we must allow 1.0s after clearing
VF Enable before reading any field in the SR-IOV Extended Capability.
Wait 1 second befor
struct timeval' uses 32-bits for its seconds field and will overflow in
the year 2038 and beyond. This patch replaces the usage of 'struct timeval'
in mon_get_timestamp() with timespec64 which uses a 64-bit seconds field
and is y2038-safe. mon_get_timestamp() truncates the timestamp at 4096 seconds
On Fri, Oct 30, 2015 at 7:22 AM, Bjorn Helgaas wrote:
>> >>>
>> >>> I applied these to pci/host-altera for v4.4, thanks!
>> >>>
>> >>> I squashed these into three patches:
>> >>>
>> >>> - add msi.h to Kbuild
>> >>> - add Altera host driver (including DT binding and MAINTAINERS update)
>> >>>
On 2015/10/30 0:17, mho...@kernel.org wrote:
> From: Michal Hocko
>
> wait_iff_congested has been used to throttle allocator before it retried
> another round of direct reclaim to allow the writeback to make some
> progress and prevent reclaim from looping over dirty/writeback pages
> without mak
struct mon_bin_hdr allows for a 64-bit seconds timestamp. The code
currently uses 'struct timeval' to populate the timestamp in mon_bin_hdr,
which has a 32-bit seconds field and will overflow in year 2038 and beyond.
This patch replaces 'struct timeval' with 'struct timespec64' which is
y2038 safe.
+CC Claudiu: ARC gcc expert (please scroll to botom)
On Friday 30 October 2015 06:56 AM, Nicolas Pitre wrote:
> On Wed, 28 Oct 2015, Nicolas Pitre wrote:
>
>> On Thu, 29 Oct 2015, Alexey Brodkin wrote:
>>
>>> Fortunately we already have much better __div64_32() for 32-bit ARM.
>>> There in case of
A function prologue analyzer is a requisite for implementing stack tracer
and getting better views of stack usages on arm64.
To implement a function prologue analyzer, we have to be able to decode,
at least, stp, add, sub and mov instructions.
This patch adds decoders for those instructions, that
Function graph tracer modifies a return address (LR) in a stack frame by
calling ftrace_prepare_return() in a traced function's function prologue.
The current code does this modification before preserving an original
address at ftrace_push_return_trace() and there is always a small window
of incons
Stack tracer on arm64, check_stack(), is uniqeue in the following
points:
* analyze a function prologue of a traced function to estimate a more
accurate stack pointer value, replacing naive ' + 0x10.'
* use walk_stackframe(), instead of slurping stack contents as orignal
check_stack() does, to
A stack frame may be used in a different way depending on cpu architecture.
Thus it is not always appropriate to slurp the stack contents, as current
check_stack() does, in order to calcurate a stack index (height) at a given
function call. At least not on arm64.
In addition, there is a possibility
Function graph tracer modifies a return address (LR) in a stack frame
to hook a function return. This will result in many useless entries
(return_to_handler) showing up in a stack tracer's output.
This patch replaces such entries with originals values preserved in
current->ret_stack[].
Signed-off
This is the fourth patch series for fixing stack tracer on arm64.
The original issue was reported by Jungseok[1], and then I found more
issues[2].
(Steven, Jungseok, sorry for not replying to your comments directly.)
I address here all the issues and implement fixes described in [2] except
for int
On arm64, no PC values returned by save_stack_trace() will match to LR
values saved in stack frames on a stack after the following commit:
commit e306dfd06fcb ("ARM64: unwind: Fix PC calculation")
As a result, the output from stack tracer will be messed up.
This patch introduces an arch-define
On Fri, Oct 30, 2015 at 11:48:21AM +0800, Wei Yang wrote:
>On Thu, Oct 29, 2015 at 05:22:54PM -0500, Bjorn Helgaas wrote:
>>ines: 115
>>
>>From: Alexander Duyck
>>
>>The enumeration path should leave NumVFs set to zero. But after
>>4449f079722c ("PCI: Calculate maximum number of buses required fo
On 2015/10/30 0:17, mho...@kernel.org wrote:
> From: Michal Hocko
>
> __alloc_pages_slowpath has traditionally relied on the direct reclaim
> and did_some_progress as an indicator that it makes sense to retry
> allocation rather than declaring OOM. shrink_zones had to rely on
> zone_reclaimable i
On Thu, Oct 29, 2015 at 05:23:36PM -0500, Bjorn Helgaas wrote:
>From: Alexander Duyck
>
>VF bus numbers depend on the First VF Offset and VF Stride, and per
>sections 3.3.9 and 3.3.10 of the SR-IOV spec r1.1, these depend on the
>NumVF value.
>
>Wait until after we set NumVFs to compute and valida
On Thu, Oct 29, 2015 at 05:23:29PM -0500, Bjorn Helgaas wrote:
>From: Alexander Duyck
>
>Disable VFs if pcibios_enable_sriov() fails, just like we do for other
>errors in sriov_enable(). Call pcibios_sriov_disable() if virtfn_add()
>fails.
>
>[bhelgaas: changelog, split to separate patch for revi
On Thu, Oct 29, 2015 at 05:23:22PM -0500, Bjorn Helgaas wrote:
>From: Alexander Duyck
>
>Per sec 3.3.3.1 of the SR-IOV spec, r1.1, we must allow 1.0s after clearing
>VF Enable before reading any field in the SR-IOV Extended Capability.
>
>Wait 1 second before calling pci_iov_set_numvfs(), which re
On Thu, Oct 29, 2015 at 05:23:15PM -0500, Bjorn Helgaas wrote:
>From: Alexander Duyck
>
>Move pcibios_sriov_disable() up so it's defined before a future use.
>
>[bhelgaas: split to separate patch for reviewability]
>Signed-off-by: Alexander Duyck
>Signed-off-by: Bjorn Helgaas
Reviewed-by: Wei Y
On Thu, Oct 29, 2015 at 05:23:08PM -0500, Bjorn Helgaas wrote:
>From: Alexander Duyck
>
>If virtfn_add() fails, we call virtfn_remove() for any previously added
>devices. Remove the devices in reverse order (first-added is
>last-removed), which is more natural and doesn't require an additional
>v
On Thu, Oct 29, 2015 at 05:23:01PM -0500, Bjorn Helgaas wrote:
>From: Alexander Duyck
>
>Previously, we read, validated, and cached PCI_SRIOV_VF_OFFSET and
>PCI_SRIOV_VF_STRIDE in sriov_enable(). But sriov_init() now does
>that via compute_max_vf_buses(), so we don't need to do it again.
>
>Remov
Hi Linus,
Two patches for fix a regression in backlight handling on some old radeon
laptops.
Regards,
Dave.
The following changes since commit 8a28d67457b613258aa0578ccece206d166f2b9f:
Merge tag 'powerpc-4.3-6' of
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux (2015-10-28
18:
Hi Bayi,
On Fri, Oct 30, 2015 at 10:12:39AM +0800, bayi.cheng wrote:
> Hi Brian, The current station is as follows.
>
> 1: put 0x9F to MTK_NOR_PRGDATA5_REG, and five 0x0 to
> MTK_NOR_PRGDATA4_REG ~ MTK_NOR_PRGDATA0_REG, then set (1 + 5) * 8
> to MTK_NOR_CNT_REG, for this way, we can read five I
net/atm/mpoa_* files use 'struct timeval' to store event
timestamps. struct timeval uses a 32-bit seconds field which will
overflow in the year 2038 and beyond. Morever, the timestamps are being
compared only to get seconds elapsed, so struct timeval which stores
a seconds and microseconds field is
Hi Bayi,
(I drafted most of this before you clarified on how to read out 6 bytes
of ID. So a bit of this is slightly out-of-date. Still, I think most of
the comments and much of the appended patch should be useful to you.)
On Mon, Oct 26, 2015 at 09:40:38PM +0800, Bayi Cheng wrote:
> add spi nor
Hi Jon,
On 2015/10/30 12:07, Jon Masters wrote:
> Hi Tomasz,
>
> Thanks for posting this series.
>
> On 10/27/2015 12:38 PM, Tomasz Nowicki wrote:
>
>> From the functionality point of view this series might be split into two
>> logic parts:
>> 1. Making MMCONFIG code arch-agnostic which allows al
Hi Sinan,
[auto build test WARNING on lwn/docs-next -- if it's inappropriate base, please
suggest rules for selecting the more suitable base]
url:
https://github.com/0day-ci/linux/commits/Sinan-Kaya/dma-add-Qualcomm-Technologies-HIDMA-management-driver/20151030-111408
coccinelle warnings:
drivers/dma/qcom_hidma_mgmt.c:852:3-8: No need to set .owner here. The core
will do it.
Remove .owner field if calls are used which set it automatically
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
CC: Sinan Kaya
Signed-off-by: Fengguang Wu
---
qcom_hidma_mgmt.c |1
> --- a/mm/page_alloc.c
> +++ b/mm/page_alloc.c
> @@ -3191,8 +3191,23 @@ __alloc_pages_slowpath(gfp_t gfp_mask, unsigned int
> order,
>*/
> if (__zone_watermark_ok(zone, order, min_wmark_pages(zone),
> ac->high_zoneidx, alloc_flags, targ
> +/*
> + * Number of backoff steps for potentially reclaimable pages if the direct
> reclaim
> + * cannot make any progress. Each step will reduce 1/MAX_STALL_BACKOFF of the
> + * reclaimable memory.
> + */
> +#define MAX_STALL_BACKOFF 16
> +
> static inline struct page *
> __alloc_pages_slowpa
'struct timeval' uses 32-bit representation for seconds which will
overflow in year 2038 and beyond. mISDN/clock.c needs to compute and
store elapsed time in intervals of 125 microseconds. This patch replaces
the usage of 'struct timeval' with 64-bit ktime_t which is y2038 safe.
The patch also repl
Hi Tomasz,
Thanks for posting this series.
On 10/27/2015 12:38 PM, Tomasz Nowicki wrote:
> From the functionality point of view this series might be split into two
> logic parts:
> 1. Making MMCONFIG code arch-agnostic which allows all architectures to
> collect
>PCI config regions and use
On Thu, Oct 29, 2015 at 02:12:04PM -0600, Ross Zwisler wrote:
> This patch series adds support for fsync/msync to DAX.
>
> Patches 1 through 8 add various utilities that the DAX code will eventually
> need, and the DAX code itself is added by patch 9. Patches 10 and 11 are
> filesystem changes th
On Thu, Oct 29, 2015 at 05:22:54PM -0500, Bjorn Helgaas wrote:
>ines: 115
>
>From: Alexander Duyck
>
>The enumeration path should leave NumVFs set to zero. But after
>4449f079722c ("PCI: Calculate maximum number of buses required for VFs"),
>we call virtfn_max_buses() in the enumeration path, whi
Hi Daniel,
在 2015年10月01日 03:14, Heiko Stübner 写道:
Hi Daniel,
Am Dienstag, 29. September 2015, 06:18:03 schrieb Daniel Lezcano:
On 09/25/2015 04:14 AM, Caesar Wang wrote:
Build the arm64 SoCs (e.g.: RK3368) on Rockchip platform,
There are some failure with build up on timer driver for rockchip
On Fri, 2015-10-30 at 01:32 +0200, Andy Shevchenko wrote:
> On Fri, Oct 30, 2015 at 1:00 AM, James Bottomley wrote:
> > On Thu, 2015-10-29 at 17:30 +0100, Vitaly Kuznetsov wrote:
> >> Division by zero happens if blk_size=0 is supplied to string_get_size().
> >> Add WARN_ON() and set size to 0 to r
On Thu, 29 Oct 2015, Mike Kravetz wrote:
> This patch is a combination of:
> [PATCH v2 4/4] mm/hugetlb: Unmap pages to remove if page fault raced
> with hole punch and,
> [PATCH] mm/hugetlb: i_mmap_lock_write before unmapping in
> remove_inode_hugepages
> This patch can replace the en
On Fri, 2015-10-30 at 00:19 +0100, Rasmus Villemoes wrote:
> On Thu, Oct 29 2015, James Bottomley wrote:
>
> > On Thu, 2015-10-29 at 17:30 +0100, Vitaly Kuznetsov wrote:
> >> string_get_size() can't really handle huge block sizes, especially
> >> blk_size > U32_MAX but string_get_size() interface
On 10/29/2015 9:43 AM, Doug Anderson wrote:
> John,
>
> On Thu, Oct 22, 2015 at 1:05 PM, Douglas Anderson
> wrote:
>> In commit 734643dfbdde ("usb: dwc2: host: add flag to reflect bus
>> state") we changed dwc2_port_suspend() not to set the lx_state
>> anymore (instead it sets the new bus_suspen
Add DT bindings documentation for hi6220 SoC reset controller.
Signed-off-by: Chen Feng
---
.../bindings/reset/hisilicon,hi6220-reset.txt | 34 +++
include/dt-bindings/reset/hisi,hi6220-resets.h | 67 ++
2 files changed, 101 insertions(+)
create mode 100644
Add reset controller for hi6220 hikey-board.
Signed-off-by: Chen Feng
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 3f03380..e45dbb1 100644
--- a/arch/
Add reset driver for hi6220-hikey board,this driver supply deassert
of IP on hi6220 SoC.
Signed-off-by: Chen Feng
---
drivers/reset/Kconfig | 1 +
drivers/reset/Makefile | 1 +
drivers/reset/hisilicon/Kconfig| 5 ++
drivers/reset/hisilicon/Makefile
This patch adds support for hidma engine. The driver
consists of two logical blocks. The DMA engine interface
and the low-level interface. This version of the driver
does not support virtualization on this release and only
memcpy interface support is included.
Signed-off-by: Sinan Kaya
---
.../d
The Qualcomm Technologies HIDMA device has been designed
to support virtualization technology. The driver has been
divided into two to follow the hardware design. The management
driver is executed in hypervisor context and is the main
managment for all channels provided by the device. The
channel d
On Thu, Oct 29, 2015 at 11:04:41PM +0100, Vincent Stehlé wrote:
> The size of the pointer to a data structure to send is erroneously
> passed to sst_ipc_tx_message_wait() as its tx_bytes argument. It should
> be given the size of the pointed skl_ipc_dxstate_info structure instead.
This was reporte
On 2015年10月30日 00:17, Alexander Duyck wrote:
> On 10/29/2015 01:33 AM, Lan Tianyu wrote:
>> On 2015年10月29日 14:58, Alexander Duyck wrote:
>>> Your code was having to do a bunch of shuffling in order to get things
>>> set up so that you could bring the interface back up. I would argue
>>> that it ma
This reuses the code of drivers/tty/serial/8250/8250_early.c except
- Overwrite device->port.iotype and device->port.regshift for
UPIO_MEM32 because of_setup_earlycon() has set them for UPIO_MEM.
- Set device->baud to zero to prevent early8250_setup() from
initializing the divisor reg
Hi,
On 2015/10/30 0:14, Philipp Zabel wrote:
> Am Donnerstag, den 29.10.2015, 20:55 +0800 schrieb Chen Feng:
>> reset: add driver for hi6220 reset controller
>
> Same comment as for patch 1, this should probably be the subject,
> the commit message body was better in V4.
>
>> Signed-off-by: Chen
On Thu, October 29, 2015 6:50 pm, Michel Dänzer wrote:
>>> So problem (no LCD backlight) must have been introduced between
>>> those.
>>
>> Well this looks like it might have something to do with it will
>> attempt a build just before it. --
>> commit 4281f46ef839050d2ef60348f661eb463c21cc2e
Changes in v3:
- Split into three patches.
- Confirm the empty TX only after sending each character.
Changes in v2:
- split into two patches
Masahiro Yamada (3):
serial: 8250_early: do not save and restore IER in write callback
serial: 8250_early: confirm empty transmitter after sendi
The IER has already been masked in early_serial8250_setup(), there is
no reason to save and restore it every time early_serial8250_write()
is called.
Signed-off-by: Masahiro Yamada
---
drivers/tty/serial/8250/8250_early.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff -
Now, wait_for_xmitr() is only called from serial_putc(), and both
are short enough. They can be merged into a single function.
Signed-off-by: Masahiro Yamada
---
drivers/tty/serial/8250/8250_early.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/tty/se
The current code waits until the transmitter becomes empty,
before sending each character, and after finishing the whole string.
This seems a bit redundant.
It can be more efficient by checking the transmitter only after sending
each character. This should be safe because the transmitter is alrea
platform_driver doesn't need to set .owner, because
platform_driver_register() will set it.
Signed-off-by: huangdaode
---
drivers/net/ethernet/hisilicon/hns/hns_enet.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_enet.c
b/drivers/net/ethernet/hisilic
On Thu, Oct 29, 2015 at 09:08:45PM -0500, Michael Welling wrote:
> Dmitry,
>
> On Thu, Oct 29, 2015 at 06:45:22PM -0700, Dmitry Torokhov wrote:
> > Hi Michael,
> >
> > On Wed, Oct 28, 2015 at 07:12:34PM -0500, Michael Welling wrote:
> > > Adds support for the i2c based tsc2004.
> > >
> > > Due t
Hi
ping ?
[R] 森本 wrote:
>
> From: Kuninori Morimoto
>
> This patch adds CS2000 Fractional-N driver as clock provider.
>
> Signed-off-by: Kuninori Morimoto
> ---
> v4 -> v5
>
> - remove "clock-frequency"
> - use dev on clk_register()
> - remove CLK_IS_BASIC
> - .enable -> .prepare since
On Thu, Oct 29, 2015 at 11:52:33PM +0100, Philippe Loctaux wrote:
> >From 16dae6c28a46ae257dcedd51d973aee7821053f3 Mon Sep 17 00:00:00 2001
> From: Philippe Loctaux
> Date: Thu, 29 Oct 2015 22:45:16 +0100
> Subject: [PATCH] Staging: comedi: fixed comment, added a new line
Why is this header all i
The patch
regmap-mmio: Use native endianness for read/write
has been applied to the regmap tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and se
Dmitry,
On Thu, Oct 29, 2015 at 06:45:22PM -0700, Dmitry Torokhov wrote:
> Hi Michael,
>
> On Wed, Oct 28, 2015 at 07:12:34PM -0500, Michael Welling wrote:
> > Adds support for the i2c based tsc2004.
> >
> > Due to the overlapping functionality of the tsc2004 and tsc2005
> > the common code was
Hi Pablo,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 8a28d67457b613258aa0578ccece206d166f2b9f
commit: bbde9fc1824aab58bc78c084163007dd6c03fe5b netfilter: factor out packet
duplication for IPv4/IPv6
date: 3 mo
Hi Linus,
2015-10-29 22:33 GMT+09:00 Linus Walleij :
> On Tue, Oct 27, 2015 at 3:28 AM, Masahiro Yamada
> wrote:
>
>> Add "default y" to the Kconfig rather than adding entries into
>> arch/arm/configs/multi_v7_defconfig.
>>
>> Signed-off-by: Masahiro Yamada
>
> (...)
>> config PINCTRL_UNIPHIER_
On 2015/10/30 7:46, ja...@microsoft.com wrote:
> From: Jake Oshins
>
> This patch adds an fwnode_handle to struct pci_sysdata, which is
> used by the next patch in the series when trying to locate an
> IRQ domain associated with a root PCI bus.
>
> Signed-off-by: Jake Oshins
> ---
> arch/x86
2015-10-30 1:37 GMT+09:00 Ramakrishna Pallala :
> This patch series adds the support for TI BQ24261 charger driver.
>
> TI BQ24261 charger driver relies on extcon notifications to get the
> charger cable type and based on that it will set the charging parameters.
>
> Ramakrishna Pallala (2):
> dt
2015-10-30 1:37 GMT+09:00 Ramakrishna Pallala :
> This patch adds the device tree documentation for TI BQ24261 charger.
>
> Signed-off-by: Ramakrishna Pallala
> Signed-off-by: Jenny TC
> ---
> .../devicetree/bindings/power/bq24261.txt | 34
>
> 1 file changed, 34
Hi Michael,
On Wed, Oct 28, 2015 at 07:12:34PM -0500, Michael Welling wrote:
> Adds support for the i2c based tsc2004.
>
> Due to the overlapping functionality of the tsc2004 and tsc2005
> the common code was moved to a core driver (tsc200x-core).
>
> Signed-off-by: Michael Welling
In addition
On Thu, Oct 29, 2015 at 02:09:01PM -0400, Theodore Ts'o wrote:
> On Mon, Sep 28, 2015 at 09:50:37PM +0800, Yaowei Bai wrote:
> > As new_valid_dev always returns 1, so !new_valid_dev check is not
> > needed, remove it.
> >
> > Signed-off-by: Yaowei Bai
>
> Thanks, applied.
Ted, this patch has be
On Fri, Oct 30 2015, Roman Gushchin wrote:
> 29.10.2015, 03:35, "Neil Brown" :
>> On Wed, Oct 28 2015, Roman Gushchin wrote:
>>
>>> After commit 566c09c53455 ("raid5: relieve lock contention in
>>> get_active_stripe()")
>>> __find_stripe() is called under conf->hash_locks + hash.
>>> But handl
From: Nishanth Aravamudan
Date: Thu, 29 Oct 2015 08:57:01 -0700
> So, would that imply changing just the NVMe driver code rather than
> adding the dma_page_shift API at all? What about
> architectures that can support the larger page sizes? There is an
> implied performance impact, at least, of s
On Wed, 28 Oct 2015, Nicolas Pitre wrote:
> On Thu, 29 Oct 2015, Alexey Brodkin wrote:
>
> > Fortunately we already have much better __div64_32() for 32-bit ARM.
> > There in case of division by constant preprocessor calculates so-called
> > "magic number" which is later used in multiplications i
Depending on the version of hardware or its properties, which are only
known at runtime, various properties of the OPP can change. For example,
an OPP with frequency 1.2 GHz, may have different voltage/current
requirements based on the version of the hardware it is running on.
Similarly, it may or
These aren't used until now by any DT files and wouldn't be used now as
we have a better scheme in place now, i.e. opp-property-
properties.
Remove the (useless) binding without breaking ABI.
Signed-off-by: Viresh Kumar
---
Documentation/devicetree/bindings/opp/opp.txt | 62 +---
We may want to enable only a subset of OPPs, from the bigger list of
OPPs, based on what version of the hardware we are running on. This
would enable us to not duplicate OPP tables for every version of the
hardware we support.
To enable that, this patch defines a new property 'opp-supported-hw'. I
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