The add_early_randomness() function in drivers/char/hw_random/core.c passes
a 16-byte buffer to pseries_rng_data_read(). Unfortunately, plpar_hcall()
returns four 64-bit values and trashes 16 bytes on the stack.
This bug has been lying around for a long time. It got unveiled by:
commit d3cc799647
Hello David, Lennart,
Am 30.10.2014 20:43, schrieb David Miller:
From: "Lennart Sorensen"
Date: Tue, 28 Oct 2014 13:02:42 -0400
I believe commit 0d961b3b52f566f823070ce2366511a7f64b928c made a mistake
while correcting a bug.
Seems I missed your original patch ... looked in it here:
https://
On 2014/10/31 14:26, Wanpeng Li wrote:
The srcu read lock must be held while accessing memslots (e.g.
when using gfn_to_* functions), however, commit c24ae0dcd3e8
("kvm: x86: Unpin and remove kvm_arch->apic_access_page") call
gfn_to_page() in kvm_vcpu_reload_apic_access_page() w/o hold it in
vmx_
Seeing "ibmpowernv" in dmesg is not very useful, that is just the name
of the platform and doesn't identify the message as coming from the
hwmon driver.
Change DRVNAME to "powernv-hwmon" to make it clearer.
Signed-off-by: Michael Ellerman
---
drivers/hwmon/ibmpowernv.c | 2 +-
1 file changed, 1
Because we build kernels with drivers built in for many platforms, it's
normal for the ibmpowernv driver to be loaded on systems that don't have
the appropriate hardware.
Currently the driver spams the log with:
ibmpowernv ibmpowernv.0: Opal node 'sensors' not found
ibmpowernv: Platfrom drive
Fix some coding style warnings detected by checkpatch.pl in ion.
Signed-off-by: Tristan Lelong
---
drivers/staging/android/ion/ion.c | 2 +-
drivers/staging/android/ion/ion.h | 2 +-
drivers/staging/android/ion/ion_priv.h | 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff
On 10/30, Daniel Thompson wrote:
> On 29/10/14 18:14, Stephen Boyd wrote:
> > + r_count = min_t(int, count, sizeof(buf));
> > +
> > + for (i = 0; i < r_count; i++) {
> > + char flag = TTY_NORMAL;
> >
> > - /* TODO: handle sysrq */
> > - tt
Hi Tiejun,
On Fri, Oct 31, 2014 at 01:30:35PM +0800, Chen, Tiejun wrote:
>On 2014/10/31 12:33, Wanpeng Li wrote:
>>The srcu read lock must be held while accessing memslots (e.g.
>>when using gfn_to_* functions), however, commit c24ae0dcd3e8
>>("kvm: x86: Unpin and remove kvm_arch->apic_access_page"
On Thu, 2014-10-30 at 14:16 +0100, Matthias Brugger wrote:
> 2014-10-29 6:37 GMT+01:00 Xudong Chen :
> > The mediatek SoCs have I2C controller that handle I2C transfer.
> > This patch include common I2C bus driver.
> > This driver is compatible with I2C controller on mt65xx/mt81xx.
> >
> > Signed-o
On Fri, Oct 31, 2014 at 02:26:59PM +0800, Wanpeng Li wrote:
>The srcu read lock must be held while accessing memslots (e.g.
>when using gfn_to_* functions), however, commit c24ae0dcd3e8
>("kvm: x86: Unpin and remove kvm_arch->apic_access_page") call
>gfn_to_page() in kvm_vcpu_reload_apic_access_pag
The srcu read lock must be held while accessing memslots (e.g.
when using gfn_to_* functions), however, commit c24ae0dcd3e8
("kvm: x86: Unpin and remove kvm_arch->apic_access_page") call
gfn_to_page() in kvm_vcpu_reload_apic_access_page() w/o hold it in
vmx_vcpu_reset() path which leads to suspici
__submit_merged_biof2fs_write_end_iof2fs_write_end_io
wait_io = X wait_io = x
complete(X) complete(X)
wait_io = NULL
wait_for_completion()
free(X)
If there is a chance to make a huge sized discard command, we don't need
to split it out, since each blkdev_issue_discard should wait one at a
time.
Signed-off-by: Jaegeuk Kim
---
fs/f2fs/segment.c | 44 +++-
1 file changed, 27 insertions(+), 17 deletions(
Let's remove unused macro.
Signed-off-by: Jaegeuk Kim
---
include/linux/f2fs_fs.h | 4
1 file changed, 4 deletions(-)
diff --git a/include/linux/f2fs_fs.h b/include/linux/f2fs_fs.h
index cc1064f..87f14e9 100644
--- a/include/linux/f2fs_fs.h
+++ b/include/linux/f2fs_fs.h
@@ -177,10 +177,6 @
If a system wants to reduce the booting time as a top priority, now we can
use a mount option, -o fastboot.
With this option, f2fs conducts a little bit slow write_checkpoint, but
it can avoid the node page reads during the next mount time.
Signed-off-by: Jaegeuk Kim
---
Documentation/filesystem
On 10/30/2014 02:18 PM, Rafael J. Wysocki wrote:
On Thursday, October 16, 2014 07:37:11 AM James Geboski wrote:
The intel_pstate driver only supports the performance and the powersave
governors. With the performance governor ensuring the highest possible
performance settings, userspace tools fai
On Intel Baytrail-T and Baytrail-T-CR platforms, there are two customized
ACPI operation regions defined for the Power Management Integrated Circuit
device, one is for power resource handling and one is for thermal: sensor
temperature reporting, trip point setting, etc. There are different PMIC
chi
The Baytrail-T-CR platform firmware has defined two customized operation
regions for PMIC chip Dollar Cove XPower - one is for power resource
handling and one is for thermal just like the CrystalCove one. This patch
adds support for them on top of the common PMIC opregion region code.
Signed-off-b
The same virtual GPIO strategy is also used for the AXP288 PMIC in that
various control methods that are used to do power rail handling and
sensor reading/setting will touch GPIO fields defined under the PMIC
device. The GPIO fileds are only defined by the ACPI code while the
actual hardware doesn'
The Baytrail-T platform firmware has defined two customized operation
regions for PMIC chip Crystal Cove - one is for power resource handling
and one is for thermal: sensor temperature reporting, trip point setting,
etc. This patch adds support for them on top of the existing Crystal Cove
PMIC driv
On 10/31/2014 11:36 AM, Eric Dumazet wrote:
> On Wed, 2014-10-15 at 16:23 +0300, Michael S. Tsirkin wrote:
>> commit 0b725a2ca61bedc33a2a63d0451d528b268cf975
>> net: Remove ndo_xmit_flush netdev operation, use signalling instead.
>>
>> added code that looks at skb->xmit_more after the skb has
>
The INIT_LIST_HEAD(&tp->rx_done) would be done in rtl_start_rx(),
so remove the unnecessary one in alloc_all_mem().
Signed-off-by: Hayes Wang
---
drivers/net/usb/r8152.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index f116335..ff54098 10
Adjust some codes to make them more reasonable.
Hayes Wang (3):
r8152: remove the duplicate the init for the list of rx_done
r8152: clear the flag of SCHEDULE_TASKLET in tasklet
r8152: check RTL8152_UNPLUG and netif_running before autoresume
drivers/net/usb/r8152.c | 13 +
1 fi
If the device is unplugged or !netif_running(), the workqueue
doesn't neet to wake the device, and could return directly.
Signed-off-by: Hayes Wang
---
drivers/net/usb/r8152.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r
Clear the flag of SCHEDULE_TASKLET in bottom_half() to avoid
re-schedule the tasklet again by workqueue.
Signed-off-by: Hayes Wang
---
drivers/net/usb/r8152.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index ff54098..670279a 100644
--
> >
> > All of those patches are in v3.18-rc1, so you may rebase on top of
> > 3.18-rcX safely I guess.
> >
> Andy, I remember you ask me to rebase on the slave-dma tree (git.infraded.org)
> for-linus branch, and the slave-dma for-linus branch will be reapplied on top
> of
> v3.19-rc1.
>
Just to
This patch add bitrev.h file to support rbit instruction,
so that we can do bitrev operation by hardware.
Signed-off-by: Yalin Wang
---
arch/arm/Kconfig | 1 +
arch/arm/include/asm/bitrev.h | 21 +
2 files changed, 22 insertions(+)
create mode 100644 arch/arm/in
This patch add bitrev.h file to support rbit instruction,
so that we can do bitrev operation by hardware.
Signed-off-by: Yalin Wang
---
arch/arm64/Kconfig | 1 +
arch/arm64/include/asm/bitrev.h | 21 +
2 files changed, 22 insertions(+)
create mode 100644 arch/ar
This patch add bitrev.h file to support rbit instruction,
so that we can do bitrev operation by hardware.
Signed-off-by: Yalin Wang
---
arch/arm/Kconfig | 1 +
arch/arm/include/asm/bitrev.h | 21 +
2 files changed, 22 insertions(+)
create mode 100644 arch/arm/in
this change add CONFIG_HAVE_ARCH_BITREVERSE config option,
so that we can use some architecture's bitrev hardware instruction
to do bitrev operation.
Introduce __constant_bitrev* macro for constant bitrev operation.
Change __bitrev16() __bitrev32() to be inline function,
don't need export symbol
For Renesas USB 3.0 host controller, when unplugging the usb hub which
has the RTL8153 plugged, the driver would get -EPROTO for interrupt
transfer. There is high probability to get the information of "HC died;
cleaning up", if the driver continues to submit the interrupt transfer
before the discon
Hi,
David Miller wrote:
> From: Lothar Waßmann
> Date: Thu, 30 Oct 2014 07:51:04 +0100
>
> >> Also, I don't thnk your DIV_ROUND_UP() eliminate for the loop
> >> in swap_buffer() is valid. The whole point is that the current
> >> code handles buffers which have a length which is not a multiple
>
On 2014/10/31 12:33, Wanpeng Li wrote:
The srcu read lock must be held while accessing memslots (e.g.
when using gfn_to_* functions), however, commit c24ae0dcd3e8
("kvm: x86: Unpin and remove kvm_arch->apic_access_page") call
gfn_to_page() in kvm_vcpu_reload_apic_access_page() w/o hold it
which l
On Friday 31 October 2014 06:17 AM, Felipe Balbi wrote:
> Hi,
>
> On Fri, Oct 31, 2014 at 08:38:14AM +0800, Peter Chen wrote:
>> On Thu, Oct 30, 2014 at 12:47:34PM -0500, Felipe Balbi wrote:
>>> On Thu, Oct 30, 2014 at 06:42:54PM +0100, Antoine Tenart wrote:
Hi Felipe,
On Thu, Oct
Hi Steven,
(2014/10/28 3:27), Steven Rostedt wrote:
> +static unsigned long create_trampoline(struct ftrace_ops *ops)
> +{
> + unsigned const char *jmp;
> + unsigned long start_offset;
> + unsigned long end_offset;
> + unsigned long op_offset;
> + unsigned long offset;
> +
On Thu, Oct 30, 2014 at 9:38 PM, zhanghailiang
wrote:
> On 2014/10/31 11:29, zhanghailiang wrote:
>>
>> On 2014/10/31 10:23, Peter Feiner wrote:
>>>
>>> On Thu, Oct 30, 2014 at 07:31:48PM +0800, zhanghailiang wrote:
On 2014/10/30 1:46, Andrea Arcangeli wrote:
>
> On Mon, Oct 27,
Addy,
On Thu, Oct 30, 2014 at 8:50 PM, Addy Ke wrote:
> +static int dw_mci_rk3288_parse_dt(struct dw_mci *host)
> +{
> + struct device_node *np = host->dev->of_node;
> + int sdio_id0;
> +
> + if (!of_property_read_u32(np, "rockchip,sdio-interrupt-slot0",
> +
Hi all,
Changes since 20141030:
The hid tree gained a conflict against Linus' tree.
The akpm-current tree lost its build failure.
Non-merge commits (relative to Linus' tree): 3051
2487 files changed, 79125 insertions(+), 103302
The rockchip clock driver use CLK_IGNORE_UNUSED flag to make sure
all the clocks are available like default power on state.
We have implement the clock manage in most of rockchip drivers,
it is time to remove it for power save.
Instead we add CLK_IGNORE_UNUSED for some clock nodes which should
be o
On Thu, Oct 30, 2014 at 7:33 AM, Greg Kroah-Hartman
wrote:
>
> On Wed, Oct 29, 2014 at 02:21:56PM -0700, Anton Staaf wrote:
> > Add support for Google devices that export simple serial
> > interfaces using the vendor specific SubClass/Protocol pair
> > 0x50/0x01.
> >
> > Signed-off-by: Anton Staaf
On 2014/10/31 11:29, zhanghailiang wrote:
On 2014/10/31 10:23, Peter Feiner wrote:
On Thu, Oct 30, 2014 at 07:31:48PM +0800, zhanghailiang wrote:
On 2014/10/30 1:46, Andrea Arcangeli wrote:
On Mon, Oct 27, 2014 at 05:32:51PM +0800, zhanghailiang wrote:
I want to confirm a question:
Can we sup
The srcu read lock must be held while accessing memslots (e.g.
when using gfn_to_* functions), however, commit c24ae0dcd3e8
("kvm: x86: Unpin and remove kvm_arch->apic_access_page") call
gfn_to_page() in kvm_vcpu_reload_apic_access_page() w/o hold it
which leads to suspicious rcu_dereference_che
The IMX6 has some internal LDO regulators provided by the anatop regulator
block that can regulate the arm, soc, gpu/vpu core supplies. Alternatively a
design can supply vdd_arm and vdd_soc externally via a PMIC to provide a lower
power draw (switches are more efficient that ldo's).
The first two
First, after flushing TLB, we have no need to scan pte from start again.
Second, before bail out loop, the address is forwarded one step.
Signed-off-by: Hillf Danton
---
--- a/mm/hugetlb.c Fri Oct 31 11:47:25 2014
+++ b/mm/hugetlb.c Fri Oct 31 11:52:42 2014
@@ -2641,8 +2641,9 @@ void _
Regulators can be configured to allow bypass mode and can be told by a consumer
that they are allowed to go into bypass mode from that consumer's perspective.
This adds a function to determine if the regulator actually has gone into
bypass mode (meaning all consumers allowed it to do so).
Cc: lin
The GW54xx baseboard has a PFUZE100 PMIC capable of regulating the
core voltages (VDD_ARM, VDD_SOC) externally such that the internal IMX6
anatop LDO regulators are not needed. This provides a power reduction
(as the PMIC is more efficient than the LDO's) as well as moves some
of the power/thermal
Regulator structures can point to the same internal regulator dev's but as
that information is private we need to expose a function to determine if
two regulators do so.
Cc: linux...@vger.kernel.org
Signed-off-by: Tim Harvey
---
drivers/regulator/core.c | 17 +
include/
Adding an alias on the cpu0 node allows devicetree files to modify the
regulators for LDO-bypass mode.
Cc: devicet...@vger.kernel.org
Cc: Philipp Zabel
Cc: Shawn Guo
Signed-off-by: Tim Harvey
---
arch/arm/boot/dts/imx6dl.dtsi | 2 +-
arch/arm/boot/dts/imx6q.dtsi | 2 +-
2 files changed, 2 ins
When an external PMIC is used for VDD_SOC and VDD_ARM you can save power by
bypassing the internal LDO's provided by the anantop regulator as long as
you are running less than 1.2GHz. If running at 1.2GHz the IMX6 datasheets
state that you must use the internal LDO's to reduce ripple on the suplies
On 2014/10/30 16:55, Artem Bityutskiy wrote:
> On Sat, 2014-10-25 at 19:43 +0200, Richard Weinberger wrote:
>> This is more a cosmetic change than a fix.
>> By using ubi_eba_atomic_leb_change()
>> we can guarantee that the first VTBL record is always
>> correct and we don't really need the second o
On 31 October 2014 01:31, Andrew Bresticker wrote:
> If a message has been received on a channel, but no client has yet bound
> to it, mbox_chan_received_data() will dereference a NULL client pointer.
> Check for the presence of a client first.
>
Let me quote from the documentation of the API
On Thu, Oct 30, 2014 at 08:50:15PM -0700, Guenter Roeck wrote:
> If a driver supports reading EEPROM but no EEPROM is installed in the system,
> the driver's get_eeprom_len function returns 0. ethtool will subsequently
> try to read that zero-length EEPROM anyway. If the driver does not support
> E
HI Felipe,
On 27 October 2014 15:06, Kiran Raparthy wrote:
> Hi Felipe,
>
> On 10 October 2014 20:50, Felipe Balbi wrote:
>> Hi,
>>
>> On Fri, Oct 10, 2014 at 11:37:31AM +0530, Kiran Raparthy wrote:
>>> Hi Felipe,
>>> Thank you very much for taking time in reviewing the patch.
>>> I will try to
The bit of sdio interrupt is 16 in designware implementation,
but it is 24 in RK3288. This patch add sdio_id0 for the number
of slot0 in the SDIO interrupt registers, which can be set in
platform DT table, such as:
- rockchip,sdio-interrupt-slot0 = <8>;
Signed-off-by: Addy Ke
---
Changes in v2:
-
If a driver supports reading EEPROM but no EEPROM is installed in the system,
the driver's get_eeprom_len function returns 0. ethtool will subsequently
try to read that zero-length EEPROM anyway. If the driver does not support
EEPROM access at all, this operation will return -EOPNOTSUPP. If the dri
On Thu, Oct 30, 2014 at 09:54:34PM +, Alexander Gordeev wrote:
> On Thu, Oct 30, 2014 at 01:43:18PM -0700, Paul E. McKenney wrote:
> > > > Have you done any testing of this change?
> > >
> > > Just booted to a unicore kernel and dd'ed 1G of /dev/sda to /dev/null.
> >
> > OK, that is a start.
On Wed, 29 Oct 2014 08:12:05 -0700
Casey Schaufler wrote:
> On 10/29/2014 2:11 AM, Rohit wrote:
> > On Mon, 27 Oct 2014 09:25:28 -0700
> > Casey Schaufler wrote:
> >
> >> On 10/26/2014 11:54 PM, Rohit wrote:
> >>> On Sun, 26 Oct 2014 17:41:37 -0700
> >>> Casey Schaufler wrote:
> >>>
> On 1
From: Guenter Roeck
Date: Thu, 30 Oct 2014 19:53:17 -0700
> On 10/30/2014 07:40 PM, Andrew Lunn wrote:
>>> As suspected, ethtool will attempt to read a zero-length eeprom.
>>>
>>> The following patch should solve the problem. Not sure if it is worth
>>> it,
>>> though, since this will change beha
On Wed, 2014-10-15 at 16:23 +0300, Michael S. Tsirkin wrote:
> commit 0b725a2ca61bedc33a2a63d0451d528b268cf975
> net: Remove ndo_xmit_flush netdev operation, use signalling instead.
>
> added code that looks at skb->xmit_more after the skb has
> been put in TX VQ. Since some paths process the
Hi, Philipp,
On Thu, 2014-10-30 at 10:02 +0100, Philipp Zabel wrote:
> Since the reset controller driver accesses registers solely through the
> syscon regmap, I'd prefer to keep with the device tree control graph
> concept and make the reset-controller nodes children of the syscon
> nodes. I've b
On 2014/10/31 10:23, Peter Feiner wrote:
On Thu, Oct 30, 2014 at 07:31:48PM +0800, zhanghailiang wrote:
On 2014/10/30 1:46, Andrea Arcangeli wrote:
On Mon, Oct 27, 2014 at 05:32:51PM +0800, zhanghailiang wrote:
I want to confirm a question:
Can we support distinguishing between writing and rea
On Fri, Oct 31, 2014 at 12:03 AM, Krzysztof Kozlowski
wrote:
> On czw, 2014-10-30 at 22:56 +0900, Alexandre Courbot wrote:
>> Hi, and thanks for bringing this issue to us!
>>
>> On Wed, Oct 29, 2014 at 7:49 PM, Javier Martinez Canillas
>> wrote:
>> > [adding Linus and Alexandre to the cc list]
>>
This patch adds disable usb3 suspend phy quirk, and some special platforms
can configure that if it is needed.
Signed-off-by: Huang Rui
---
Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
drivers/usb/dwc3/core.c| 6 ++
drivers/usb/dwc3/core.h
This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is
configurable according to PIPE3 specification.
Value Description
0 -6dB de-emphasis
1 -3.5dB de-emphasis
2 No de-emphasis
3 Reserved
It can be configured on DT o
The AMD Nolan (NL) SoC contains a DesignWare USB3 Dual-Role Device that can
be operated either as a USB Host or a USB Device. In the AMD NL platform,
this device ([1022:7912]) has a class code of PCI_CLASS_SERIAL_USB_XHCI
(0x0c0330), which means the xhci driver will claim it.
But the dwc3 driver
Since the discussion of below thread, current enablement works for
host-mode, device-mode hibernation is not implemented yet.
http://marc.info/?l=linux-usb&m=141452396814414&w=2
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/core.c | 7 ++-
drivers/usb/dwc3/gadget.c | 2 +-
2 files changed
This patch adds disable usb2 suspend phy quirk, and some special platforms
can configure that if it is needed.
Signed-off-by: Huang Rui
---
Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
drivers/usb/dwc3/core.c| 6 ++
drivers/usb/dwc3/core.h
HIRD threshold should be configurable by different platforms.
>From DesignWare databook:
When HIRD_Threshold[4] is set to 1b1 and HIRD value is greater than or
equal to the value in HIRD_Threshold[3:0], dwc3 asserts output signals
utmi_l1_suspend_n to put PHY into Deep Low-Power mode in L1.
When
This patch adds support for AMD Nolan (NL) FPGA and SoC platform.
Cc: Jason Chang
Signed-off-by: Huang Rui
---
drivers/usb/dwc3/dwc3-pci.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
index ada975f..7c4
This patch adds PCI id for USB3 Dual-Role Device of AMD Nolan (NL) SoC.
It will be used for PCI quirks and DWC3 device driver.
Signed-off-by: Jason Chang
Signed-off-by: Huang Rui
Acked-by: Bjorn Helgaas
---
include/linux/pci_ids.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/lin
Hi,
The series of patches add AMD Nolan (NL) SoC support for DesignWare USB3
OTG IP with PCI bus glue layer. This controller supported hibernation, LPM
erratum and used the 2.80a IP version and amd own phy. Current
implementation support both simulation and SoC platform. And already tested
with ga
Hi Sukadev,
On Wed, 29 Oct 2014 14:26:20 -0700, Sukadev Bhattiprolu wrote:
> Namhyung Kim [namhy...@kernel.org] wrote:
> | I don't know how dwfl_report_offline() can make it to find out a mod
> | from pc as it's an (loaded) virtual address. Maybe I miss something or
> | is your dso's are prelinke
On Thursday, October 16, 2014 at 03:10:07 PM, Herbert Xu wrote:
> On Tue, Oct 14, 2014 at 09:46:50PM +0200, Stephan Mueller wrote:
> > The update adds a complete interface documentation of the kernel crypto
> > API. All cipher types supported by the kernel crypto API are documented.
> >
> > In add
Hi,
On Fri, Oct 31, 2014 at 09:29:55AM +0800, Huang Rui wrote:
> On Thu, Oct 30, 2014 at 11:42:10AM -0500, Felipe Balbi wrote:
> > On Thu, Oct 30, 2014 at 06:08:39PM +0800, Huang Rui wrote:
> > > This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is
> > > configurable according to
On Thu, 30 Oct 2014 17:54:34 +0100
Robert Richter wrote:
> +#ifdef VNIC_RSS_SUPPORT
> +static int rss_config = RSS_IP_HASH_ENA | RSS_TCP_HASH_ENA |
> RSS_UDP_HASH_ENA;
> +module_param(rss_config, int, S_IRUGO);
> +MODULE_PARM_DESC(rss_config,
> + "RSS hash config [bits 8:0] (B
On 10/30/2014 07:40 PM, Andrew Lunn wrote:
As suspected, ethtool will attempt to read a zero-length eeprom.
The following patch should solve the problem. Not sure if it is worth it,
though, since this will change behavior for existing drivers.
Yes, it changes behaviour, but it does make it mor
This reverts commit ff8cbf250b448aac35589f6075082c3fcad8a8fe.
Commit ff8cbf250b448aac35589f6075082c3fcad8a8fe triggers the bug logged at
https://bugzilla.kernel.org/show_bug.cgi?id=85701
Reported-by: Dmitry Nezhevenko
Signed-off-by: Lu Baolu
---
drivers/usb/host/xhci-hub.c | 5 +
1 file c
xhci: clear root port wake on bits if controller isn't wake-up capable
When xHCI PCI host is suspended, if do_wakeup is false in xhci_pci_suspend,
xhci_pci_suspend needs to clear all root port wake on bits. Otherwise some Intel
platforms may get a spurious wakeup, even if PCI PME# is disabled.
Si
This serie of patch reworks commit ff8cbf250b448aac35589f6075082c3fcad8a8fe.
This has been discussed at http://www.spinics.net/lists/linux-usb/msg114986.html
It also includes a patch to fix a comment in drivers/usb/host/xhci.h.
Lu Baolu (3):
usb: xhci: Revert "xhci: clear root port wake on bits
According to xHCI specification, PORT_DEV_REMOVE(bit 30) in PORTSC
true means "Device is non-removable".
Reported-by: Juro Bystricky
Signed-off-by: Lu Baolu
---
drivers/usb/host/xhci.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host
Hi Dinh
On 10/29/2014 07:25 AM, dingu...@opensource.altera.com wrote:
From: Dinh Nguyen
Adds the gadget data structure and appropriate data structure pointers
to the common dwc2_hsotg data structure. To keep the driver data
dereference code looking clean, the gadget variable declares are only a
On Thu, 30 Oct 2014 17:54:34 +0100
Robert Richter wrote:
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index 1fa99a301817..80bd3336691e 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -2324,6 +2324,8 @@
> #define PCI_DEVICE_ID_ALTIMA_AC9100 0x03e
> As suspected, ethtool will attempt to read a zero-length eeprom.
>
> The following patch should solve the problem. Not sure if it is worth it,
> though, since this will change behavior for existing drivers.
Yes, it changes behaviour, but it does make it more consistent.
Probably it should be u
Hi Dinh,
On 10/29/2014 07:25 AM, dingu...@opensource.altera.com wrote:
From: Dinh Nguyen
Since the dwc2 hcd driver is currently not looking for a clock node during
init, we should not completely fail if there isn't a clock provided.
For dual-role mode, we will only fail init for a non-clock no
Hi,
On 2014년 10월 30일 22:11, Krzysztof Kozłowski wrote:
> On 30.10.2014 13:43, Jonghwa Lee wrote:
>> It drops the way of using power_supply interface to reference battery's
>> temperature. Then it tries to use thermal subsystem's only. This makes driver
>> more simple and also can remove ifdeferies
On Thu, Oct 30, 2014 at 07:31:48PM +0800, zhanghailiang wrote:
> On 2014/10/30 1:46, Andrea Arcangeli wrote:
> >On Mon, Oct 27, 2014 at 05:32:51PM +0800, zhanghailiang wrote:
> >>I want to confirm a question:
> >>Can we support distinguishing between writing and reading memory for
> >>userfault?
>
From: Chao Xie
The patch set focuses at support device tree for clock.
The first part of the patches
clk: mmp: add prefix "mmp" for structures defined for clk-frac
clk: mmp: add spin lock for clk-frac
clk: mmp: add init callback for clk-frac
clk: mmp: move definiton of mmp_clk_frac to cl
From: Chao Xie
The register used by clk-frac may be shared with
other clocks.
So it needs to use spin lock to protect the register
access.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-frac.c | 11 ++-
drivers/clk/mmp/clk-mmp2.c | 2 +-
drivers/clk/mmp/clk-pxa168.c | 2 +-
driv
From: Chao Xie
In order to support DT for mmp SOC clocks, it defines
some basic APIs which are shared by all mmp SOC clock
units.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/Makefile | 2 +-
drivers/clk/mmp/clk.c| 192 +++
drivers/clk/mmp/clk.h
From: Chao Xie
The structures defined for clk-frac will be used out side
of clk-frac.c.
To avoid conflicts, add prefix "mmp" for these structures'
name.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-frac.c | 23 ---
drivers/clk/mmp/clk-mmp2.c | 4 ++--
drivers/clk/mm
From: Chao Xie
For the clk-frac, we need to make sure that the initial
clock rate is one item of the table.
If it is not, we use the first item in the table by default.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-frac.c | 40
1 file changed, 40 inse
On 10/31/2014 06:38 AM, Dave Hansen wrote:
+void do_mpx_bounds(struct pt_regs *regs, siginfo_t *info,
+ struct xsave_struct *xsave_buf)
+{
+ struct mpx_insn insn;
+ uint8_t bndregno;
+ unsigned long addr_vio;
+
+ addr_vio = mpx_insn_decode(&insn, regs);
+
+
From: Chao Xie
Move the definition of structure of mmp_clk_frac to
clk.h.
So device tree support can use this structure.
Signed-off-by: Chao Xie
---
drivers/clk/mmp/clk-frac.c | 8
drivers/clk/mmp/clk.h | 32 ++--
2 files changed, 22 insertions(+), 18
From: Chao Xie
Some SOCes have this kind of the gate clock
1. There are some bits to control the gate not only one bit.
2. It is not always that "1" is to enable while "0" is to disable
when write register.
So we have to define the "mask", "enable_val", "disable_val" for
this kind of gate clo
From: Chao Xie
Some clock control regsiter has bit to reset the cotroller.
So before enable the clock, we need deassert the reset pin.
Make use of reset controller framework to export reset interface
for device drivers, then device driver can control the reset action.
Signed-off-by: Chao Xie
--
From: Chao Xie
Add items in arch/arm/boot/dt/Makefile to compile the dtb
for mach-mmp.
Change the dts and dtsi file to use #include instead of \include\
Signed-off-by: Chao Xie
---
arch/arm/boot/dts/Makefile| 3 +++
arch/arm/boot/dts/mmp2-brownstone.dts | 2 +-
arch/arm/boot/dts/mm
Hi Sam,
On Wed, 29 Oct 2014 19:59:07 +0100
Sam Ravnborg wrote:
> On Wed, Oct 29, 2014 at 04:27:31PM +0900, Masahiro Yamada wrote:
> > The motivation of this commit is to avoid duplicated definitions
> > of "clean" and "hdr-inst" shorthands.
> >
> > The shorthand "clean" is defined in both the t
From: Chao Xie
It adds the DT support for mmp2 clock subsystem.
Signed-off-by: Chao Xie
---
.../devicetree/bindings/clock/marvell,mmp2.txt | 21 ++
drivers/clk/mmp/Makefile | 1 +
drivers/clk/mmp/clk-of-mmp2.c | 334 +
i
On Thu, Oct 30, 2014 at 6:04 PM, Linus Torvalds
wrote:
> On Thu, Oct 30, 2014 at 5:57 PM, Eric Rannaud wrote:
>> Yes, there definitely is a glibc bug: a fix is being worked on and it
>> looks like it will go in. The change replaces the test for O_CREAT by
>> a test for either O_CREAT or O_TMPFILE
From: Chao Xie
It adds the DT support for pxa910 clock subsystem.
Signed-off-by: Chao Xie
---
.../devicetree/bindings/clock/marvell,pxa910.txt | 21 ++
drivers/clk/mmp/Makefile | 2 +-
drivers/clk/mmp/clk-of-pxa910.c| 301 +
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