Hello Krzysztof,
On 07/07/2014 08:06 AM, Krzysztof Kozlowski wrote:
> On pią, 2014-07-04 at 22:24 +0200, Javier Martinez Canillas wrote:
>> The MAX7802 PMIC has a Real-Time-Clock (RTC) with two alarms.
>> This patch adds support for the RTC and is based on a driver
>> added by Simon Glass to the C
From: Maxime Ripard
The driver depend on the reset framework in a mandatory way. Make sure
reset_control_get is defined by adding this dependency in Kconfig
Signed-off-by: Maxime Ripard
Reported-by: Arnd Bergmann
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/Kconfig |1 +
1 file
Hi Greg,
Please find the pull requeust for 3.16 -rc cycle for PHY subsystem.
It contains few fixes in phy-core and few other PHY drivers. It also adds
regulatore support in PHY core which is needed to get USB and SATA working in
DRA7xx.
Please consider merging this for this -rc cylce. Let me kno
From: Kamil Debski
The Exynos4412 USB 2.0 PHY hardware differs from the description provided
in the documentation. Some register bits have different function. This
patch fixes the defines of register bits and changes the way how phys are
powered on and off.
Signed-off-by: Kamil Debski
Tested-by
From: Roger Quadros
If probe fails then we need to call pm_runtime_disable() to balance
out the previous pm_runtime_enable() call. Else it will cause
unbalanced pm_runtime_enable() call in the succeding probe call.
This anomaly was observed when the call to devm_phy_create() failed
with -EPROBE_
From: Roger Quadros
Prevent resources from being freed twice in case device_add() call
fails within phy_create(). Also use ida_simple_remove() instead of
ida_remove() as we had used ida_simple_get() to allocate the ida.
Signed-off-by: Roger Quadros
Signed-off-by: Kishon Vijay Abraham I
---
dr
From: Himangi Saraogi
devm_ioremap_resource returns an ERR_PTR value, not NULL, on failure.
A simplified version of the semantic match that finds this problem is as
follows:
//
@@
expression e,e1;
statement S;
@@
*e = devm_ioremap_resource(...);
if (!e1) S
//
Signed-off-by: Himangi Saraogi
From: Roger Quadros
Some PHYs can be powered by an external power regulator.
e.g. USB_HS PHY on DRA7 SoC. Make the PHY core support a
power regulator.
Signed-off-by: Roger Quadros
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/phy-core.c | 26 ++
include/linu
From: Sjoerd Simons
Allow phy-exynos-usb2 to be autoloaded based on devicetree information.
Tested on Odroid X2 with its USB subsystem build as modules.
Signed-off-by: Sjoerd Simons
Signed-off-by: Kishon Vijay Abraham I
---
drivers/phy/phy-samsung-usb2.c |1 +
1 file changed, 1 insertion(
From: Roger Quadros
phy-supply is a phandle to the regulator that provides power to the
PHY. This regulator is managed during the PHY power on/off sequence
by the phy core driver.
Signed-off-by: Roger Quadros
Signed-off-by: Kishon Vijay Abraham I
---
.../devicetree/bindings/phy/phy-bindings.t
Guys, please pull the following fix from Ard that stops the arm64 EFI
stub being rebuilt on every arm64 kernel build by removing the
dependency on the generated header files.
The following changes since commit 783ee43118dc773bc8b0342c5b230e017d5a04d0:
efi-pstore: Fix an overflow on 32-bit build
Hi all,
Changes since 20140704:
My fixes tree contains:
powerpc: Disable RELOCATABLE for COMPILE_TEST with PPC64
The net tree still had its build failure for which I reverted a commit.
The mvebu tree gained a conflict against the arm tree.
The renesas tree gained a conflict against the
On (Mon) 07 Jul 2014 [11:34:58], Amit Shah wrote:
> On (Mon) 07 Jul 2014 [11:23:52], Amit Shah wrote:
> > On (Sun) 06 Jul 2014 [21:41:47], Kees Cook wrote:
> > > On Fri, Jul 4, 2014 at 10:34 PM, Amit Shah wrote:
> > > > Commit d9e7972619334 "hwrng: add randomness to system from rng sources"
> > >
please ignore this patch
On 07/07/2014 02:28 PM, Yan, Zheng wrote:
> When the LBR call stack is enabled, it is necessary to save/restore
> the LBR stack on context switch. We can use pmu specific data to
> store LBR stack when task is scheduled out. This patch adds code
> that allocates the pmu sp
please ignore this patch
On 07/07/2014 02:28 PM, Yan, Zheng wrote:
> When enabling/disabling an event, check if the event uses the LBR
> callstack feature, adjust the LBR callstack usage count accordingly.
> Later patch will use the usage count to decide if LBR stack should
> be saved/restored.
>
On (Sun) 06 Jul 2014 [23:09:49], Kees Cook wrote:
> On Sun, Jul 6, 2014 at 10:51 PM, Amit Shah wrote:
> > On (Sun) 06 Jul 2014 [21:38:36], Kees Cook wrote:
> >> On Fri, Jul 4, 2014 at 10:34 PM, Amit Shah wrote:
> >> > The hwrng core asks for random data in the hwrng_register() call itself
> >> >
Previous commit introduces context switch callback, its function
overlaps with the flush branch stack callback. So we can use the
context switch callback to flush LBR stack.
This patch adds code that uses the flush branch callback to
flush the LBR stack when task is being scheduled in. The callbac
The callback is invoked when process is scheduled in or out.
It provides mechanism for later patches to save/store the LBR
stack. For the schedule in case, the callback is invoked at
the same place that flush branch stack callback is invoked.
So it also can replace the flush branch stack callback.
Haswell has a new feature that utilizes the existing LBR facility to
record call chains. To enable this feature, bits (JCC, NEAR_IND_JMP,
NEAR_REL_JMP, FAR_BRANCH, EN_CALLSTACK) in LBR_SELECT must be set to 1,
bits (NEAR_REL_CALL, NEAR-IND_CALL, NEAR_RET) must be cleared. Due to
a hardware bug of H
The index of lbr_sel_map is bit value of perf branch_sample_type.
PERF_SAMPLE_BRANCH_MAX is 1024 at present, so each lbr_sel_map uses
4096 bytes. By using bit shift as index, we can reduce lbr_sel_map
size to 40 bytes. This patch defines 'bit shift' for branch types,
and use 'bit shift' to define l
Introduce a new flag PERF_ATTACH_TASK_DATA for perf event's attach
stata. The flag is set by PMU's event_init() callback, it indicates
that perf event needs PMU specific data.
The PMU specific data are initialized to zeros. Later patches will
use PMU specific data to save LBR stack.
Signed-off-by
When enabling/disabling an event, check if the event uses the LBR
callstack feature, adjust the LBR callstack usage count accordingly.
Later patch will use the usage count to decide if LBR stack should
be saved/restored.
Signed-off-by: Yan, Zheng
---
arch/x86/kernel/cpu/perf_event_intel_lbr.c |
When the LBR call stack is enabled, it is necessary to save/restore
the LBR stack on context switch. We can use pmu specific data to
store LBR stack when task is scheduled out. This patch adds code
that allocates the pmu specific data.
Signed-off-by: Yan, Zheng
Reviewed-by: Stephane Eranian
---
When the LBR call stack is enabled, it is necessary to save/restore
the LBR stack on context switch. We can use pmu specific data to
store LBR stack when task is scheduled out. This patch adds code
that allocates the pmu specific data.
Signed-off-by: Yan, Zheng
Reviewed-by: Stephane Eranian
---
When enabling/disabling an event, check if the event uses the LBR
callstack feature, adjust the LBR callstack usage count accordingly.
Later patch will use the usage count to decide if LBR stack should
be saved/restored.
Signed-off-by: Yan, Zheng
---
arch/x86/kernel/cpu/perf_event_intel_lbr.c |
event->attr.branch_sample_type is non-zero no matter branch stack
is enabled explicitly or is enabled implicitly. we can use it to
replace intel_pmu_needs_lbr_smpl(). This avoids duplicating code
that implicitly enables the LBR.
Signed-off-by: Yan, Zheng
---
arch/x86/kernel/cpu/perf_event_intel.
When the LBR call stack is enabled, it is necessary to save/restore
the LBR stack on context switch. The solution is saving/restoring
the LBR stack to/from task's perf event context.
The LBR stack is saved/restored only when there are events that use
the LBR call stack. If no event uses LBR call s
Haswell has a new feature that utilizes the existing Last Branch Record
facility to record call chains. When the feature is enabled, function
call will be collected as normal, but as return instructions are executed
the last captured branch record is popped from the on-chip LBR registers.
The LBR c
"Zero length call" uses the attribute of the call instruction to push
the immediate instruction pointer on to the stack and then pops off
that address into a register. This is accomplished without any matching
return instruction. It confuses the hardware and make the recorded call
stack incorrect.
LBR callstack is designed for PEBS, It does not work well with
FREEZE_LBRS_ON_PMI for non PEBS event. If FREEZE_LBRS_ON_PMI is set for
non PEBS event, PMIs near call/return instructions may cause superfluous
increase/decrease of LBR_TOS.
This patch modifies __intel_pmu_lbr_enable() to not enable
F
Haswell has a new feature that utilizes the existing Last Branch Record
facility to record call chains. When the feature is enabled, function
call will be collected as normal, but as return instructions are executed
the last captured branch record is popped from the on-chip LBR registers.
The LBR c
make later patch more readable, no logic change.
Signed-off-by: Yan, Zheng
---
arch/x86/kernel/cpu/perf_event.c | 59
1 file changed, 29 insertions(+), 30 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index
If a task specific event wants user space callchain but does not want
branch stack sampling, enable the LBR call stack facility implicitly.
The LBR call stack facility can help perf to get user space callchain
in case of there is no frame pointer.
Note: this feature only affects how to get user ca
If two tasks were both forked from the same parent task, Events in
their perf task contexts can be the same. Perf core may leave out
switching the perf event contexts.
Previous patch inroduces pmu specific data. The data is for saving
the LBR stack, it is task specific. So we need to switch the da
For many profiling tasks we need the callgraph. For example we often
need to see the caller of a lock or the caller of a memcpy or other
library function to actually tune the program. Frame pointer unwinding
is efficient and works well. But frame pointers are off by default on
64bit code (and on mo
Hi Felipe,
On Wed, Jul 2, 2014 at 10:16 PM, Felipe Balbi wrote:
> Hi,
>
> On Sun, May 25, 2014 at 11:10:30PM +0530, sundeep subbaraya wrote:
>> Hi Felipe,
>>
>> Please take a look at below about how this IP works:
>>
>> IN:
>> req.buf ---> DMA (transfers from ddr to IP buffer, raise DMA
>>
On Tue, Jun 10, 2014 at 11:57:02PM +0900, Roman Pen wrote:
> In case of reboot my olinuxino imx23 board does not see
> mmc card any more. mmc_rescan is being called by delayed
> work in loop, but mxs_mmc_get_cd always returns 0, so we
> will never pass the card detection check and will not do
> fur
Hi,
On Fri, Jul 4, 2014 at 10:10 PM, Mark Rutland wrote:
> On Tue, Jun 24, 2014 at 07:44:10AM +0100, sundeep subbaraya wrote:
>> Ping
>>
>> Thanks,
>> Sundeep.B.S.
>>
>> On Tue, Jun 10, 2014 at 5:34 PM,
>> wrote:
>> > From: Subbaraya Sundeep Bhatta
>> >
>> > Add devicetree bindings for Xilinx
Signed-off-by: xiaofeng.yan
---
kernel/sched/deadline.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/sched/deadline.c b/kernel/sched/deadline.c
index fc4f98b1..6541565 100644
--- a/kernel/sched/deadline.c
+++ b/kernel/sched/deadline.c
@@ -306,7 +306,7 @@ static in
Hi Gleb,
Thanks for all the advices. Please see below.
On 07/04/2014 06:13 PM, Gleb Natapov wrote:
..
+static void vmx_set_apic_access_page_addr(struct kvm *kvm, hpa_t hpa)
+{
+ if (vm_need_virtualize_apic_accesses(kvm))
This shouldn't even been called if apic access page is not supp
On Sun, Jul 6, 2014 at 10:51 PM, Amit Shah wrote:
> On (Sun) 06 Jul 2014 [21:38:36], Kees Cook wrote:
>> On Fri, Jul 4, 2014 at 10:34 PM, Amit Shah wrote:
>> > The hwrng core asks for random data in the hwrng_register() call itself
>> > from commit d9e7972619. This doesn't play well with virtio
On pią, 2014-07-04 at 22:24 +0200, Javier Martinez Canillas wrote:
> The MAX77686 RTC chip has two features called SMPL (Sudden Momentary
> Power Loss) and WTSR (Watchdog Timeout and Software Resets).
> Support for these features seems to be implemented in the driver but
> compilation is disabled u
On pią, 2014-07-04 at 22:24 +0200, Javier Martinez Canillas wrote:
> The MAX7802 PMIC has a Real-Time-Clock (RTC) with two alarms.
> This patch adds support for the RTC and is based on a driver
> added by Simon Glass to the Chrome OS kernel 3.8 tree.
>
> Signed-off-by: Javier Martinez Canillas
>
The size of the buffer program has been increased from 256 to 512 , 2ms maximum
timeout for do_write_buffer can not adapt to all the different vendor's
norflash.There maximum timeout information in the CFI area,so the best way is
to choose the result calculated according to timeout field of stru
On (Mon) 07 Jul 2014 [11:23:52], Amit Shah wrote:
> On (Sun) 06 Jul 2014 [21:41:47], Kees Cook wrote:
> > On Fri, Jul 4, 2014 at 10:34 PM, Amit Shah wrote:
> > > Commit d9e7972619334 "hwrng: add randomness to system from rng sources"
> > > added a call to rng_get_data() from the hwrng_register() f
On Fri, Jul 04, 2014 at 09:03:10PM +0200, Fabian Frederick wrote:
> replace IS_ERR/PTR_ERR
>
> Cc: Shawn Guo
> Cc: Sascha Hauer
> Cc: linux-arm-ker...@lists.infradead.org
> Signed-off-by: Fabian Frederick
Applied, thanks.
--
To unsubscribe from this list: send the line "unsubscribe linux-kerne
On (Sun) 06 Jul 2014 [21:41:47], Kees Cook wrote:
> On Fri, Jul 4, 2014 at 10:34 PM, Amit Shah wrote:
> > Commit d9e7972619334 "hwrng: add randomness to system from rng sources"
> > added a call to rng_get_data() from the hwrng_register() function.
> > However, some rng devices need initialization
On Sat, Jul 05, 2014 at 10:30:55PM +0200, Pawel Lebioda wrote:
> Fix the following warning reported by checkpatch.pl:
>
> WARNING: else is not generally useful after a break or return
> 235: FILE: drivers/staging/nvec/nvec.c:235
>
> Signed-off-by: Pawel Lebioda
> ---
> drivers/staging/nvec/nvec
On Sat, Jul 05, 2014 at 10:30:56PM +0200, Pawel Lebioda wrote:
> Fix the following warning reported by checkpatch.pl:
>
> WARNING: Possible unnecessary 'out of memory' message
> 811: FILE: drivers/staging/nvec/nvec.c:811
>
> Signed-off-by: Pawel Lebioda
> ---
> drivers/staging/nvec/nvec.c | 5 +
On (Sun) 06 Jul 2014 [21:38:36], Kees Cook wrote:
> On Fri, Jul 4, 2014 at 10:34 PM, Amit Shah wrote:
> > The hwrng core asks for random data in the hwrng_register() call itself
> > from commit d9e7972619. This doesn't play well with virtio -- the
> > DRIVER_OK bit is only set by virtio core on a
On Wed, Jul 2, 2014 at 8:10 PM, Andi Kleen wrote:
> On Wed, Jul 02, 2014 at 06:07:31PM +0200, Stephane Eranian wrote:
>> On Wed, Jul 2, 2014 at 5:48 PM, Andi Kleen wrote:
>> > On Wed, Jul 02, 2014 at 05:44:05PM +0200, Stephane Eranian wrote:
>> >> On Wed, Jul 2, 2014 at 5:33 PM, Andi Kleen wrote
On Fri, Jul 04, 2014 at 05:00:41PM +0800, Liu Ying wrote:
> There could be some memory map devices located in
> a certain chip select region of the i.MX WEIM.
> The devices could be attached to a simple bus(for
> example, a AXI bus) whose root node is one child
> device tree node of the i.MX WEIM d
On Mon, Jul 7, 2014 at 2:40 AM, Michael Lentine wrote:
> Unless I'm missing something this removes defaulting the pager to cat if
> nothing is found which is very useful for devices/oses without less or
> pager.
>
>
I think you are correct Michael.
I don't quite understand the value of this patch.
Otherwise, if a large amount of direct IO writes were done, the
segment allocation may be failed because no enough segments are gced.
Signed-off-by: Huang, Ying
---
fs/f2fs/data.c |6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
--- a/fs/f2fs/data.c
+++ b/fs/f2fs/data.c
@@ -1038,6
>
> On 07/06/2014 10:11 AM, Larry Finger wrote:
> > A problem with configuration of IWLWIFI has been bisected to commit
> 48e2934, where a new section was added to
> drivers/net/wireless/iwlwifi/Kconfig with the following code:
> >
> > # don't call it _MODULE -- will confuse Kconfig/fixdep/...
> >
On Mon, Jul 07, 2014 at 06:32:04AM +0200, Julia Lawall wrote:
>
>
> On Sun, 6 Jul 2014, Greg KH wrote:
>
> > On Sun, Jul 06, 2014 at 09:43:42PM +0530, Himangi Saraogi wrote:
> > > nhi->rx_rings does not have type as struct tb_ring *, as it is a
> > > double pointer so the elements of the array s
I am attaching a log that shows my tests with the warnings I get for
succeeding tests
at http://kisskb.ellerman.id.au/kisskb/branch/9/. Good news is that at
least from my
test the non compiling configs are now compiling. They do have warnings which I
pasted into the file I am attaching.
Cheers Nick
This patch moves PMU specific definitions into a new file
as exynos-pmu.h.
This will help in reducing dependency of common.h in pmu.c.
Signed-off-by: Pankaj Dubey
---
arch/arm/mach-exynos/common.h | 17 -
arch/arm/mach-exynos/exynos-pmu.h | 24
ar
Add support for mapping Samsung Power Management Unit (PMU)
base address from device tree.
Signed-off-by: Pankaj Dubey
---
arch/arm/mach-exynos/common.h |1 +
arch/arm/mach-exynos/exynos.c | 37 +
2 files changed, 38 insertions(+)
diff --git a/arch/arm/
This patch series, modifies Exynos Power Management Unit (PMU) related code
for converting it into a platform_driver. This is also preparation for moving
PMU related code out of machine folder into a either "drivers/mfd", or
"drivers/power" or some other suitable place so that ARM64 based SoC can
u
This patch modifies Exynos Power Management Unit (PMU) initialization
implementation in following way:
- Added platform driver support and probe function where Exynos PMU
driver will register itself as syscon provider with syscon framework.
- Added platform struct exynos_pmu_data to hold platfor
Under "arm/mach-exynos" many files are using PMU register offsets.
Since we have added support for accessing PMU base address via DT,
now we can remove PMU mapping from exynosX_iodesc. Let's convert
all these access using iomapped address.
This will help us in removing static mapping of PMU base ad
Here are my logs of the builds attached with warnings if they succeed
for now failing arm configs
according to the tests here,
http://kisskb.ellerman.id.au/kisskb/branch/9/. I didn't do
arm-randconfig
through
Cheers Nick
P.S. If it's hard to read please let me known :)
Logs
Description: Binary d
The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't have
the required CAAM node, the layer should return an error and not register the
algorithms with crypto API layer.
Signed-off-by: Ruchika Gupt
The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't have
the required CAAM node, the layer should return an error and not register the
algorithms with crypto API layer.
Signed-off-by: Ruchika Gupt
commit 03787301420376ae41fbaf4267f4a6253d152ac5 upstream.
Backport for v3.14-stable.
Commit b1cb0982bdd6 ("change the management method of free objects of
the slab") introduced a bug on slab leak detector
('/proc/slab_allocators'). This detector works like as following
decription.
1. traverse a
On Fri, Jul 04, 2014 at 02:03:10PM +0200, Vlastimil Babka wrote:
> On 07/04/2014 09:57 AM, Joonsoo Kim wrote:
> > Isolation is really rare case so !is_migrate_isolate() is
> > likely case. Remove unlikely macro.
>
> Good catch. Why not replace it with likely then? Any difference in the
> assembly
Ccing Lisa, because there was bug report it may be related this
topic last Saturday.
http://www.spinics.net/lists/linux-mm/msg75741.html
On Fri, Jul 04, 2014 at 05:33:27PM +0200, Vlastimil Babka wrote:
> On 07/04/2014 09:57 AM, Joonsoo Kim wrote:
> > Hello,
>
> Hi Joonsoo,
>
> please CC me on f
On Fri, Jul 4, 2014 at 10:34 PM, Amit Shah wrote:
> Commit d9e7972619334 "hwrng: add randomness to system from rng sources"
> added a call to rng_get_data() from the hwrng_register() function.
> However, some rng devices need initialization before data can be read
> from them.
>
> This commit make
On Fri, Jul 4, 2014 at 10:34 PM, Amit Shah wrote:
> The hwrng core asks for random data in the hwrng_register() call itself
> from commit d9e7972619. This doesn't play well with virtio -- the
> DRIVER_OK bit is only set by virtio core on a successful probe, and
> we're not yet out of our probe ro
On Sun, 6 Jul 2014, Greg KH wrote:
> On Sun, Jul 06, 2014 at 09:43:42PM +0530, Himangi Saraogi wrote:
> > nhi->rx_rings does not have type as struct tb_ring *, as it is a
> > double pointer so the elements of the array should have pointer type,
> > not structure type.
> >
> > The Coccinelle sem
As there is only CONFIG_ACPI=n processing in the , it is not
safe to include directly for source out of Linux ACPI
subsystems.
This patch adds error messaging to warn developers of such wrong
inclusions.
In order not to be bisected and reverted as a wrong commit, warning
messages are carefully s
This patch adds a kernel configuration item to indicate the presense of
the architecture specific support for ACPICA, so that
inclusion can be configured out.
Signed-off-by: Lv Zheng
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: "H. Peter Anvin"
Cc: x...@kernel.org
Cc: Tony Luck
Cc: Fenghua Yu
Cc
The sst-haswell-dsp.c is an ACPI independent file, this patch removes
ACPI header files for it.
Signed-off-by: Lv Zheng
Cc: Liam Girdwood
Cc: Mark Brown
Cc: alsa-de...@alsa-project.org
---
sound/soc/intel/sst-haswell-dsp.c |3 ---
1 file changed, 3 deletions(-)
diff --git a/sound/soc/inte
This patch moves out of CONFIG_ACPI condition so that all
ACPICA prototypes can be seen by the CONFIG_ACPI=n Linux kernel builds.
Note that we can do this because ACPICA has implemented stubs for all
ACPICA prototypes that are currently referenced by the Linux kernel.
Signed-off-by: Lv Zheng
---
Hello Murali,
> -Original Message-
> From: Murali Karicheri [mailto:m-kariche...@ti.com]
> Sent: Tuesday, July 01, 2014 3:15 AM
> To: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
> devicet...@vger.kernel.org
> Cc: Murali Karicheri; Santosh Shilimkar; Russell King; Grant Likely;
This patch adds default 64-bit mathematics in aclinux.h using do_div(). As
do_div() can be used for all Linux architectures, this can also be used as
stub macros for ACPICA 64-bit mathematics.
But this is not a performance friendly way, as ACPICA's architecture
specific division OSL only requires
There are global variables and functions not upstreamed to the ACPICA code
base. Such symbols still can be referenced by external users as they are
listed in the acpixf.h. This patch uses ACPI_GLOBAL and
ACPI_EXTERNAL_RETURN_STATUS mechanism to add stub support for such symbols.
Signed-off-by: L
This patch removes inclusions from as
has already included it for CONFIG_ACPI=n builds.
Cc: Len Brown
Cc: sfi-de...@simplefirmware.org
Signed-off-by: Lv Zheng
---
include/linux/sfi_acpi.h |3 ---
1 file changed, 3 deletions(-)
diff --git a/include/linux/sfi_acpi.h b/include/linux/sfi_ac
This is the last series for ACPICA header inclusion cleanups.
The whole story can be found below:
1. Unsafe inclusions:
origin: https://lkml.org/lkml/2013/11/22/510
merged: https://lkml.org/lkml/2013/12/6/79
2. Header orders:
origin: https://lkml.org/lkml/2014/4/8/57
merged:
Hello Murali,
> -Original Message-
> From: Murali Karicheri [mailto:m-kariche...@ti.com]
> Sent: Tuesday, July 01, 2014 3:15 AM
> To: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org;
> devicet...@vger.kernel.org
> Cc: Murali Karicheri; Santosh Shilimkar; Russell King; Grant Likely;
As machine function ops are used only in this file let's make
them static. Also remove unused and unwanted declarations from
common.h.
Signed-off-by: Pankaj Dubey
Reviewed-by: Tomasz Figa
---
arch/arm/mach-exynos/common.h |8
arch/arm/mach-exynos/exynos.c |6 +++---
2 files cha
SMBus block commands are different to I2C block commands since
the returned data is not normally accessible with byte or word
commands on other command offsets. Add linked list of 'block'
commands to support those commands.
Access mechanism is quite simple: Block commands must be written
before th
As exynos_cpuidle_init and exynos_cpufreq_init function have just one lines
of code for registering platform devices. We can move these lines to
exynos_dt_machine_init and delete exynos_cpuidle_init and exynos_cpufreq_init
function. This will help in reducing lines of code in exynos.c, making it
mo
While making PMU implementation to be device tree based, there are
few register offsets related with SYSREG present in regs-pmu.h, so
let's make a new header file "regs-sys.h" to keep all such SYSREG
related register offsets and remove them from "regs-pmu.h"
Signed-off-by: Pankaj Dubey
Reviewed-b
Many files under "arm/mach-exynos" are having file path in file
comment section which is invalid now.
So for better code maintainability let's remove them.
Signed-off-by: Pankaj Dubey
Reviewed-by: Tomasz Figa
---
arch/arm/mach-exynos/headsmp.S |1 -
arch/arm/mach-exynos/hotplug.
Current "pm_domain.c" file uses "S5P_INT_LOCAL_PWR_EN" definition from
"regs-pmu.h" and hence needs to include this header file. As there is
no other user of "S5P_INT_LOCAL_PWR_EN" definition other than pm_domain,
to remove "regs-pmu.h" header file dependency from "pm_domain.c" it's
better we defi
This patch removes unnecessary header file inclusion from pmu.c.
Signed-off-by: Pankaj Dubey
Reviewed-by: Tomasz Figa
---
arch/arm/mach-exynos/pmu.c |1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index fb0deda..dcfcb44 100644
--- a/
This series is doing code cleanup under arch/arm/mach-exynos.
These patches have been separated from main exynos pmu v4 patch
posted here [1].
[1]: https://lkml.org/lkml/2014/5/10/29
Changes Since v5:
- Rebased on latest for-next of Kukjin Kim's tree.
- Using of_machine_is_compatible instead of
Hi,
Some people pointed out to me that it might be helpful to add stubs for
the newly added multicast exports. That way e.g. batman-adv should continue
to be compile and useable without having to have a kernel compiled
with bridge code in the future. This is what the first patch is supposed
to do.
With this patch other modules are able to ask the bridge whether an
IGMP or MLD querier exists on the according, bridged link layer.
Multicast snooping can only be performed if a valid, selected querier
exists on a link.
Just like the bridge only enables its multicast snooping if a querier
exists
To make users (e.g. batman-adv soon) load- and runnable even if the
bridge was compiled without snooping capabilities - or even if the
kernel was compiled without any bridge code at all.
Signed-off-by: Linus Lüssing
---
include/linux/if_bridge.h | 14 ++
1 file changed, 14 insertio
In this patch we use below inner macro and function to clean up codes.
1. ADDRS_PER_PAGE
2. SM_I
3. f2fs_readonly
Signed-off-by: Chao Yu
---
fs/f2fs/file.c| 3 +--
fs/f2fs/segment.c | 9 -
fs/f2fs/super.c | 7 +++
3 files changed, 8 insertions(+), 11 deletions(-)
diff --git a/
Hi Jaegeuk,
> -Original Message-
> From: Jaegeuk Kim [mailto:jaeg...@kernel.org]
> Sent: Wednesday, July 02, 2014 6:35 PM
> To: linux-kernel@vger.kernel.org; linux-fsde...@vger.kernel.org;
> linux-f2fs-de...@lists.sourceforge.net
> Cc: Jaegeuk Kim
> Subject: [f2fs-dev] [PATCH] f2fs: do che
Introduce a new mach-hisi that will support Hisilicon SoCs based on ARMv7 and
I am taking maintainership for it.
Signed-off-by: Wei Xu
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 134483f..d4ac517 100644
--- a/MAINTAINERS
+++ b/MAINT
On 2014/7/4 20:54, Sergei Shtylyov wrote:
> Hello.
>
> On 07/04/2014 12:49 PM, xuwei wrote:
>
>> Introduce a new mach-hisi that will support Hisilicon SoCs based on ARMv7
>> and I am taking maintainership for it.
>
>> Signed-off-by: Wei Xu
>> ---
>> MAINTAINERS | 8
>> 1 file chan
After we've added the first command byte write into advance_transaction(),
the IBF=0 waiter is duplicated with the command completion waiter
implemented in the ec_poll() because:
If IBF=1 blocked the first command byte write invoked in the task
context ec_poll(), it would be kicked off upon I
The bug fixes and asynchronous improvements have been done to the EC driver
by the previous commits. This patch increases the revision to 2.2 to
indicate the behavior differences between the old and the new drivers. The
copyright/authorship notices are also updated.
Authorship of Alexey is updated
This patch moves the first command byte write into advance_transaction() so
that all EC register accesses that can affect the command processing state
machine can happen in this asynchronous state machine advancement function.
The advance_transaction() function then can be a complete implementatio
There is a race condition in ec_transaction_completed().
When ec_transaction_completed() is called in the GPE handler, it could
return true because of (ec->curr == NULL). Then the wake_up() invocation
could complete the next command unexpectedly since there is no lock between
the 2 invocations. Th
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