[PATCH v2] drm/i915: Fix blank panel at reopening lid

When you reopen the lid on a laptop with PCH, the panel suddenly goes blank sometimes. It seems because BLC_PWM_CPU_CTL register is cleared to zero when BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1 registers are enabled. This patch fixes the problem by moving the call of the function setting BLC_PWM_CPU

Re: i915 regression on 3.6-rc1: lid blanks screen

At Fri, 10 Aug 2012 11:53:51 -0700 (PDT), Hugh Dickins wrote: > > On Fri, 10 Aug 2012, Takashi Iwai wrote: > > At Fri, 10 Aug 2012 14:35:13 +0200, > > Daniel Vetter wrote: > > > > > > On Fri, Aug 10, 2012 at 1:59 PM, Takashi Iwai wrote: > > > > At Mon, 6 Aug 2012 11:25:30 -0700 (PDT), > > > > Hu

Re: [RFC PATCH 0/2] net: connect to UNIX sockets from specified root

On 08/11/2012 03:09 AM, H. Peter Anvin wrote: > On 08/10/2012 12:28 PM, Alan Cox wrote: >> Explicitly for Linux yes - this is not generally true of the AF_UNIX >> socket domain and even the permissions aspect isn't guaranteed to be >> supported on some BSD environments ! > > Yes, but let's worry a

Re: [PATCH v5 02/12] dm: Use bioset's front_pad for dm_rq_clone_bio_info

Hi Kent, Tejun On 9 August 2012 09:57, Kent Overstreet wrote: >> Also, how was this tested? > > Well, AFAICT the only request based dm target is multipath, and from the > documentation I've seen it doesn't appear to work without multipath > hardware, or at least I haven't seen it documented how.

Re: [PATCH v2 06/11] memcg: kmem controller infrastructure

On Thu, Aug 09 2012, Glauber Costa wrote: > This patch introduces infrastructure for tracking kernel memory pages to > a given memcg. This will happen whenever the caller includes the flag > __GFP_KMEMCG flag, and the task belong to a memcg other than the root. > > In memcontrol.h those functions

Re: xtensa port maintenance

Chris Zankel wrote: > I have set up a tree on github for now, and will work close > with Max to get his changes to Stephen's linux-next tree and > eventually Linus' tree. > I think it's fine to add Max as a second maintainer [...] Thanks for helping! Pete Delaney wrote: > I'm afraid that doing i

Re: Upgraded from 3.4 to 3.5.1 kernel: machine does not boot

On Fri, Aug 10, 2012 at 7:07 PM, Justin Piszcz > > Hi, > > Found the root cause, the 3.5.1 kernel cannot mount my ext4 filesystem > (60TB). > > The 3.4 kernel works fine. > > This is proven by commenting out the filesystem in /etc/fstab with > 3.5.1, and all is OK. > > -- > > Hi again, > > I tested

Re: [PATCH v5 00/12] KVM: introduce readonly memslot

On 08/11/2012 02:14 AM, Marcelo Tosatti wrote: > On Tue, Aug 07, 2012 at 05:47:15PM +0800, Xiao Guangrong wrote: >> Changelog: >> - introduce KVM_PFN_ERR_RO_FAULT instead of dummy page >> - introduce KVM_HVA_ERR_BAD and optimize error hva indicators >> >> The test case can be found at: >> http://lk

Re: [PATCH v5 11/12] KVM: x86: introduce set_mmio_exit_info

On 08/11/2012 02:03 AM, Marcelo Tosatti wrote: >> int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr, >> void *val, unsigned int bytes, >> struct x86_exception *exception, >> @@ -3870,14 +3881,10 @@ int emulator_read_write(struct x8

Re: [PATCH v5 05/12] KVM: reorganize hva_to_pfn

On 08/11/2012 01:51 AM, Marcelo Tosatti wrote: > On Tue, Aug 07, 2012 at 05:51:05PM +0800, Xiao Guangrong wrote: >> We do too many things in hva_to_pfn, this patch reorganize the code, >> let it be better readable >> >> Signed-off-by: Xiao Guangrong >> --- >> virt/kvm/kvm_main.c | 159 >> ++

[BUGFIX PATCH][RESEND] kexec & iosapic: kexec oops when iosapic was removed

Hi, all We are working on a node hot-plug project, and IOAPIC is one of these devices to be removed. but after IOSAPIC was removed, we use kexec to start a new kernel, oops happended. I reviewed the code and find out: iosapic_remove iosapic_free memset(&iosapic_lists[index], 0, sizeof(iosapi

[RFC PATCH][RESEND] Fusion MPT: disable pci device when mpt map resoures failed

when probe a pci device, first we enable it, and disable it when some error happened in the following process, because the power state of the device is set to D0, and if MSI is disabled, we will allocate irq and register gsi for this device in the enable process. In function mpt_mapresources(MPT_

Re: [PATCH 2/2] ARM: local timers: add timer support using IO mapped register

On 8/10/2012 5:58 PM, Rohit Vaswani wrote: The current arch_timer only support accessing through CP15 interface. Add support for ARM processors that only support IO mapped register interface It looks like this patch attempts to address both (a) non-percpu arch timers, and (b) memory mapped ar

Re: [PATCH 1/6] regulator: core: Add checking n_voltages if using list_voltage() to read voltage regulators

2012/8/10 Mark Brown : > On Fri, Aug 10, 2012 at 08:27:32PM +0800, Axel Lin wrote: >> 2012/8/10 Mark Brown : > >> > We should be failing to register these regulators in the first place, or >> > at least complaining extremely loudly about them. > >> Oh. My original intention is to prevent using list

Re: [PATCH] [PATCH V4]Extcon: adc_jack: adc-jack driver to support 3.5 pi or simliar devices

Hello Jonathan, Please refer the latest patch. Thanks, On Fri, 2012-08-10 at 22:01 +0100, Jonathan Cameron wrote: > On 08/08/2012 02:04 AM, anish kumar wrote: > > From: anish kumar > > > > External connector devices that decides connection information based on > > ADC values may use adc-jack dev

[PATCH 2/3 V1] block: Fix not tracing all device plug-operation.

If process handled two or more devices,there will not be trace some devices plug-operation. V0-->V1 Fix a bug when insert a req to plug-list which already had the same request-queue, it should used list_add not list_add_tail. Signed-off-by: Jianpeng Ma Signed-off-by: Jens Axboe --- block/blk-

[PATCH v2 09/22] ARM: LPAE: use phys_addr_t for initrd location and size

From: Vitaly Andrianov This patch fixes the initrd setup code to use phys_addr_t instead of assuming 32-bit addressing. Without this we cannot boot on systems where initrd is located above the 4G physical address limit. Signed-off-by: Vitaly Andrianov Signed-off-by: Cyril Chemparathy --- arc

[RFC v2 21/22] ARM: keystone: enable SMP on Keystone machines

This patch adds basic SMP support for Keystone machines. Nothing very fancy here, just enough to get 4 CPUs booted up. This does not include support for hotplug, etc. Signed-off-by: Vitaly Andrianov Signed-off-by: Cyril Chemparathy --- arch/arm/Kconfig|1 + arch/arm/co

[PATCH v2 06/22] ARM: LPAE: use signed arithmetic for mask definitions

This patch applies to PAGE_MASK, PMD_MASK, and PGDIR_MASK, where forcing unsigned long math truncates the mask at the 32-bits. This clearly does bad things on PAE systems. This patch fixes this problem by defining these masks as signed quantities. We then rely on sign extension to do the right th

[PATCH v2 18/22] ARM: add virt_to_idmap for interconnect aliasing

From: Vitaly Andrianov On some PAE systems (e.g. TI Keystone), memory is above the 32-bit addressible limit, and the interconnect provides an aliased view of parts of physical memory in the 32-bit addressible space. This alias is strictly for boot time usage, and is not otherwise usable because

[PATCH v2 08/22] ARM: LPAE: use phys_addr_t in free_memmap()

From: Vitaly Andrianov The free_memmap() was mistakenly using unsigned long type to represent physical addresses. This breaks on PAE systems where memory could be placed above the 32-bit addressible limit. This patch fixes this function to properly use phys_addr_t instead. Signed-off-by: Vital

[PATCH v2 02/22] ARM: add self test for runtime patch mechanism

This patch adds basic sanity tests to ensure that the instruction patching results in valid instruction encodings. This is done by verifying the output of the patch process against a vector of assembler generated instructions at init time. Signed-off-by: Cyril Chemparathy --- arch/arm/Kconfig

[PATCH v2 16/22] ARM: mm: cleanup checks for membank overlap with vmalloc area

On Keystone platforms, physical memory is entirely outside the 32-bit addressible range. Therefore, the (bank->start > ULONG_MAX) check below marks the entire system memory as highmem, and this causes unpleasentness all over. This patch eliminates the extra bank start check (against ULONG_MAX) by

[PATCH v2 11/22] ARM: LPAE: use 64-bit accessors for TTBR registers

This patch adds TTBR accessor macros, and modifies cpu_get_pgd() and the LPAE version of cpu_set_reserved_ttbr0() to use these instead. In the process, we also fix these functions to correctly handle cases where the physical address lies beyond the 4G limit of 32-bit addressing. Signed-off-by: Cy

[RFC v2 22/22] ARM: keystone: add switch over to high physical address range

Keystone platforms have their physical memory mapped at an address outside the 32-bit physical range. A Keystone machine with 16G of RAM would find its memory at 0x08 - 0x0b. For boot purposes, the interconnect supports a limited alias of some of this memory within the 32-bit addr

[PATCH v2 00/22] Introducing the TI Keystone platform

This series is a follow on to the series posted earlier (archived at [1]). Patches 01/22 .. 09/22 of this series have been pretty intensively reviewed; thanks to all who helped. We've modified per feedback, and these should be in reasonable shape. Patches 10/22 .. 19/22 of this series have not b

[PATCH v2 03/22] ARM: use late patch framework for phys-virt patching

This patch replaces the original physical offset patching implementation with one that uses the newly added patching framework. In the process, we now unconditionally initialize the __pv_phys_offset and __pv_offset globals in the head.S code. Signed-off-by: Cyril Chemparathy --- arch/arm/Kconfi

[PATCH v2 07/22] ARM: LPAE: use phys_addr_t in alloc_init_pud()

From: Vitaly Andrianov This patch fixes the alloc_init_pud() function to use phys_addr_t instead of unsigned long when passing in the phys argument. This is an extension to commit 97092e0c56830457af0639f6bd904537a150ea4a (ARM: pgtable: use phys_addr_t for physical addresses), which applied simil

[PATCH v2 13/22] ARM: LPAE: factor out T1SZ and TTBR1 computations

This patch moves the TTBR1 offset calculation and the T1SZ calculation out of the TTB setup assembly code. This should not affect functionality in any way, but improves code readability as well as readability of subsequent patches in this series. Signed-off-by: Cyril Chemparathy Signed-off-by: V

[PATCH v2 04/22] ARM: LPAE: use phys_addr_t on virt <--> phys conversion

This patch fixes up the types used when converting back and forth between physical and virtual addresses. Signed-off-by: Vitaly Andrianov Signed-off-by: Cyril Chemparathy --- arch/arm/include/asm/memory.h | 26 ++ 1 file changed, 18 insertions(+), 8 deletions(-) diff

[PATCH v2 01/22] ARM: add mechanism for late code patching

The original phys_to_virt/virt_to_phys patching implementation relied on early patching prior to MMU initialization. On PAE systems running out of >4G address space, this would have entailed an additional round of patching after switching over to the high address space. The approach implemented h

[PATCH v2 15/22] ARM: mm: use physical addresses in highmem sanity checks

This patch modifies the highmem sanity checking code to use physical addresses instead. This change eliminates the wrap-around problems associated with the original virtual address based checks, and this simplifies the code a bit. The one constraint imposed here is that low physical memory must b

[PATCH v2 19/22] ARM: recreate kernel mappings in early_paging_init()

This patch adds a step in the init sequence, in order to recreate the kernel code/data page table mappings prior to full paging initialization. This is necessary on LPAE systems that run out of a physical address space outside the 4G limit. On these systems, this implementation provides a machine

[PATCH v2 05/22] ARM: LPAE: support 64-bit virt_to_phys patching

This patch adds support for 64-bit physical addresses in virt_to_phys() patching. This does not do real 64-bit add/sub, but instead patches in the upper 32-bits of the phys_offset directly into the output of virt_to_phys. There is no corresponding change on the phys_to_virt() side, because comput

[RFC v2 20/22] ARM: keystone: introducing TI Keystone platform

Texas Instruments Keystone family of multicore devices now includes an upcoming slew of Cortex A15 based devices. This patch adds basic definitions for a new Keystone sub-architecture in ARM. Subsequent patches in this series will extend support to include SMP and take advantage of the large phys

[PATCH v2 10/22] ARM: LPAE: use phys_addr_t in switch_mm()

This patch modifies the switch_mm() processor functions to use phys_addr_t. On LPAE systems, we now honor the upper 32-bits of the physical address that is being passed in, and program these into TTBR as expected. Signed-off-by: Cyril Chemparathy Signed-off-by: Vitaly Andrianov --- arch/arm/inc

[PATCH v2 12/22] ARM: LPAE: define ARCH_LOW_ADDRESS_LIMIT for bootmem

This patch adds an architecture defined override for ARCH_LOW_ADDRESS_LIMIT. On PAE systems, the absence of this override causes bootmem to incorrectly limit itself to 32-bit addressable physical memory. Signed-off-by: Cyril Chemparathy Signed-off-by: Vitaly Andrianov --- arch/arm/include/asm/m

[PATCH v2 17/22] ARM: mm: clean up membank size limit checks

This patch cleans up the highmem sanity check code by simplifying the range checks with a pre-calculated size_limit. This patch should otherwise have no functional impact on behavior. This patch also removes a redundant (bank->start < vmalloc_limit) check, since this is already covered by the !hi

[PATCH v2 14/22] ARM: LPAE: accomodate >32-bit addresses for page table base

This patch redefines the early boot time use of the R4 register to steal a few low order bits (ARCH_PGD_SHIFT bits) on LPAE systems. This allows for up to 38-bit physical addresses. Signed-off-by: Cyril Chemparathy Signed-off-by: Vitaly Andrianov --- arch/arm/include/asm/memory.h | 15 ++

Re: [PATCH 3/3] HWPOISON: improve handling/reporting of memory error on dirty pagecache

Hello, On Fri, Aug 10, 2012 at 04:13:03PM -0700, Andi Kleen wrote: > Naoya Horiguchi writes: > > > Current error reporting of memory errors on dirty pagecache has silent > > data lost problem because AS_EIO in struct address_space is cleared > > once checked. > > Seems very complicated. I thin

Re: [PATCH 2/3] HWPOISON: undo memory error handling for dirty pagecache

Hi Andi, On Fri, Aug 10, 2012 at 04:09:48PM -0700, Andi Kleen wrote: > Naoya Horiguchi writes: > > > Current memory error handling on dirty pagecache has a bug that user > > processes who use corrupted pages via read() or write() can't be aware > > of the memory error and result in discarding di

Linux 3.2.27

I'm announcing the release of the 3.2.27 kernel. All users of the 3.2 kernel series should upgrade. The updated 3.2.y git tree can be found at: git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git linux-3.2.y and can be browsed at the normal kernel.org git web browser:

Re: [PATCH] xconfig: Display dependency values in debug_info

On 08/09/2012 11:54 AM, Salar Ali Mumtaz wrote: > On 12-08-07 12:55 PM, Randy Dunlap wrote: > >> In Kconfig language, is "" the same as 'n' ? >> If so, I'm OK with your proposal above. >> > > > So a colleague of mine tested this and came up with a conclusion that > expressions in Kconfig can o

[tip:x86/urgent] x86, build: Globally set -fno-pic

Commit-ID: 484d90eec884d814b005c9736bcf3fd018acba65 Gitweb: http://git.kernel.org/tip/484d90eec884d814b005c9736bcf3fd018acba65 Author: Andrew Boie AuthorDate: Fri, 10 Aug 2012 11:49:06 -0700 Committer: H. Peter Anvin CommitDate: Fri, 10 Aug 2012 16:12:30 -0700 x86, build: Globally set

Re: [PATCH] x86, pci: Fix all early PCI scans to check the vendor ID first

On 08/09/2012 03:34 PM, Betty Dall wrote: > > I thought this should be a break instead of a continue since the code > does a break if the class is 0x. If the function does not have a > valid VENDOR_ID, then the remaining function numbers do not have to be > scanned because functions are re

Re: [PATCH 2/2] ARM: local timers: add timer support using IO mapped register

Thanks for your feedback Rob. On 8/10/2012 3:10 PM, Rob Herring wrote: On 08/10/2012 04:58 PM, Rohit Vaswani wrote: The current arch_timer only support accessing through CP15 interface. Add support for ARM processors that only support IO mapped register interface Signed-off-by: Rohit Vaswani

Re: pull request: wireless 2012-08-10

From: "John W. Linville" Date: Fri, 10 Aug 2012 14:33:51 -0400 > Here is a handful of fixes intended for 3.6. > > Daniel Drake offers a cfg80211 fix to consume pending events before > taking a wireless device down. This prevents a resource leak. > > Stanislaw Gruszka gives us a fix for a NULL

Re: [PATCH 2/2] ARM: nomadik: configure Nomadik for pin control

On 08/09/2012 04:43 PM, Linus Walleij wrote: > This converts the Nomadik to using pin control using the > driver for the STN8815 ASIC. > diff --git a/arch/arm/mach-nomadik/cpu-8815.c > b/arch/arm/mach-nomadik/cpu-8815.c > +static inline void > +cpu8815_add_pinctrl(struct device *parent, const ch

Re: [PATCH 1/2] pinctrl/nomadik: add STn8815 ASIC support

On 08/09/2012 04:43 PM, Linus Walleij wrote: > This adds support for the STN8815 ASIC for the Nomadik pin > controller. Acked-by: Stephen Warren -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at

Re: [PATCH 3/3] HWPOISON: improve handling/reporting of memory error on dirty pagecache

Naoya Horiguchi writes: > Current error reporting of memory errors on dirty pagecache has silent > data lost problem because AS_EIO in struct address_space is cleared > once checked. Seems very complicated. I think I would prefer something simpler if possible, especially unless it's proven the

[PATCH] rtc: add MAX8907 RTC driver

From: Stephen Warren The MAX8907 is an I2C-based power-management IC containing voltage regulators, a reset controller, a real-time clock, and a touch-screen controller. The driver is based on an original by or fixed by: * Tom Cherry * Prashant Gaikwad * Joseph Yoon During upstreaming, I (sw

Re: [RFC PATCH 0/2] net: connect to UNIX sockets from specified root

On 08/10/2012 12:28 PM, Alan Cox wrote: > Explicitly for Linux yes - this is not generally true of the AF_UNIX > socket domain and even the permissions aspect isn't guaranteed to be > supported on some BSD environments ! Yes, but let's worry about what the Linux behavior should be. > The name is

Re: [PATCH 2/3] HWPOISON: undo memory error handling for dirty pagecache

Naoya Horiguchi writes: > Current memory error handling on dirty pagecache has a bug that user > processes who use corrupted pages via read() or write() can't be aware > of the memory error and result in discarding dirty data silently. > > The following patch is to improve handling/reporting memo

Re: null pointer dereference while loading i915

* On 10.08.2012 07:44 PM, Mihai Moldovan wrote: > Hm, OK. > > Well, I'm done now. > > bisect log: > > git bisect start > # good: [805a6af8dba5dfdd35ec35dc52ec0122400b2610] Linux 3.2 > git bisect good 805a6af8dba5dfdd35ec35dc52ec0122400b2610 > # bad: [28a33cbc24e4256c143dce96c7d93bf423229f92] Linux

Re: [PATCH 1/3] HWPOISON: fix action_result() to print out dirty/clean

Naoya Horiguchi writes: > action_result() fails to print out "dirty" even if an error occurred on a > dirty pagecache, because when we check PageDirty in action_result() it was > cleared after page isolation even if it's dirty before error handling. This > can break some applications that monitor

RE: Upgraded from 3.4 to 3.5.1 kernel: machine does not boot

-Original Message- From: Justin Piszcz [mailto:jpis...@lucidpixels.com] Sent: Friday, August 10, 2012 5:46 PM To: Jesper Juhl Cc: linux-kernel@vger.kernel.org; a...@solarrain.com Subject: Re: Upgraded from 3.4 to 3.5.1 kernel: machine does not boot On Fri, Aug 10, 2012 at 1:53 PM, Jespe

dma mapping error check analysis

I analyzed current calls to dma_map_single() and dma_map_page() in the kernel to see if dma mapping errors are checked after mapping routines return. Reference linux-next August 6 2012. This analysis stemmed from the discussion on my patch that disables swiotlb overflow as a first step towards re

Re: xtensa port maintenance

Hi Arnd, Given the recent renewed push for Xtensa, I'll step in to feed the changes upstream. We might change that in future, though. Max has volunteered to help bring the Xtensa port up-to-date. Most of the recent development was done on outdated trees and never got submitted in true kernel

[PATCH v8 6/6] kvm: Add de-assert option to KVM_IRQ_ACKFD

It's likely (vfio) that one of the reasons to watch for an IRQ ACK is to de-assert and re-enable an interrupt. As the IRQ ACK notfier is already watching a GSI for an IRQ source ID we can easily couple these together. Signed-off-by: Alex Williamson --- Documentation/virtual/kvm/api.txt |4

[PATCH v8 5/6] kvm: KVM_IRQ_ACKFD

Enable a mechanism for IRQ ACKs to be exposed through an eventfd. The user can specify the GSI and optionally an IRQ source ID and have the provided eventfd trigger whenever the irqchip resamples it's inputs, for instance on EOI. Signed-off-by: Alex Williamson --- Documentation/virtual/kvm/api

[PATCH v8 4/6] kvm: Add assert-only option to KVM_IRQFD

This allows specifying that an irqfd is used only to assert the specified gsi, whereas standard behavior is to follow the assertion with a deassertion. This will later allow a level interrupt to be asserted via eventfd and later de-asserted by other means. Signed-off-by: Alex Williamson --- Do

[PATCH v8 3/6] kvm: Add IRQ source ID option to KVM_IRQFD

This allows specifying an IRQ source ID to be used when injecting an interrupt. When not specified KVM_USERSPACE_IRQ_SOURCE_ID is used. Signed-off-by: Alex Williamson --- Documentation/virtual/kvm/api.txt |5 + arch/x86/kvm/x86.c|1 + include/linux/kvm.h

[PATCH v8 2/6] kvm: Expose IRQ source IDs to userspace

Introduce KVM_IRQ_SOURCE_ID and KVM_CAP_NR_IRQ_SOURCE_ID to allow user allocation of IRQ source IDs and querying both the capability and the total count of IRQ source IDs. These will later be used by interfaces for setting up level IRQs. Signed-off-by: Alex Williamson --- Documentation/virtual

[PATCH v8 1/6] kvm: Allow filtering of acked irqs

Registering an kvm_irq_ack_notifier with kian.irq_source_id < 0 retains existing behavior, filling in the actual irq_source_id results in the callback only being called when the specified irq_source_id is asserting the given gsi. The i8254 PIT remains unfiltered because it de-asserts it's irq sour

[PATCH v8 0/6] kvm: level irqfd support

v8: Trying a new approach. Nobody seems to like the internal IRQ source ID object and the interactions it implies between irqfd and eoifd, so let's get rid of it. Instead, simply expose IRQ source IDs to userspace. This lets the user be in charge of freeing them or hanging onto a source ID for

Re: mellanox mlx4_core and SR-IOV

On Fri, Aug 10, 2012 at 12:51:53PM -0600, Chris Friesen wrote: > On 08/03/2012 02:33 AM, Lukas Hejtmanek wrote: > >I also tried OFED package from Mellanox which seems to have better SR-IOV > >support (at least mlx4_ib does not complain that SR-IOV is not supported). > >However, it does not work whe

[PATCH 04/16] perf utils: remove unused function map__objdump_2ip

map__objdump_2ip was introduced in: ee11b90b12 perf top: Fix annotate for userspace And it's last user removed in: 36532461a0 perf top: Ditch private annotation code, share perf annotate's Remove it. Signed-off-by: Cody P Schafer --- tools/perf/util/map.c | 8 tools/perf/util/map.h |

[PATCH 07/16] perf symbol: simplify out_fixup in kernel syms loading

The only site that jumps to out_fixup has (kallsyms_filename == NULL). And all paths that reach 'if (err > 0)' without 'goto out_fixup' have kallsyms_filename != NULL. So skip over both the check & dso__set_long_name(), and remove the check. Signed-off-by: Cody P Schafer --- tools/perf/util/sym

[PATCH 14/16] perf symbol: factor want_symtab out of dso__load_sym()

Only one callsite of dso__load_sym() uses the want_symtab functionality, so place the logic at the callsite instead of within dso__load_sym(). This sets us up for removal of want_symtab completely once we keep multiple elf handles (within symsrc's) around. Setup for the later patch "perf symbol:

[PATCH 02/16] perf symbol: remove unused 'end' arg in kallsyms parse cb

kallsyms__parse() takes a callback that is called on every discovered symbol. As /proc/kallsyms does not supply symbol sizes, the callback was simply called with end=start, faking the symbol size to 1. All of the callbacks (there are 2) used in calls to kallsyms__parse() are _only_ used as callbac

[PATCH 03/16] perf symbol: only un-prelink non-zero symbols

Prelink only adjusts the addresses of non-zero symbols. Do the same when we reverse the adjustments. Signed-off-by: Cody P Schafer --- tools/perf/util/symbol-elf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/perf/util/symbol-elf.c b/tools/perf/util/symbol-elf.c inde

[PATCH 05/16] perf symbol: don't try to synthesize plt without dynstr.

If .dynsym exists but .dynstr is empty (NO_BITS or size==0), a segfault occurs. Avoid this by checking that .dynstr is not empty. Signed-off-by: Cody P Schafer --- tools/perf/util/symbol-elf.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tools/perf/util/symbol-elf.c b/tools/perf/util/s

[PATCH 08/16] perf symbol: only set vmlinux longname & mark loaded if really loaded

dso__load_vmlinux() uses the filename passed to it to directly set the dso long_name, which resulted in a use after free due to dso__load_vmlinux_path() treating 0 symbols as a load failure and subsequently freeing the contents of dso->long_name. Change dso__load_vmlinux() so that finding 0 symbol

[PATCH 16/16] perf symbol: use both runtime and debug images

We keep both a 'runtime' elf image as well as a 'debug' elf image around and generate symbols by looking at both of these. This eliminates the need for the want_symtab/goto restart mechanism combined with iterating over and reopening the elf images a second time. Also give dso__synthsize_plt_symb

[PATCH 06/16] perf symbol: remove unneeded call to dso__set_long_name()

dso__set_long_name() is already called by dso__load_vmlinux(), avoid calling it a second time unnecessarily. Signed-off-by: Cody P Schafer --- tools/perf/util/symbol.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c index

[PATCH 11/16] perf symbol: introduce symsrc structure.

Factors opening of certain sections & tracking certain elf info into an external structure. The goal here is to keep multiple elfs (and their looked up sections/indexes) around during the symbol generation process (in dso__load()). We need this to properly resolve symbols on PPC due to the use of

[PATCH 10/16] perf symbol: track symtab_type of vmlinux

Previously, symtab_type would have been left at 0, or KALLSYMS, which is not quite accurate. Introduce DSO_SYMTAB_TYPE__VMLINUX[_GUEST]. Signed-off-by: Cody P Schafer --- tools/perf/util/symbol.c | 9 + tools/perf/util/symbol.h | 2 ++ 2 files changed, 11 insertions(+) diff --git a/too

[PATCH 09/16] perf symbol: avoid segfault in elf_strptr

If we call elf_section_by_name() with a truncated elf image (ie: the file header indicates that the section headers are placed past the end of the file), elf_strptr() causes a segfault within libelf. Avoid this by checking that we can access the section string table properly. Should really be fix

[PATCH 15/16] perf symbol: convert dso__load_syms to take 2 symsrc's

To properly handle platforms with an opd section, both a runtime image (which contains the opd section but possibly lacks symbols) and a symbol image (which probably lacks an opd section but has symbols). The next patch ("perf symbol: use both runtime and debug images") adjusts the callsite in dso

[PATCH 13/16] perf symbol: switch dso__synthesize_plt_symbols() to use symsrc

Previously dso__synthesize_plt_symbols() was reopening the elf file to obtain dynsyms from it. Rather than reopen the file, use the already opened reference within the symsrc to access it. Setup for the later patch "perf symbol: use both runtime and debug images" Signed-off-by: Cody P Schafer --

[PATCH 12/16] perf symbol: set symtab_type in dso__load_sym

In certain cases, dso__load requires dso->symbol_type to be set prior to calling it. With the introduction of symsrc*, the symtab_type is now stored in a symsrc which is then passed to dso__load_sym(). Change dso__load_sym() to use the symtab_type from them symsrc (setting dso->symtab_type as well

[PATCH 01/16] perf symbol: correct comment wrt kallsyms loading

In kallsyms_parse() when calling process_symbol() (a callback argument to kallsyms_parse()), we pass start as both start & end (ie: start=start, end=start). In map__process_kallsym_symbol(), the length is calculated as 'end - start + 1', making the length 1, not 0. Essentially, start & end define

[PATCH v2 00/16] perf: various symbol resolution fixes, including .opd section use.

1-4,6,7 are small cleanups. 5 fixes a potential segfault. 8 fixes a use after free for dso->long_name 9 avoids a segfault in elfutils when a truncated elf is loaded. 10 properly tracks that a dso had symbols loaded from a vmlinux image 11-16 fix handling of the '.opd' section in the presence o

Re: [RFC PATCH 3/5] drm/i915: register LVDS connector even if we can't get a panel mode

On Mon, Aug 06, 2012 at 07:44:16AM +1000, Dave Airlie wrote: > >> The "correct" approach is clearly to just have the drm core change the > >> i2c mux before requesting edid, but that's made difficult because of the > >> absence of ordering guarantees in initialisation. I don't like quirking > >> th

Re: [PATCH 2/2] ARM: local timers: add timer support using IO mapped register

On 08/10/2012 04:58 PM, Rohit Vaswani wrote: > The current arch_timer only support accessing through CP15 interface. > Add support for ARM processors that only support IO mapped register > interface > > Signed-off-by: Rohit Vaswani > --- > .../devicetree/bindings/arm/arch_timer.txt |

Re: [PATCH 3/3] HWPOISON: improve handling/reporting of memory error on dirty pagecache

On Fri, Aug 10, 2012 at 05:41:53PM -0400, Naoya Horiguchi wrote: ... > +/* > * Dirty cache page page > * Issues: when the error hit a hole page the error is not properly > * propagated. > */ > static int me_pagecache_dirty(struct page *p, unsigned long pfn) > { > - /* > - * The o

[PATCH 2/2] ARM: local timers: add timer support using IO mapped register

The current arch_timer only support accessing through CP15 interface. Add support for ARM processors that only support IO mapped register interface Signed-off-by: Rohit Vaswani --- .../devicetree/bindings/arm/arch_timer.txt |7 + arch/arm/kernel/arch_timer.c |

[PATCH 1/2] ARM: local timers: Unmask interrupt before new TVAL is set

Level triggered interrupt is deasserted when a new TVAL is written only when the interrupt is unmasked. Make sure that the interrupt is unmasked in CTL register before TVAL is written. If this order is not followed, there are chances that on some hardware you would not receive any timer interrupts.

Failure while make modules_install if kmod was compiled with --with-rootprefix set

Dear Mr. Marek, dear all, I have detected a hidden failure while building the kernel. If --with-rootprefix is set for kmod, then depmod will look for modules installed at the location $ROOTPREFIX/lib/modules/. The kernel build system does not know anything about $ROOTPREFIX, and so the wrong direc

Re: Upgraded from 3.4 to 3.5.1 kernel: machine does not boot

On Fri, Aug 10, 2012 at 1:53 PM, Jesper Juhl wrote: > On Fri, 10 Aug 2012, Justin Piszcz wrote: > >> Hello, >> >> Motherboard: Supermicro X8DTH-6F >> Distro: Debian Testing x86_64 >> >> >From 3.4 -> 3.5.1 on x86_64 make oldconfig and a few minor changes and the >> machine attempts to boot but hang

Re: [PATCH 0/4] vfs: fix file creation mode bugs

On Tue, Aug 07, 2012 at 02:45:45PM +0200, Miklos Szeredi wrote: > Al, > > Please consider the following patches. > > The first one fixes an old bug (stable CC-d). The others are fixes for the > atomic-open series. > > Thanks, > Miklos > > > Miklos Szeredi (4): > vfs: canonicalize cr

[PATCH 3/3] HWPOISON: improve handling/reporting of memory error on dirty pagecache

Current error reporting of memory errors on dirty pagecache has silent data lost problem because AS_EIO in struct address_space is cleared once checked. A simple solution is to make AS_EIO sticky (as Wu Fengguang proposed in https://lkml.org/lkml/2009/6/11/294), but this patch does more to make dir

[PATCH 0/3 v1] HWPOISON: improve dirty pagecache error handling

Hi, This patchset is to improve handling and reporting of memory errors on dirty pagecache. Patch 1 is to fix a messaging bug, and patch 2 is to temporarily undo the code which can happen the data lost. I think these two are obvious fixes so I want to push them to merge promptly. Patch 3 is for

[PATCH 2/3] HWPOISON: undo memory error handling for dirty pagecache

Current memory error handling on dirty pagecache has a bug that user processes who use corrupted pages via read() or write() can't be aware of the memory error and result in discarding dirty data silently. The following patch is to improve handling/reporting memory errors on this case, but as a sh

[PATCH 1/3] HWPOISON: fix action_result() to print out dirty/clean

action_result() fails to print out "dirty" even if an error occurred on a dirty pagecache, because when we check PageDirty in action_result() it was cleared after page isolation even if it's dirty before error handling. This can break some applications that monitor this message, so should be fixed.

[PATCH RESEND 2/2] msm: io: Change the default static iomappings to be shared

With 3.4 kernel the static iomappings can be shared with the ioremap mappings. If ioremap is called with an address for which a static mapping already exists, then that mapping should be used instead of creating a new one. However, the MT_DEVICE_NONSHARED flag prevents this. Hence, get rid of this

[PATCH RESEND 1/2] msm: io: Remove 7x30 iomap region from 7x00

This is redundant code. Signed-off-by: Rohit Vaswani --- arch/arm/mach-msm/io.c |3 --- 1 files changed, 0 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index a1e7b11..2409c0b 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c @@ -5

Re: xtensa port maintenance

On Monday 06 August 2012, Max Filippov wrote: > I have a couple of questions regarding the path of xtensa-specific patches > upstream: > - which git tree should they be targeted for? Should I set up a tree for > pull requests, or will patches be picked up into some existing tree? >

Re: [PATCH] MPILIB: Provide count_leading/trailing_zeros() based on arch functions

From: Jan Engelhardt Date: Fri, 10 Aug 2012 14:51:49 +0200 (CEST) > > On Saturday 2012-07-21 02:46, David Miller wrote: >>> Arnd Bergmann wrote: >>> I don't generally like to put stuff into asm-generic when it's unlikely to be overridden by architectures. It would really belong into

Re: [PATCH] [PATCH V4]Extcon: adc_jack: adc-jack driver to support 3.5 pi or simliar devices

On 08/08/2012 02:04 AM, anish kumar wrote: > From: anish kumar > > External connector devices that decides connection information based on > ADC values may use adc-jack device driver. The user simply needs to > provide a table of adc range and connection states. Then, extcon > framework will autom

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