From: Saurabh Sengar Sent: Wednesday, July 24,
2024 10:26 PM
>
> Currently on a very large system with 1780 CPUs, hv_acpi_init takes
> around 3 seconds to complete for all the CPUs. This is because of
> sequential synic initialization for each CPU.
>
> Defer these tasks so that each CPU execute
On Fri, Jul 26, 2024 at 04:26:19AM -0700, Saurabh Singh Sengar wrote:
> On Fri, Jul 26, 2024 at 06:34:53AM +, Srivatsa S. Bhat wrote:
> > On Fri, Jul 26, 2024 at 12:01:33AM +, Dexuan Cui wrote:
> > > > From: Saurabh Singh Sengar
> > > > Sent: Thursday, July 25, 2024 8:35 AM
> > > > Subject
On 27/07/2024 11:17, Arnd Bergmann wrote:
> On Sat, Jul 27, 2024, at 10:56, Krzysztof Kozlowski wrote:
>> On 27/07/2024 00:59, Roman Kisel wrote:
>>> @@ -2338,6 +2372,21 @@ static int vmbus_device_add(struct platform_device
>>> *pdev)
>>> cur_res = &res->sibling;
>>> }
>>>
>>> +
On Sat, Jul 27, 2024, at 10:56, Krzysztof Kozlowski wrote:
> On 27/07/2024 00:59, Roman Kisel wrote:
>> @@ -2338,6 +2372,21 @@ static int vmbus_device_add(struct platform_device
>> *pdev)
>> cur_res = &res->sibling;
>> }
>>
>> +/*
>> + * Hyper-V always assumes DMA cache
On 27/07/2024 00:59, Roman Kisel wrote:
> @@ -2338,6 +2372,21 @@ static int vmbus_device_add(struct platform_device
> *pdev)
> cur_res = &res->sibling;
> }
>
> + /*
> + * Hyper-V always assumes DMA cache coherency, and the DMA subsystem
> + * might default to 'n
On 27/07/2024 00:59, Roman Kisel wrote:
> Add dt-bindings for the Hyper-V VMBus DMA cache coherency
> and interrupt specification.
>
You did not add any bindings. I don't understand this description.
Anyway, not tested.
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an
