tps://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/Snapdragon-8-Gen-2-Product-Brief.pdf
Signed-off-by: Tengfei Fan
---
v4 -> v5:
- "2023-2024" instead of "2023~2024" for License
- update patch commit message to previous comments and with an updated
board diagram
AIoT applications. It integrates QCS8550 SoC, UFS and PMIC chip
etc.
AIM stands for Artificial Intelligence Module. AIoT stands for AI IoT.
Signed-off-by: Tengfei Fan
---
Documentation/devicetree/bindings/arm/qcom.yaml | 8
1 file changed, 8 insertions(+)
diff --git a/Documentation/devic
|
0x8000 +--+
Note that:
0xa700..0xA800 is used by bootloader, when kernel boot up,
it is available for kernel usage. This region is not suggested to be
used by kernel features like ramoops, suspend resume etc.
Signed-off-by: Tengfei Fan
---
arch/arm64/boot/dts/qco
Signed-off-by: Tengfei Fan
---
arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi | 345 +++
1 file changed, 345 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
b/arch/arm64/boot/dts/qcom/qcs8550
USB | | UART | |
|++ +--+ |
+--+
Co-developed-by: Qiang Yu
Signed-off-by: Qiang Yu
Co-developed-by: Ziyue Zhang
Signed-off-by: Ziyue Zhang
Signed-off-by: Tengfei Fan
---
arch/arm64/boot/
On 3/4/2024 3:42 PM, Krzysztof Kozlowski wrote:
On 01/03/2024 14:41, Tengfei Fan wrote:
Document QCS8550 SoC and the AIM300 AIoT board bindings.
QCS8550 is derived from SM8550. The difference between SM8550 and
QCS8550 is QCS8550 doesn't have modem RF system. QCS8550 is mainly used
i
tps://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/Snapdragon-8-Gen-2-Product-Brief.pdf
Signed-off-by: Tengfei Fan
---
v5 -> v6:
- move qcs8550 board info bebind sm8550 boards info in qcom.yaml
v4 -> v5:
- "2023-2024" instead of "2023~2024" for License
- u
|
0x8000 +--+
Note that:
0xa700..0xA800 is used by bootloader, when kernel boot up,
it is available for kernel usage. This region is not suggested to be
used by kernel features like ramoops, suspend resume etc.
Signed-off-by: Tengfei Fan
---
arch/arm64/boot/dts/qco
AIoT applications. It integrates QCS8550 SoC, UFS and PMIC chip
etc.
AIM stands for Artificial Intelligence Module. AIoT stands for AI IoT.
Signed-off-by: Tengfei Fan
---
Documentation/devicetree/bindings/arm/qcom.yaml | 8
1 file changed, 8 insertions(+)
diff --git a/Documentation/devic
Signed-off-by: Tengfei Fan
---
arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi | 345 +++
1 file changed, 345 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
b/arch/arm64/boot/dts/qcom/qcs8550
USB | | UART | |
|++ +--+ |
+--+
Co-developed-by: Qiang Yu
Signed-off-by: Qiang Yu
Co-developed-by: Ziyue Zhang
Signed-off-by: Ziyue Zhang
Signed-off-by: Tengfei Fan
---
arch/arm64/boot/
tps://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/Snapdragon-8-Gen-2-Product-Brief.pdf
Signed-off-by: Tengfei Fan
---
v5 -> v6:
- move qcs8550 board info bebind sm8550 boards info in qcom.yaml
v4 -> v5:
- "2023-2024" instead of "2023~2024" for License
- u
AIoT applications. It integrates QCS8550 SoC, UFS and PMIC chip
etc.
AIM stands for Artificial Intelligence Module. AIoT stands for AI IoT.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Tengfei Fan
---
Documentation/devicetree/bindings/arm/qcom.yaml | 8
1 file changed, 8 insertions(+)
|
0x8000 +--+
Note that:
0xa700..0xA800 is used by bootloader, when kernel boot up,
it is available for kernel usage. This region is not suggested to be
used by kernel features like ramoops, suspend resume etc.
Signed-off-by: Tengfei Fan
---
arch/arm64/boot/dts/qco
Signed-off-by: Tengfei Fan
---
arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi | 345 +++
1 file changed, 345 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
b/arch/arm64/boot/dts/qcom/qcs8550
USB | | UART | |
|++ +--+ |
+--+
Co-developed-by: Qiang Yu
Signed-off-by: Qiang Yu
Co-developed-by: Ziyue Zhang
Signed-off-by: Ziyue Zhang
Signed-off-by: Tengfei Fan
---
arch/arm64/boot/
On 4/2/2024 3:22 AM, Dmitry Baryshkov wrote:
On Mon, 1 Apr 2024 at 12:40, Tengfei Fan wrote:
Add AIM300 AIoT Carrier board DTS support, including usb, UART, PCIe,
I2C functions support.
Here is a diagram of AIM300 AIoT Carrie Board and SoM
On 4/1/2024 11:54 PM, Trilok Soni wrote:
On 4/1/2024 2:38 AM, Tengfei Fan wrote:
Here is a diagram of AIM300 AIoT Carrie Board and SoM
+--+
| AIM300 AIOT Carrie Board |
spellcheck
s/Carrie/Carrier ?
Thanks
tps://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/Snapdragon-8-Gen-2-Product-Brief.pdf
Signed-off-by: Tengfei Fan
---
v6 -> v7:
- correct typos in the commit message
- move mdss_dsi0, mdss_dsi0_phy, pcie0_phy, pcie1_phy and usb_dp_qmpphy
vdda supply to qcs8550-aim300.dtsi
- move the
AIoT applications. It integrates QCS8550 SoC, UFS and PMIC chip
etc.
AIM stands for Artificial Intelligence Module. AIoT stands for AI IoT.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Tengfei Fan
---
Documentation/devicetree/bindings/arm/qcom.yaml | 8
1 file changed, 8 insertions(+)
|
0x8000 +--+
Note that:
0xa700..0xA800 is used by bootloader, when kernel boot up,
it is available for kernel usage. This region is not suggested to be
used by kernel features like ramoops, suspend resume etc.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Tengfei Fan
---
arch/arm64/b
Signed-off-by: Tengfei Fan
---
arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi | 403 +++
1 file changed, 403 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
b/arch/arm64/boot/dts/qcom/qcs8550
USB | | UART | |
|++ +--+ |
+--+
Co-developed-by: Qiang Yu
Signed-off-by: Qiang Yu
Co-developed-by: Ziyue Zhang
Signed-off-by: Ziyue Zhang
Signed-off-by: Tengfei Fan
---
arch/arm64/boot/
On 4/25/2024 7:47 AM, Dmitry Baryshkov wrote:
On Wed, 24 Apr 2024 at 05:46, Tengfei Fan wrote:
AIM300 Series is a highly optimized family of modules designed to
support AIoT applications. It integrates QCS8550 SoC, UFS and PMIC
chip etc.
Here is a diagram of AIM300 SoM
On 4/25/2024 7:50 AM, Dmitry Baryshkov wrote:
On Wed, 24 Apr 2024 at 05:46, Tengfei Fan wrote:
Add AIM300 AIoT Carrier board DTS support, including usb, UART, PCIe,
I2C functions support.
Here is a diagram of AIM300 AIoT Carrie Board and SoM
tps://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/Snapdragon-8-Gen-2-Product-Brief.pdf
Signed-off-by: Tengfei Fan
---
This patch series depends on patch series:
"[PATCH v5 0/3] arm64: qcom-sm8[456]50: properly describe the PCIe Gen4x2 PHY
AUX clock"
https://lore.kernel.org/linux-arm
AIoT applications. It integrates QCS8550 SoC, UFS and PMIC chip
etc.
AIM stands for Artificial Intelligence Module. AIoT stands for AI IoT.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Tengfei Fan
---
Documentation/devicetree/bindings/arm/qcom.yaml | 8
1 file changed, 8 insertions(+)
|
0x8000 +--+
Note that:
0xa700..0xA800 is used by bootloader, when kernel boot up,
it is available for kernel usage. This region is not suggested to be
used by kernel features like ramoops, suspend resume etc.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Tengfei Fan
---
arch/arm64/b
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Tengfei Fan
---
arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi | 405 +++
1 file changed, 405 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
USB | | UART | |
|++ +--+ |
+--+
Co-developed-by: Qiang Yu
Signed-off-by: Qiang Yu
Co-developed-by: Ziyue Zhang
Signed-off-by: Ziyue Zhang
Signed-off-by: Tengfei Fan
---
arch/arm64/boot/
On 5/14/2024 9:21 AM, Aiqun Yu (Maria) wrote:
On 5/14/2024 12:37 AM, Trilok Soni wrote:
On 5/13/2024 2:07 AM, Tengfei Fan wrote:
QCS8550 is derived from SM8550. The differnece between SM8550 and
spellcheck s/difference/difference
Typos wil be modified.
QCS8550 is QCS8550 doesn&#
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