On 6/3/24 16:56, Frank Li wrote:
On Mon, Jun 03, 2024 at 10:09:36AM +0200, Amelie Delaunay wrote:
On 5/31/24 22:21, Frank Li wrote:
On Fri, May 31, 2024 at 05:07:05PM +0200, Amelie Delaunay wrote:
STM32 DMA3 driver supports the 3 hardware configurations of the STM32 DMA3
controller:
- LPDMA
On 5/31/24 22:21, Frank Li wrote:
On Fri, May 31, 2024 at 05:07:05PM +0200, Amelie Delaunay wrote:
STM32 DMA3 driver supports the 3 hardware configurations of the STM32 DMA3
controller:
- LPDMA (Low Power): 4 channels, no FIFO
- GPDMA (General Purpose): 16 channels, FIFO from 8 to 32 bytes
stm32-dma is not considered for reuse because register layout is completely
different and doesn't rely on descriptors mechanism.
stm32-mdma is based on descriptors mechanism but there are significant
differences in register layout and descriptors structure.
Signed-off-by: Amelie Delaunay
---
v
programmed destination data width.
The channel is briefly suspended to get a coherent snapshot of registers.
It is possible to correct the fifo level when packing/unpacking is enabled
with destination increment.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 165
.
Signed-off-by: Amelie Delaunay
---
drivers/dma/dmaengine.c | 16 ++--
drivers/dma/idxd/dma.c| 2 +-
include/linux/dmaengine.h | 3 ++-
3 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index 491b22240221
.
Signed-off-by: Amelie Delaunay
---
v4: use SCMI clocks now that they are available
v2: use SoC specific compatible st,stm32mp25-dma3
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 69 ++
1 file changed, 69 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi
b
that
it can match the name in the Reference Manual and ease requesting a channel
thanks to its name.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/stm32/stm32-dma3.c b/drivers
Add DMA_CYCLIC capability and relative device_prep_dma_cyclic ops with
stm32_dma3_prep_dma_cyclic(). It reuses stm32_dma3_chan_prep_hw() and
stm32_dma3_chan_prep_hwdesc() helpers.
Signed-off-by: Amelie Delaunay
---
v4:
- remove MEM_TO_MEM comment: only DEV_TO_MEM and MEM_TO_DEV are supported
(stm32_dma3_init_chan_config_for_memcpy) in case the channel is used
without being pre-configured (with DT and/or dmaengine_slave_config()).
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 131 -
1 file changed, 130 insertions(+), 1 deletion
STM32 DMA3 controller is able to suspend an ongoing transfer (the transfer
is suspended after the ongoing burst is flushed to the destination) and
resume it from the point it was suspended. No need to reconfigure any
register.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c
Gather the STM32 DMA controllers bindings under ./dma/stm32/.
Then fix reference to old path in spi/st,stm32-spi.yaml: update the dmas
property description by referring to all STM32 DMA controllers bindings.
Acked-by: Rob Herring (Arm)
Signed-off-by: Amelie Delaunay
---
v3:
- add Rob's Ack
n updated description of the
dmas property to reflect the new path of STM32 DMA controllers bindings.
- address Rob's remarks about st,stm32-dma3.yaml
- address Vinod's remarks about stm32-dma3.c
Amelie Delaunay (12):
dt-bindings: dma: New directory for STM32 DMA controllers binding
Gather the STM32 DMA controllers under drivers/dma/stm32/
Signed-off-by: Amelie Delaunay
---
drivers/dma/Kconfig| 34 ++-
drivers/dma/Makefile | 4 +--
drivers/dma/stm32/Kconfig | 37 ++
drivers/dma
client requirements, and to pre-configure the channel depending on
the client needs.
Reviewed-by: Rob Herring (Arm)
Signed-off-by: Amelie Delaunay
---
v3:
- add Rob's Reviewed-by after fixing lines length at 80 and useless '|'
v2:
- DMA controller specific information description has
Add an entry to make myself a maintainer of STM32 DMA controllers drivers
and documentation.
Signed-off-by: Amelie Delaunay
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d6c90161c7bf..e23cc6f644fa 100644
--- a/MAINTAINERS
+++ b
On 5/20/24 20:41, Frank Li wrote:
On Mon, May 20, 2024 at 05:49:42PM +0200, Amelie Delaunay wrote:
Add DMA_CYCLIC capability and relative device_prep_dma_cyclic ops with
stm32_dma3_prep_dma_cyclic(). It reuses stm32_dma3_chan_prep_hw() and
stm32_dma3_chan_prep_hwdesc() helpers.
Signed-off-by
On 5/20/24 20:38, Frank Li wrote:
On Mon, May 20, 2024 at 05:49:41PM +0200, Amelie Delaunay wrote:
STM32 DMA3 driver supports the 3 hardware configurations of the STM32 DMA3
controller:
- LPDMA (Low Power): 4 channels, no FIFO
- GPDMA (General Purpose): 16 channels, FIFO from 8 to 32 bytes
.
Signed-off-by: Amelie Delaunay
---
drivers/dma/dmaengine.c | 16 ++--
drivers/dma/idxd/dma.c| 2 +-
include/linux/dmaengine.h | 3 ++-
3 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index 491b22240221
that
it can match the name in the Reference Manual and ease requesting a channel
thanks to its name.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/stm32/stm32-dma3.c b/drivers
.
Signed-off-by: Amelie Delaunay
---
v2: use SoC specific compatible st,stm32mp25-dma3
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 69 ++
1 file changed, 69 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi
b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index
stm32-dma is not considered for reuse because register layout is completely
different and doesn't rely on descriptors mechanism.
stm32-mdma is based on descriptors mechanism but there are significant
differences in register layout and descriptors structure.
Signed-off-by: Amelie Delaunay
---
programmed destination data width.
The channel is briefly suspended to get a coherent snapshot of registers.
It is possible to correct the fifo level when packing/unpacking is enabled
with destination increment.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 165
(stm32_dma3_init_chan_config_for_memcpy) in case the channel is used
without being pre-configured (with DT and/or dmaengine_slave_config()).
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 131 -
1 file changed, 130 insertions(+), 1 deletion
Add DMA_CYCLIC capability and relative device_prep_dma_cyclic ops with
stm32_dma3_prep_dma_cyclic(). It reuses stm32_dma3_chan_prep_hw() and
stm32_dma3_chan_prep_hwdesc() helpers.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 77 ++
1 file
STM32 DMA3 controller is able to suspend an ongoing transfer (the transfer
is suspended after the ongoing burst is flushed to the destination) and
resume it from the point it was suspended. No need to reconfigure any
register.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c
Gather the STM32 DMA controllers bindings under ./dma/stm32/.
Then fix reference to old path in spi/st,stm32-spi.yaml: update the dmas
property description by referring to all STM32 DMA controllers bindings.
Acked-by: Rob Herring (Arm)
Signed-off-by: Amelie Delaunay
---
v3:
- add Rob's Ack
client requirements, and to pre-configure the channel depending on
the client needs.
Reviewed-by: Rob Herring (Arm)
Signed-off-by: Amelie Delaunay
---
v3:
- add Rob's Reviewed-by after fixing lines length at 80 and useless '|'
v2:
- DMA controller specific information description has
Gather the STM32 DMA controllers under drivers/dma/stm32/
Signed-off-by: Amelie Delaunay
---
drivers/dma/Kconfig| 34 ++-
drivers/dma/Makefile | 4 +--
drivers/dma/stm32/Kconfig | 37 ++
drivers/dma
escriptors availability before starting the channel
v2:
- fix reference in spi/st,stm32-spi.yaml with an updated description of the
dmas property to reflect the new path of STM32 DMA controllers bindings.
- address Rob's remarks about st,stm32-dma3.yaml
- address Vinod's remarks about stm32-dma
Add an entry to make myself a maintainer of STM32 DMA controllers drivers
and documentation.
Signed-off-by: Amelie Delaunay
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index cfc11cc17564..0462e61ea488 100644
--- a/MAINTAINERS
+++ b
Drop this incomplete series, issue with mail server.
On 5/20/24 17:42, Amelie Delaunay wrote:
STM32 DMA3 is a direct memory access controller with different features
depending on its hardware configuration. It is either called LPDMA (Low
Power), GPDMA (General Purpose) or HPDMA (High
Gather the STM32 DMA controllers bindings under ./dma/stm32/.
Then fix reference to old path in spi/st,stm32-spi.yaml: update the dmas
property description by referring to all STM32 DMA controllers bindings.
Acked-by: Rob Herring (Arm)
Signed-off-by: Amelie Delaunay
---
v3:
- add Rob's Ack
On 5/17/24 16:57, Frank Li wrote:
On Fri, May 17, 2024 at 11:42:17AM +0200, Amelie Delaunay wrote:
On 5/16/24 19:09, Frank Li wrote:
On Thu, May 16, 2024 at 05:25:58PM +0200, Amelie Delaunay wrote:
On 5/15/24 20:56, Frank Li wrote:
On Tue, Apr 23, 2024 at 02:32:55PM +0200, Amelie Delaunay
Gather the STM32 DMA controllers under drivers/dma/stm32/
Signed-off-by: Amelie Delaunay
---
drivers/dma/Kconfig| 34 ++-
drivers/dma/Makefile | 4 +--
drivers/dma/stm32/Kconfig | 37 ++
drivers/dma
Add an entry to make myself a maintainer of STM32 DMA controllers drivers
and documentation.
Signed-off-by: Amelie Delaunay
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index cfc11cc17564..0462e61ea488 100644
--- a/MAINTAINERS
+++ b
escriptors availability before starting the channel
v2:
- fix reference in spi/st,stm32-spi.yaml with an updated description of the
dmas property to reflect the new path of STM32 DMA controllers bindings.
- address Rob's remarks about st,stm32-dma3.yaml
- address Vinod's remarks about stm32-dma
On 5/16/24 19:09, Frank Li wrote:
On Thu, May 16, 2024 at 05:25:58PM +0200, Amelie Delaunay wrote:
On 5/15/24 20:56, Frank Li wrote:
On Tue, Apr 23, 2024 at 02:32:55PM +0200, Amelie Delaunay wrote:
STM32 DMA3 driver supports the 3 hardware configurations of the STM32 DMA3
controller
On 5/15/24 20:56, Frank Li wrote:
On Tue, Apr 23, 2024 at 02:32:55PM +0200, Amelie Delaunay wrote:
STM32 DMA3 driver supports the 3 hardware configurations of the STM32 DMA3
controller:
- LPDMA (Low Power): 4 channels, no FIFO
- GPDMA (General Purpose): 16 channels, FIFO from 8 to 32 bytes
On 5/15/24 20:45, Frank Li wrote:
On Mon, May 13, 2024 at 11:21:18AM +0200, Amelie Delaunay wrote:
Hi Frank,
On 5/7/24 22:26, Frank Li wrote:
On Tue, May 07, 2024 at 01:33:31PM +0200, Amelie Delaunay wrote:
Hi Vinod,
Thanks for the review.
On 5/4/24 14:40, Vinod Koul wrote:
On 23-04-24
Hi Frank,
On 5/7/24 22:26, Frank Li wrote:
On Tue, May 07, 2024 at 01:33:31PM +0200, Amelie Delaunay wrote:
Hi Vinod,
Thanks for the review.
On 5/4/24 14:40, Vinod Koul wrote:
On 23-04-24, 14:32, Amelie Delaunay wrote:
STM32 DMA3 driver supports the 3 hardware configurations of the STM32
.
Signed-off-by: Amelie Delaunay
---
v2: use SoC specific compatible st,stm32mp25-dma3
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 69 ++
1 file changed, 69 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi
b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index
that
it can match the name in the Reference Manual and ease requesting a channel
thanks to its name.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/stm32/stm32-dma3.c b/drivers
.
Signed-off-by: Amelie Delaunay
---
drivers/dma/dmaengine.c | 16 ++--
drivers/dma/idxd/dma.c| 2 +-
include/linux/dmaengine.h | 3 ++-
3 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index 491b22240221
semaphore. In case CID
filtering is not configured, dma-channel-mask property can be used to
specify available DMA channels to the kernel, otherwise such channels
will be marked as reserved and can't be used by Linux.
Signed-off-by: Amelie Delaunay
---
v2:
- lowercase in hex values
- compatible has
programmed destination data width.
The channel is briefly suspended to get a coherent snapshot of registers.
It is possible to correct the fifo level when packing/unpacking is enabled
with destination increment.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 165
Add DMA_CYCLIC capability and relative device_prep_dma_cyclic ops with
stm32_dma3_prep_dma_cyclic(). It reuses stm32_dma3_chan_prep_hw() and
stm32_dma3_chan_prep_hwdesc() helpers.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 77 ++
1 file
(stm32_dma3_init_chan_config_for_memcpy) in case the channel is used
without being pre-configured (with DT and/or dmaengine_slave_config()).
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 131 -
1 file changed, 130 insertions(+), 1 deletion
STM32 DMA3 controller is able to suspend an ongoing transfer (the transfer
is suspended after the ongoing burst is flushed to the destination) and
resume it from the point it was suspended. No need to reconfigure any
register.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c
Gather the STM32 DMA controllers under drivers/dma/stm32/
Signed-off-by: Amelie Delaunay
---
drivers/dma/Kconfig| 34 ++-
drivers/dma/Makefile | 4 +--
drivers/dma/stm32/Kconfig | 37 ++
drivers/dma
client requirements, and to pre-configure the channel depending on
the client needs.
Signed-off-by: Amelie Delaunay
---
v2:
- DMA controller specific information description has been moved and
added as description of #dma-cells property
- description has been added to interrupts property
Gather the STM32 DMA controllers bindings under ./dma/stm32/.
Then fix reference to old path in spi/st,stm32-spi.yaml: update the dmas
property description by referring to all STM32 DMA controllers bindings.
Signed-off-by: Amelie Delaunay
---
v2:
- fix reference in spi/st,stm32-spi.yaml with an
stm32-dma3.yaml
- address Vinod's remarks about stm32-dma3.c
Amelie Delaunay (12):
dt-bindings: dma: New directory for STM32 DMA controllers bindings
dmaengine: stm32: New directory for STM32 DMA controllers drivers
MAINTAINERS: Add entry for STM32 DMA controllers drivers and
documen
Add an entry to make myself a maintainer of STM32 DMA controllers drivers
and documentation.
Signed-off-by: Amelie Delaunay
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index cfc11cc17564..0462e61ea488 100644
--- a/MAINTAINERS
+++ b
Hi Christophe,
Thanks for the review.
On 5/4/24 16:27, Christophe JAILLET wrote:
Le 23/04/2024 à 14:32, Amelie Delaunay a écrit :
STM32 DMA3 driver supports the 3 hardware configurations of the STM32
DMA3
controller:
- LPDMA (Low Power): 4 channels, no FIFO
- GPDMA (General Purpose): 16
Hi Vinod,
Thanks for the review.
On 5/4/24 14:40, Vinod Koul wrote:
On 23-04-24, 14:32, Amelie Delaunay wrote:
STM32 DMA3 driver supports the 3 hardware configurations of the STM32 DMA3
controller:
- LPDMA (Low Power): 4 channels, no FIFO
- GPDMA (General Purpose): 16 channels, FIFO from 8 to
Hi Rob,
On 4/23/24 15:50, Rob Herring wrote:
On Tue, 23 Apr 2024 14:32:51 +0200, Amelie Delaunay wrote:
Gather the STM32 DMA controllers bindings under ./dma/stm32/
Signed-off-by: Amelie Delaunay
---
.../devicetree/bindings/dma/{ => stm32}/st,stm32-dma.yaml | 4 ++--
.../devicet
.
Signed-off-by: Amelie Delaunay
---
drivers/dma/dmaengine.c | 16 ++--
drivers/dma/idxd/dma.c| 2 +-
include/linux/dmaengine.h | 3 ++-
3 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index 491b22240221
.
Signed-off-by: Amelie Delaunay
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 69 ++
1 file changed, 69 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi
b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 5dd4f3580a60..0b80d23fbb54 100644
--- a/arch/arm64/boot/dts
that
it can match the name in the Reference Manual and ease requesting a channel
thanks to its name.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/stm32/stm32-dma3.c b/drivers
semaphore. In case CID
filtering is not configured, dma-channel-mask property can be used to
specify available DMA channels to the kernel, otherwise such channels
will be marked as reserved and can't be used by Linux.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/Kconfig | 10 +
dr
programmed destination data width.
The channel is briefly suspended to get a coherent snapshot of registers.
It is possible to correct the fifo level when packing/unpacking is enabled
with destination increment.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 165
(stm32_dma3_init_chan_config_for_memcpy) in case the channel is used
without being pre-configured (with DT and/or dmaengine_slave_config()).
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 131 -
1 file changed, 130 insertions(+), 1 deletion
Add DMA_CYCLIC capability and relative device_prep_dma_cyclic ops with
stm32_dma3_prep_dma_cyclic(). It reuses stm32_dma3_chan_prep_hw() and
stm32_dma3_chan_prep_hwdesc() helpers.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 77 ++
1 file
STM32 DMA3 controller is able to suspend an ongoing transfer (the transfer
is suspended after the ongoing burst is flushed to the destination) and
resume it from the point it was suspended. No need to reconfigure any
register.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c
client requirements, and to pre-configure the channel depending on
the client needs.
Signed-off-by: Amelie Delaunay
---
.../bindings/dma/stm32/st,stm32-dma3.yaml | 125 ++
1 file changed, 125 insertions(+)
create mode 100644
Documentation/devicetree/bindings/dma/stm32/st,stm32
Add an entry to make myself a maintainer of STM32 DMA controllers drivers
and documentation.
Signed-off-by: Amelie Delaunay
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9038abd8411e..c117184b7d26 100644
--- a/MAINTAINERS
+++ b
Gather the STM32 DMA controllers bindings under ./dma/stm32/
Signed-off-by: Amelie Delaunay
---
.../devicetree/bindings/dma/{ => stm32}/st,stm32-dma.yaml | 4 ++--
.../devicetree/bindings/dma/{ => stm32}/st,stm32-dmamux.yaml | 4 ++--
.../devicetree/bindings/dma/{ => stm32}
Gather the STM32 DMA controllers drivers under drivers/dma/stm32/
Signed-off-by: Amelie Delaunay
---
drivers/dma/Kconfig| 34 ++-
drivers/dma/Makefile | 4 +--
drivers/dma/stm32/Kconfig | 37
64bit-mpus-stmicroelectronics.pdf
[2]
https://lore.kernel.org/lkml/20231213174021.3074759-1-amelie.delau...@foss.st.com/
Amelie Delaunay (12):
dt-bindings: dma: New directory for STM32 DMA controllers bindings
dmaengine: stm32: New directory for STM32 DMA controllers drivers
MAINTAINERS: Add entry for
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