On Sat, Apr 13, 2024 at 09:31:47PM +0200, Konrad Dybcio wrote:
> On 3.04.2024 10:45 AM, Odelu Kukatla wrote:
> >
> >
> > On 3/27/2024 2:26 AM, Konrad Dybcio wrote:
> >> On 25.03.2024 7:16 PM, Odelu Kukatla wrote:
> >>> It adds QoS support for QNOC device and includes support for
> >>> configuring
On Wed, May 08, 2024 at 12:02:27AM +, Justin Stitt wrote:
> Running syzkaller with the newly reintroduced signed integer overflow
> sanitizer produces this report:
>
> [ 65.194362] [ cut here ]
> [ 65.197752] UBSAN: signed-integer-overflow in
> ../drivers/scsi/sr_i
On Tue, May 07, 2024 at 11:17:57PM +, Justin Stitt wrote:
> Running syzkaller with the newly enabled signed integer overflow
> sanitizer produces this report:
>
> [ 195.401651] [ cut here ]
> [ 195.404808] UBSAN: signed-integer-overflow in ../fs/open.c:321:15
> [ 195
On Tue, May 07, 2024 at 04:54:04AM +, Justin Stitt wrote:
> When running syzkaller with the newly reintroduced signed integer wrap
> sanitizer we encounter this splat:
>
> [ 366.015950] UBSAN: signed-integer-overflow in
> ../drivers/cdrom/cdrom.c:2361:33
> [ 366.021089] -9223372036854775808
On Tue, May 07, 2024 at 11:17:57PM +, Justin Stitt wrote:
> I wonder, though, why isn't loff_t an unsigned type?
Consider
lseek(fd, -10, SEEK_CUR)
PS: the above is *not* an endorsement of the proposed patch or
KASAN overflow nonsense in general.
speed *= 177; /* Nx to kbyte/s */
---
base-commit: 0106679839f7c69632b3b9833c3268c316c0a9fc
change-id: 20240507-b4-b4-sio-sr_select_speed-e68c0d426891
Best regards,
--
Justin Stitt
Hi,
Over the last decade or so, our work hardening against weaknesses
in various kernel APIs and eliminating the ambiguities in C language
semantics have traditionally been somewhat off in one corner or another
of the Linux codebase. This topic is going to be much different as
it is ultimately abo
b->s_maxbytes) || ((offset + len) < 0))
+ /* Check for wraparound */
+ if (check_add_overflow(offset, len, &sum))
+ return -EFBIG;
+
+ /* Now, check bounds */
+ if (sum > inode->i_sb->s_maxbytes || sum < 0)
return -EFBIG;
On Fri, 03 May 2024 21:31:25 +0100 Simon Horman wrote:
> This short patchset provides two minor cleanups for the gve driver.
>
> These were found by tooling as mentioned in each patch,
> and otherwise by inspection.
>
> No change in run time behaviour is intended.
> Each patch is compile tested o
On Tue, May 07, 2024 at 04:54:04AM +, Justin Stitt wrote:
> When running syzkaller with the newly reintroduced signed integer wrap
> sanitizer we encounter this splat:
>
> [ 366.015950] UBSAN: signed-integer-overflow in
> ../drivers/cdrom/cdrom.c:2361:33
> [ 366.021089] -9223372036854775808
On Tue, May 07, 2024 at 01:33:31PM +0200, Amelie Delaunay wrote:
> Hi Vinod,
>
> Thanks for the review.
>
> On 5/4/24 14:40, Vinod Koul wrote:
> > On 23-04-24, 14:32, Amelie Delaunay wrote:
> > > STM32 DMA3 driver supports the 3 hardware configurations of the STM32 DMA3
> > > controller:
> > > -
On Fri, May 3, 2024 at 1:31 PM Simon Horman wrote:
>
> Hi,
>
> This short patchset provides two minor cleanups for the gve driver.
>
> These were found by tooling as mentioned in each patch,
> and otherwise by inspection.
>
> No change in run time behaviour is intended.
> Each patch is compile tes
On Tue, May 7, 2024 at 2:40 PM Alexander Lobakin
wrote:
>
> In fact, this structure contains a flexible array at the end, but
> historically its size, alignment etc., is calculated manually.
> There are several instances of the structure embedded into other
> structures, but also there's ongoing e
On Tue, 7 May 2024 14:39:37 +0200 Alexander Lobakin wrote:
> There are several instances of the structure embedded into other
> structures, but also there's ongoing effort to remove them and we
> could in the meantime declare &net_device properly.
Is there a reason you're reposting this before th
This commit can be considered an addition to commit ca7e324e8ad3
("compiler_types: add Endianness-dependent __counted_by_{le,be}") [1].
In the commit referenced above the __counted_by_{le,be}() attributes
were defined based on platform's endianness with the goal to that the
structures contain flex
On Fri, May 03, 2024 at 09:31:25PM +0100, Simon Horman wrote:
> Hi,
>
> This short patchset provides two minor cleanups for the gve driver.
>
> These were found by tooling as mentioned in each patch,
> and otherwise by inspection.
>
> No change in run time behaviour is intended.
> Each patch is
On Tue, May 07, 2024, Mickaël Salaün wrote:
> > Actually, potential bad/crazy idea. Why does the _host_ need to define
> > policy?
> > Linux already knows what assets it wants to (un)protect and when. What's
> > missing
> > is a way for the guest kernel to effectively deprivilege and re-authent
On 5/7/24 14:39, Alexander Lobakin wrote:
In fact, this structure contains a flexible array at the end, but
historically its size, alignment etc., is calculated manually.
There are several instances of the structure embedded into other
structures, but also there's ongoing effort to remove them an
On Tue, May 07, 2024 at 12:46:46PM +0200, Johannes Berg wrote:
> On Thu, 2024-04-25 at 11:13 -0700, Nathan Chancellor wrote:
> > On Wed, Apr 24, 2024 at 03:01:01PM -0700, Kees Cook wrote:
> > > Before request->channels[] can be used, request->n_channels must be set.
> > > Additionally, address calc
From: Erick Archer
Date: Mon, 6 May 2024 19:42:08 +0200
> Provide UAPI macros for UAPI structs that will gain annotations for
> __counted_by_{le, be} attributes.
Pls add me to Cc next time.
Why is this change needed? __counted_by_{le, be}() aren't used anywhere
in the uAPI headers.
>
> Signe
The High Performance Direct Memory Access (HPDMA) controller is used to
perform programmable data transfers between memory-mapped peripherals
and memories (or between memories) via linked-lists.
There are 3 instances of HPDMA on stm32mp251, using stm32-dma3 driver, with
16 channels per instance an
On STM32 DMA3, channels can be reserved, so they are non available for
Linux. This non-availability creates a mismatch between dma_chan id and
DMA3 channel id.
Use dma_async_device_channel_register() to register the channels
after controller registration and change the default channel name, so tha
Channel device name is used for sysfs, but also by dmatest filter function.
With dynamic channel registration, channels can be registered after dma
controller registration. Users may want to have specific channel names.
If name is NULL, the channel name relies on previous implementation,
dmachan.
STM32 DMA3 driver supports the 3 hardware configurations of the STM32 DMA3
controller:
- LPDMA (Low Power): 4 channels, no FIFO
- GPDMA (General Purpose): 16 channels, FIFO from 8 to 32 bytes
- HPDMA (High Performance): 16 channels, FIFO from 8 to 256 bytes
Hardware configuration of the channels is
Implement own device_tx_status ops to compute the residue with a finer
granularity, up to bytes.
STM32 DMA3 has a bitfield, BNDT, in CxTR1 register which reflects the
number of bytes read from the source.
It also has a bitfield, FIFOL, in CxSR register which reflects the FIFO
level in units of prog
Add DMA_CYCLIC capability and relative device_prep_dma_cyclic ops with
stm32_dma3_prep_dma_cyclic(). It reuses stm32_dma3_chan_prep_hw() and
stm32_dma3_chan_prep_hwdesc() helpers.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 77 ++
1 file ch
Add DMA_MEMCPY capability and relative device_prep_dma_memcpy ops with
stm32_dma3_prep_dma_memcpy(). It reuses stm32_dma3_chan_prep_hw() and
stm32_dma3_prep_hwdesc() helpers.
As this driver relies on both device_config and of_xlate ops to
pre-configure the channel for transfer, add a new helper
(st
STM32 DMA3 controller is able to suspend an ongoing transfer (the transfer
is suspended after the ongoing burst is flushed to the destination) and
resume it from the point it was suspended. No need to reconfigure any
register.
Signed-off-by: Amelie Delaunay
---
drivers/dma/stm32/stm32-dma3.c | 3
Gather the STM32 DMA controllers under drivers/dma/stm32/
Signed-off-by: Amelie Delaunay
---
drivers/dma/Kconfig| 34 ++-
drivers/dma/Makefile | 4 +--
drivers/dma/stm32/Kconfig | 37 ++
drivers/dma/s
The STM32 DMA3 is a Direct Memory Access controller with different features
depending on its hardware configuration.
The channels have not the same capabilities, some have a larger FIFO, so
their performance is higher.
This patch describes STM32 DMA3 bindings, used to select a channel that
fits cli
Gather the STM32 DMA controllers bindings under ./dma/stm32/.
Then fix reference to old path in spi/st,stm32-spi.yaml: update the dmas
property description by referring to all STM32 DMA controllers bindings.
Signed-off-by: Amelie Delaunay
---
v2:
- fix reference in spi/st,stm32-spi.yaml with an u
STM32 DMA3 is a direct memory access controller with different features
depending on its hardware configuration. It is either called LPDMA (Low
Power), GPDMA (General Purpose) or HPDMA (High Performance), and it can
be found in new STM32 MCUs and MPUs.
In STM32MP25 SoC [1], 3 HPDMAs and 1 LPDMA ar
Add an entry to make myself a maintainer of STM32 DMA controllers drivers
and documentation.
Signed-off-by: Amelie Delaunay
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index cfc11cc17564..0462e61ea488 100644
--- a/MAINTAINERS
+++ b/MAINT
In fact, this structure contains a flexible array at the end, but
historically its size, alignment etc., is calculated manually.
There are several instances of the structure embedded into other
structures, but also there's ongoing effort to remove them and we
could in the meantime declare &net_devi
Hi Christophe,
Thanks for the review.
On 5/4/24 16:27, Christophe JAILLET wrote:
Le 23/04/2024 à 14:32, Amelie Delaunay a écrit :
STM32 DMA3 driver supports the 3 hardware configurations of the STM32
DMA3
controller:
- LPDMA (Low Power): 4 channels, no FIFO
- GPDMA (General Purpose): 16 chann
Hi Vinod,
Thanks for the review.
On 5/4/24 14:40, Vinod Koul wrote:
On 23-04-24, 14:32, Amelie Delaunay wrote:
STM32 DMA3 driver supports the 3 hardware configurations of the STM32 DMA3
controller:
- LPDMA (Low Power): 4 channels, no FIFO
- GPDMA (General Purpose): 16 channels, FIFO from 8 to
On Thu, 2024-04-25 at 11:13 -0700, Nathan Chancellor wrote:
> On Wed, Apr 24, 2024 at 03:01:01PM -0700, Kees Cook wrote:
> > Before request->channels[] can be used, request->n_channels must be set.
> > Additionally, address calculations for memory after the "channels" array
> > need to be calculate
On Mon 2024-04-29 23:06:54, Justin Stitt wrote:
> Cleanup some deprecated uses of strncpy() and strcpy() [1].
>
> There doesn't seem to be any bugs with the current code but the
> readability of this code could benefit from a quick makeover while
> removing some deprecated stuff as a benefit.
>
>
On Mon, May 06, 2024 at 06:34:53PM GMT, Sean Christopherson wrote:
> On Mon, May 06, 2024, Mickaël Salaün wrote:
> > On Fri, May 03, 2024 at 07:03:21AM GMT, Sean Christopherson wrote:
> > > > ---
> > > >
> > > > Changes since v1:
> > > > * New patch. Making user space aware of Heki properties was
On Sat, 04 May 2024, André Apitzsch wrote:
> Am Freitag, dem 03.05.2024 um 08:19 +0100 schrieb Lee Jones:
> > On Thu, 11 Apr 2024, Lee Jones wrote:
> >
> > > On Mon, 01 Apr 2024, André Apitzsch via B4 Relay wrote:
> > >
> > > > From: André Apitzsch
> > > >
> > > > Add support for SY7802 flash
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