On Tue, May 21, 2019 at 4:52 PM Paul Cercueil wrote:
>
> Add DTS nodes for the JZ4780, JZ4770 and JZ4740 devicetree files.
>
> Signed-off-by: Paul Cercueil
> ---
>
> Notes:
> v5: New patch
>
> v6: Fix register lengths in watchdog/pwm nodes
>
> v7: No change
>
> v8: - Fix wrong sta
tions; a clocks driver; a irqchip driver; a clocksource
> driver. All these drivers work with the same regmap, have the same
> compatible strings, and will probe _with the same devicetree node_.
For the series:
Tested-by: Mathieu Malaterre
System: MIPS Creator CI20
For reference, here is
eg = <0x10002000 0x140>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <27 26 25>;
+ };
So:
Tested-by: Mathieu Malaterre
> Signed-off-by: Paul Cercueil
> Reviewed-by: Rob Herring
> ---
> include/dt-bindings/clock/ingenic,tcu.h | 23 +++
On Wed, Mar 28, 2018 at 5:04 PM, Paul Cercueil wrote:
> Le 2018-03-20 08:15, Mathieu Malaterre a écrit :
>>
>> Hi Paul,
>>
>> Two things:
>>
>> On Sun, Mar 18, 2018 at 12:28 AM, Paul Cercueil
>> wrote:
>>>
>>> This header provides cl
On Wed, Dec 12, 2018 at 11:09 PM Paul Cercueil wrote:
>
> From: Maarten ter Huurne
>
> OST is the OS Timer, a 64-bit timer/counter with buffered reading.
>
> SoCs before the JZ4770 had (if any) a 32-bit OST; the JZ4770 and
> JZ4780 have a 64-bit OST.
>
> This driver will register both a clocksour
Paul,
On Wed, Dec 12, 2018 at 11:09 PM Paul Cercueil wrote:
>
> Hi,
>
> Here's the version 8 and hopefully final version of my patchset, which
> adds support for the Timer/Counter Unit found in JZ47xx SoCs from
> Ingenic.
I can no longer boot my MIPS Creator CI20 with this series (merged
opendin
