the bridge during probe. If the property
does not exist, the driver will leave the bridge in its
current state.
Signed-off-by: Alan Tull
Signed-off-by: Matthew Gerlach
Signed-off-by: Dinh Nguyen
---
v2: Use resets instead of directly writing reset registers
v12: Bump version to align with simpl
sable
* fpga_bridges_put
Signed-off-by: Alan Tull
---
v2: Minor cleanup
v12: Bump version to line up with simple fpga bus
Remove sysfs
Improve get/put functions, get the low level driver too.
Clean up class implementation
Add kernel doc documentation
Rename (un)register_fpga_b
A
Manager API functions are changed, replacing the 'u32 flag'
parameter with a pointer to struct fpga_image_info.
Subsequent patches fix the existing low level FPGA manager
drivers.
Signed-off-by: Alan Tull
---
v19: Added in v19 of this patchset
v20: Squashed patches that change API for
Add bindings document for the Altera Freeze Bridge. A Freeze
Bridge is used to gate traffic to/from a region of a FPGA
such that that region can be reprogrammed. The Freeze Bridge
exist in FPGA fabric that is not currently being reconfigured.
Signed-off-by: Alan Tull
Signed-off-by: Matthew
FPGA Regions support programming FPGA under control of the Device
Tree.
Signed-off-by: Alan Tull
---
v9: initial version (this patch added during rest of patchset's v9)
v10: request deferral if fpga mgr or bridges not available yet
cleanup as fpga manager core goes into the real k
New bindings document for FPGA Region to support programming
FPGA's under Device Tree control
Signed-off-by: Alan Tull
Signed-off-by: Moritz Fischer
Reviewed-by: Rob Herring
---
v9: initial version added to this patchset
v10: s/fpga/FPGA/g
replace DT overlay example with slightly
/pantoniou/dtc.git
* Pantelis' configfs interface patches and fixes
https://github.com/pantoniou/linux-beagle-track-mainline
Alan
Alan Tull (10):
fpga: add bindings document for fpga region
doc: fpga-mgr: add fpga image info to api
add bindings document for altera freeze bridge
ake longer times to enable or disable.
This patch documents the change in the FPGA Manager API
functions, replacing the 'u32 flag' parameter with a pointer
to struct fpga_image_info.
Signed-off-by: Alan Tull
---
v19: Added in v19 of this patchset
v20: No change for this patc
Add a low level driver for Altera Freeze Bridges to the FPGA Bridge
framework. A freeze bridge is a bridge that exists in the FPGA
fabric to isolate one region of the FPGA from the busses while that
one region is being reprogrammed.
Signed-off-by: Alan Tull
Signed-off-by: Matthew Gerlach
Add low level driver to support reprogramming FPGAs for Altera
SoCFPGA Arria10.
Signed-off-by: Alan Tull
---
v19: Added to this patchset as has been changed to use
fpga image information struct
a checkpatch fix of a block comment
do not use clk_put because we are using
Add documentation for new FPGA bridge class's sysfs interface.
Signed-off-by: Alan Tull
Acked-by: Moritz Fischer
--
v15: Document added in v15 of patch set
v16: No change to this patch in v16 of patch set
v17: No change to this patch in v17 of patch set
v18: No change to this patch in v
Add documentation for new FPGA bridge class's sysfs interface.
Signed-off-by: Alan Tull
Acked-by: Moritz Fischer
--
v15: Document added in v15 of patch set
v16: No change to this patch in v16 of patch set
v17: No change to this patch in v17 of patch set
v18: No change to this patch in v
New bindings document for FPGA Region to support programming
FPGA's under Device Tree control
Signed-off-by: Alan Tull
Signed-off-by: Moritz Fischer
Reviewed-by: Rob Herring
---
v9: initial version added to this patchset
v10: s/fpga/FPGA/g
replace DT overlay example with slightly
FPGA Regions support programming FPGA under control of the Device
Tree.
Signed-off-by: Alan Tull
---
v9: initial version (this patch added during rest of patchset's v9)
v10: request deferral if fpga mgr or bridges not available yet
cleanup as fpga manager core goes into the real k
A
Manager API functions are changed, replacing the 'u32 flag'
parameter with a pointer to struct fpga_image_info.
Subsequent patches fix the existing low level FPGA manager
drivers.
Signed-off-by: Alan Tull
Acked-by: Moritz Fischer
---
v19: Added in v19 of this patchset
v20: Squashed pat
sable
* fpga_bridges_put
Signed-off-by: Alan Tull
---
v2: Minor cleanup
v12: Bump version to line up with simple fpga bus
Remove sysfs
Improve get/put functions, get the low level driver too.
Clean up class implementation
Add kernel doc documentation
Rename (un)register_fpga_b
es
https://github.com/pantoniou/linux-beagle-track-mainline
Alan
Alan Tull (9):
fpga: add bindings document for fpga region
doc: fpga-mgr: add fpga image info to api
add sysfs document for fpga bridge class
fpga-mgr: add fpga image information struct
fpga: add fpga bridge framework
the bridge during probe. If the property
does not exist, the driver will leave the bridge in its
current state.
Signed-off-by: Alan Tull
Signed-off-by: Matthew Gerlach
Signed-off-by: Dinh Nguyen
---
v2: Use resets instead of directly writing reset registers
v12: Bump version to align with simpl
ake longer times to enable or disable.
This patch documents the change in the FPGA Manager API
functions, replacing the 'u32 flag' parameter with a pointer
to struct fpga_image_info.
Signed-off-by: Alan Tull
Acked-by: Moritz Fischer
---
v19: Added in v19 of this patchset
v20: No chan
Add a low level driver for Altera Freeze Bridges to the FPGA Bridge
framework. A freeze bridge is a bridge that exists in the FPGA
fabric to isolate one region of the FPGA from the busses while that
one region is being reprogrammed.
Signed-off-by: Alan Tull
Signed-off-by: Matthew Gerlach
Add low level driver to support reprogramming FPGAs for Altera
SoCFPGA Arria10.
Signed-off-by: Alan Tull
Reviewed-by: Moritz Fischer
---
v19: Added to this patchset as has been changed to use
fpga image information struct
a checkpatch fix of a block comment
do not use clk_put
On Fri, Apr 27, 2018 at 1:26 PM, Florian Fainelli wrote:
> On 04/26/2018 06:26 PM, Moritz Fischer wrote:
>> From: Alan Tull
>>
>> Change fpga_mgr_register to not set or use drvdata. This supports
>> the case where a PCIe device has more than one manager.
>>
>
ot;dt-bindings: fpga: fix freeze controller
compatible in region doc"
* drop some of the acked patches that I send to Greg
Alan Tull (4):
fpga: mgr: add devm_fpga_mgr_create
fpga: bridge: add devm_fpga_bridge_create
fpga: add devm_fpga_region_create
docs: fpga: document programming f
Add devm_fpga_bridge_create() which is the managed
version of fpga_bridge_create().
Change current bridge drivers to use
devm_fpga_bridge_create().
Signed-off-by: Alan Tull
Suggested-by: Federico Vaga
Acked-by: Moritz Fischer
---
v2: add suggested-by
v3: remove some unclear documentation
Clarify the intention that interfaces and upper layers use
regions rather than managers directly.
Rearrange API documentation to better group the API functions
used to create FPGA mgr/bridge/regions and the API used for
programming FPGAs.
Signed-off-by: Alan Tull
Suggested-by: Federico Vaga
Add devm_fpga_region_create() which is the
managed version of fpga_region_create().
Change current region drivers to use
devm_fpga_region_create().
Signed-off-by: Alan Tull
Suggested-by: Federico Vaga
---
v2: add suggested-by
v3: remove some unclear documentation about fpga_region_unregister
Add devm_fpga_mgr_create() which is the managed
version of fpga_mgr_create().
Change current FPGA manager drivers to use
devm_fpga_mgr_create()
Signed-off-by: Alan Tull
Suggested-by: Federico Vaga
---
v2: add suggested-by
v3: remove some unclear documentation about fpga_mgr_unregister
On Wed, Sep 26, 2018 at 11:12 AM Alan Tull wrote:
Any other comments on this patchset?
Alan
>
> Add devm_fpga_mgr_create() which is the managed
> version of fpga_mgr_create().
>
> Change current FPGA manager drivers to use
> devm_fpga_mgr_create()
>
> Signed-off-by: A
On Mon, Oct 15, 2018 at 3:11 PM Moritz Fischer
wrote:
>
> On Wed, Sep 26, 2018 at 9:12 AM Alan Tull wrote:
> >
> > Clarify the intention that interfaces and upper layers use
> > regions rather than managers directly.
> >
> > Rearrange API documentation to bet
New bindings document for FPGA Region to support programming
FPGA's under Device Tree control
Signed-off-by: Alan Tull
Signed-off-by: Moritz Fischer
---
v9: initial version added to this patchset
v10: s/fpga/FPGA/g
replace DT overlay example with slightly more complicated ex
go in also.
Alan Tull (6):
fpga: add bindings document for fpga region
ARM: socfpga: add bindings document for fpga bridge drivers
add sysfs document for fpga bridge class
fpga: add fpga bridge framework
fpga: fpga-region: device tree control for FPGA
ARM: socfpga: fpga bridge driv
Add bindings documentation for Altera SOCFPGA bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Signed-off-by: Alan Tull
Signed-off-by: Matthew Gerlach
Signed-off-by: Dinh Nguyen
---
v2: separate into 2 documents for the 2 drivers
v12: bump version to line up with simple-fpga-bus
sable
* fpga_bridges_put
Signed-off-by: Alan Tull
---
v2: Minor cleanup
v12: Bump version to line up with simple fpga bus
Remove sysfs
Improve get/put functions, get the low level driver too.
Clean up class implementation
Add kernel doc documentation
Rename (un)register_fpga_b
Add documentation for new FPGA bridge class's sysfs interface.
Signed-off-by: Alan Tull
--
v15: Document added in v15 of patch set
v16: No change to this patch in v16 of patch set
v17: No change to this patch in v17 of patch set
---
Documentation/ABI/testing/sysfs-class-fpga-bridge |
FPGA Regions support programming FPGA under control of the Device
Tree.
Signed-off-by: Alan Tull
---
v9: initial version (this patch added during rest of patchset's v9)
v10: request deferral if fpga mgr or bridges not available yet
cleanup as fpga manager core goes into the real k
the bridge during probe. If the property
does not exist, the driver will leave the bridge in its
current state.
Signed-off-by: Alan Tull
Signed-off-by: Matthew Gerlach
Signed-off-by: Dinh Nguyen
---
v2: Use resets instead of directly writing reset registers
v12: Bump version to align with simpl
36 matches
Mail list logo