From: Samuel Holland
The Allwinner A64 SoC is known[1] to have an unstable architectural
timer, which manifests itself most obviously in the time jumping forward
a multiple of 95 years[2][3]. This coincides with 2^56 cycles at a
timer frequency of 24 MHz, implying that the time went slightly back
From: Hauke Mehrtens
Date: Fri, 22 Feb 2019 20:07:45 +0100
> This callback was removed some time ago, also remove the documentation.
>
> Fixes: 1b6dd556c304 ("net: dsa: Remove prepare phase for FDB")
> Signed-off-by: Hauke Mehrtens
Applied.
