Hi PeterA,
The Cover leter has this:
> 5.Update memory-barriers.txt on enforcing heavy ordering for
> port-I/O accesses, courtesy of Will Deacon. This one needs
> an ack, preferably by someone from Intel. Matthew Wilcox
> posted some feedback from an Intel manual here, w
On Thu, Jan 10, 2019 at 05:08:11PM -0700, Jonathan Corbet wrote:
> On Fri, 11 Jan 2019 00:56:42 +0100
> Christian Brauner wrote:
>
> > > - Please consider doing this in RST and tying it into our documentation
> > >tree. It's *almost* RST now, so the effort required will be almost
> > >z
On Thu, Jan 10, 2019 at 08:19:43PM +0800, Lianbo Jiang wrote:
> +init_uts_ns.name.release
> +
> +
> +The version of the Linux kernel. Used to find the corresponding source
> +code from which the kernel has been built.
> +
...
> +
> +init_uts_ns
> +---
> +
> +This i
This documents the Android binderfs filesystem used to dynamically add and
remove binder devices that are private to each instance.
Signed-off-by: Christian Brauner
---
/* Changelog */
v1:
- switch from *.txt to *.rst format
---
Documentation/filesystems/binderfs.rst | 70 +++
This adds a simple sample program mounting binderfs and adding, then
removing a binder device. Hopefully, it will be helpful to users who want
to know how binderfs is supposed to be used.
Signed-off-by: Christian Brauner
---
/* Changelog */
v1:
- patch introduced
v0:
- patch not present
---
sa
Defining ARCH_SLAB_MINALIGN in arch/arm64/include/asm/cache.h when KASAN
is off is not needed, as it is defined in defined in include/linux/slab.h
as ifndef.
Signed-off-by: Andrey Konovalov
---
arch/arm64/include/asm/cache.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/include
On Wed, Jan 9, 2019 at 11:10 AM Vincenzo Frascino
wrote:
>
> On 03/01/2019 18:45, Andrey Konovalov wrote:
> > Instead of changing cache->align to be aligned to KASAN_SHADOW_SCALE_SIZE
> > in kasan_cache_create() we can reuse the ARCH_SLAB_MINALIGN macro.
> >
> > Suggested-by: Vincenzo Frascino
>
2019-01-07 18:52+0100, Christophe de Dinechin:
> The URL of [api-spec] in Documentation/virtual/kvm/amd-memory-encryption.rst
> is no longer valid, replaced space with underscore.
>
> Signed-off-by: Christophe de Dinechin
> ---
Applied, thanks.
On Thu, Jan 10, 2019 at 08:19:43PM +0800, Lianbo Jiang wrote:
> This document lists some variables that export to vmcoreinfo, and briefly
> describles what these variables indicate. It should be instructive for
> many people who do not know the vmcoreinfo.
>
> Suggested-by: Borislav Petkov
> Sign
Bits are usually numbered starting from zero, so 4 should be bit 2, not
bit 3.
Suggested-by: Matthew Wilcox
Signed-off-by: Vincent Whitchurch
---
Documentation/sysctl/vm.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/sysctl/vm.txt b/Documentation/sysctl/vm
On Thu, Jan 03, 2019 at 11:40:04AM +, james qian wang (Arm Technology
China) wrote:
> From: "james qian wang (Arm Technology China)"
>
> Add DT bindings documentation for the ARM display processor D71 and later
> IPs.
>
> Changes in v4:
> - Deleted unnecessary address-cells, size-cells [Liv
On Thu, Jan 10, 2019 at 11:48:13PM +, Jason Gunthorpe wrote:
> There has been some confusion since checkpatch started warning about bool
> use in structures, and people have been avoiding using it.
>
> Many people feel there is still a legitimate place for bool in structures,
> so provide some
Hi Jonathan,
I have a patch adding documentation for the AFBC modifiers supported
by the DRM framework with an upcoming patch series. Patch has been
out for review for a while, please pull.
The include/uapi/drm/drm_fourcc.h change is only a comment pointing
towards the file's location, I hope thi
On Thu, Jan 03, 2019 at 05:44:26PM -0300, Ezequiel Garcia wrote:
> Hi Liviu,
>
> On Mon, 2018-12-03 at 11:31 +, Ayan Halder wrote:
> > From: Brian Starkey
> >
> > AFBC is a flexible, proprietary, lossless compression protocol and
> > format, with a number of defined DRM format modifiers. To
On Fri, 11 Jan 2019 18:07:49 +
Liviu Dudau wrote:
> I have a patch adding documentation for the AFBC modifiers supported
> by the DRM framework with an upcoming patch series. Patch has been
> out for review for a while, please pull.
>
> The include/uapi/drm/drm_fourcc.h change is only a comm
On Fri, Jan 11, 2019 at 06:07:49PM +, Liviu Dudau wrote:
> Hi Jonathan,
>
> I have a patch adding documentation for the AFBC modifiers supported
> by the DRM framework with an upcoming patch series. Patch has been
> out for review for a while, please pull.
Nowhere in this email do you say wha
The ability to add kerneldoc comments for fields in embedded structures is
useful, but it brought along a whole bunch of warnings for fields that
could not be described before. In many cases, there's little value in
adding docs for these nested fields, and in cases like:
struct a {
On Wed, 19 Dec 2018, Waiman Long wrote:
> With the default SPEC_STORE_BYPASS_SECCOMP/SPEC_STORE_BYPASS_PRCTL mode,
> the TIF_SSBD bit will be inherited when a new task is fork'ed or cloned.
>
> As only certain class of applications (like Java) requires disabling
> speculative store bypass for sec
Hi Steven, Have you checked this serias yet? :)
On Tue, Jan 01, 2019 at 11:46:09PM +0800, Changbin Du wrote:
> Happy new year!
>
> This series make some improments for the kernel latency tracers, especilly
> for the wakeup tracers. The latency tracers will show us more useful
> information. With
This patch adds a new trace option 'funcgraph-retval' and is disabled by
default. When this option is enabled, fgraph tracer will show the return
value of each function. This is useful to find/analyze a original error
source in a call graph.
One limitation is that kernel doesn't know the prototype
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