On Thu, Dec 6, 2018 at 12:08 AM Doug Smythies wrote:
>
> Hi Rafael,
>
> On 2018.12.03 04:32 Rafael J. Wysocki wrote:
>
> > Add two new metrics for CPU idle states, "high" and "low", to count
> > the number of times the given state had been asked for (or entered
> > from the kernel's perspective),
Hi Ganpat,
On 05/12/2018 10:59, Kulkarni, Ganapatrao wrote:
This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory
Controller(DMC) and Level 3 Cache(L3C). Each PMU supports up to 4
counters. All counters lack overflow interrupt and are
sampled periodically.
Signed-off-by: Ganapatr
On Tue, Dec 4, 2018 at 11:24 PM Max Filippov wrote:
>
> Hello,
>
> On Tue, Nov 27, 2018 at 9:00 AM Andrey Konovalov
> wrote:
> >
> > This commit splits the current CONFIG_KASAN config option into two:
> > 1. CONFIG_KASAN_GENERIC, that enables the generic KASAN mode (the one
> >that exists no
On Thu, Nov 29, 2018 at 7:01 PM Will Deacon wrote:
>
> On Tue, Nov 27, 2018 at 05:55:41PM +0100, Andrey Konovalov wrote:
> > Now, that all the necessary infrastructure code has been introduced,
> > select HAVE_ARCH_KASAN_SW_TAGS for arm64 to enable software tag-based
> > KASAN mode.
> >
> > Signed
On Thu, Nov 29, 2018 at 7:01 PM Will Deacon wrote:
>
> On Tue, Nov 27, 2018 at 05:55:38PM +0100, Andrey Konovalov wrote:
> > Tag-based KASAN inline instrumentation mode (which embeds checks of shadow
> > memory into the generated code, instead of inserting a callback) generates
> > a brk instructi
On 06.12.2018 4:10, Kees Cook wrote:
> On Tue, Nov 27, 2018 at 12:15 AM Alexey Budankov
> wrote:
>>
>>
>> Implement initial version of perf-security.rst documentation file
>> covering security concerns of perf_event_paranoid settings.
>>
>> Suggested-by: Thomas Gleixner
>> Signed-off-by: Alexey B
On Thu, Dec 06, 2018 at 11:31:43AM +0100, Andrey Konovalov wrote:
> On Thu, Nov 29, 2018 at 7:01 PM Will Deacon wrote:
> >
> > On Tue, Nov 27, 2018 at 05:55:38PM +0100, Andrey Konovalov wrote:
> > > Tag-based KASAN inline instrumentation mode (which embeds checks of shadow
> > > memory into the ge
This patchset adds PMU driver for Cavium's ThunderX2 SoC UNCORE devices.
The SoC has PMU support in L3 cache controller (L3C) and in the
DDR4 Memory Controller (DMC).
v11:
Updated Patch 2 with minor comments.
v10:
Updated Documentation patch with comments [6].
[6] https://lkml.o
This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory
Controller(DMC) and Level 3 Cache(L3C). Each PMU supports up to 4
counters. All counters lack overflow interrupt and are
sampled periodically.
Reviewed-by: Suzuki K Poulose
Signed-off-by: Ganapatrao Kulkarni
---
drivers/perf/K
The SoC has PMU support in its L3 cache controller (L3C) and in the
DDR4 Memory Controller (DMC).
Signed-off-by: Ganapatrao Kulkarni
---
Documentation/perf/thunderx2-pmu.txt | 93
1 file changed, 93 insertions(+)
create mode 100644 Documentation/perf/thunderx2-pmu.t
On Thu, Dec 6, 2018 at 2:55 PM Suzuki K Poulose wrote:
>
> Hi Ganpat,
>
> On 05/12/2018 10:59, Kulkarni, Ganapatrao wrote:
> > This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory
> > Controller(DMC) and Level 3 Cache(L3C). Each PMU supports up to 4
> > counters. All counters lack
Tag-based KASAN changes the value of the top byte of pointers returned
from the kernel allocation functions (such as kmalloc). This patch updates
KASAN hooks signatures and their usage in SLAB and SLUB code to reflect
that.
Reviewed-by: Andrey Ryabinin
Reviewed-by: Dmitry Vyukov
Signed-off-by: A
The previous patch updated KASAN hooks signatures and their usage in SLAB
and SLUB code, except for the early_kmem_cache_node_alloc function. This
patch handles that function separately, as it requires to reorder some of
the initialization code to correctly propagate a tagged pointer in case a
tag
We now have two KASAN modes: generic KASAN and tag-based KASAN. Rename
kasan.c to generic.c to reflect that. Also rename kasan_init.c to init.c
as it contains initialization code for both KASAN modes.
Reviewed-by: Andrey Ryabinin
Reviewed-by: Dmitry Vyukov
Signed-off-by: Andrey Konovalov
---
m
This patch adds __must_check annotations to kasan hooks that return a
pointer to make sure that a tagged pointer always gets propagated.
Suggested-by: Andrey Ryabinin
Signed-off-by: Andrey Konovalov
---
include/linux/kasan.h | 16 ++--
mm/kasan/common.c | 15 +--
2 f
Tag-based KASAN doesn't check memory accesses through pointers tagged with
0xff. When page_address is used to get pointer to memory that corresponds
to some page, the tag of the resulting pointer gets set to 0xff, even
though the allocated memory might have been tagged differently.
For slab pages
With tag based KASAN mode the early shadow value is 0xff and not 0x00,
so this patch renames kasan_zero_(page|pte|pmd|pud|p4d) to
kasan_early_shadow_(page|pte|pmd|pud|p4d) to avoid confusion.
Suggested-by: Mark Rutland
Signed-off-by: Andrey Konovalov
---
arch/arm64/mm/kasan_init.c | 43
This patch moves generic KASAN specific error reporting routines to
generic_report.c without any functional changes, leaving common error
reporting code in report.c to be later reused by tag-based KASAN.
Reviewed-by: Andrey Ryabinin
Reviewed-by: Dmitry Vyukov
Signed-off-by: Andrey Konovalov
---
Tag-based KASAN uses the Top Byte Ignore feature of arm64 CPUs to store a
pointer tag in the top byte of each pointer. This commit enables the
TCR_TBI1 bit, which enables Top Byte Ignore for the kernel, when tag-based
KASAN is used.
Reviewed-by: Andrey Ryabinin
Reviewed-by: Dmitry Vyukov
Signed-
This patch adds a "SPDX-License-Identifier: GPL-2.0" mark to all source
files under mm/kasan.
Reviewed-by: Andrey Ryabinin
Reviewed-by: Dmitry Vyukov
Signed-off-by: Andrey Konovalov
---
mm/kasan/common.c | 1 +
mm/kasan/generic.c| 1 +
mm/kasan/generic_report.c | 1 +
mm/kasan/
On Thu, Dec 6, 2018 at 12:10 PM Will Deacon wrote:
>
> On Thu, Dec 06, 2018 at 11:31:43AM +0100, Andrey Konovalov wrote:
> > On Thu, Nov 29, 2018 at 7:01 PM Will Deacon wrote:
> > >
> > > On Tue, Nov 27, 2018 at 05:55:38PM +0100, Andrey Konovalov wrote:
> > > > Tag-based KASAN inline instrumentat
This patch updates KASAN documentation to reflect the addition of the new
tag-based mode.
Reviewed-by: Andrey Ryabinin
Reviewed-by: Dmitry Vyukov
Signed-off-by: Andrey Konovalov
---
Documentation/dev-tools/kasan.rst | 232 ++
1 file changed, 138 insertions(+), 94 de
Tag-based KASAN inline instrumentation mode (which embeds checks of shadow
memory into the generated code, instead of inserting a callback) generates
a brk instruction when a tag mismatch is detected.
This commit adds a tag-based KASAN specific brk handler, that decodes the
immediate value passed
Now, that all the necessary infrastructure code has been introduced,
select HAVE_ARCH_KASAN_SW_TAGS for arm64 to enable software tag-based
KASAN mode.
Signed-off-by: Andrey Konovalov
---
arch/arm64/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfi
This commit adds tag-based KASAN specific hooks implementation and
adjusts common generic and tag-based KASAN ones.
1. When a new slab cache is created, tag-based KASAN rounds up the size of
the objects in this cache to KASAN_SHADOW_SCALE_SIZE (== 16).
2. On each kmalloc tag-based KASAN genera
An object constructor can initialize pointers within this objects based on
the address of the object. Since the object address might be tagged, we
need to assign a tag before calling constructor.
The implemented approach is to assign tags to objects with constructors
when a slab is allocated and c
This commit adds rountines, that print tag-based KASAN error reports.
Those are quite similar to generic KASAN, the difference is:
1. The way tag-based KASAN finds the first bad shadow cell (with a
mismatching tag). Tag-based KASAN compares memory tags from the shadow
memory to the pointer t
The krealloc function checks where the same buffer was reused or a new one
allocated by comparing kernel pointers. Tag-based KASAN changes memory tag
on the krealloc'ed chunk of memory and therefore also changes the pointer
tag of the returned pointer. Therefore we need to perform comparison on
unt
While with SLUB we can actually preassign tags for caches with contructors
and store them in pointers in the freelist, SLAB doesn't allow that since
the freelist is stored as an array of indexes, so there are no pointers to
store the tags.
Instead we compute the tag twice, once when a slab is crea
Right now arm64 fault handling code removes pointer tags from addresses
covered by TTBR0 in faults taken from both EL0 and EL1, but doesn't do
that for pointers covered by TTBR1.
This patch adds two helper functions is_ttbr0_addr() and is_ttbr1_addr(),
where the latter one accounts for the fact th
virt_addr_is_linear (which is used by virt_addr_valid) assumes that the
top byte of the address is 0xff, which isn't always the case with
tag-based KASAN.
This patch resets the tag in this macro.
Reviewed-by: Andrey Ryabinin
Reviewed-by: Dmitry Vyukov
Signed-off-by: Andrey Konovalov
---
arch/
This commit adds a few helper functions, that are meant to be used to
work with tags embedded in the top byte of kernel pointers: to set, to
get or to reset the top byte.
Signed-off-by: Andrey Konovalov
---
arch/arm64/include/asm/kasan.h | 8 +--
arch/arm64/include/asm/memory.h | 12 ++
A tag-based KASAN shadow memory cell contains a memory tag, that
corresponds to the tag in the top byte of the pointer, that points to that
memory. The native top byte value of kernel pointers is 0xff, so with
tag-based KASAN we need to initialize shadow memory to 0xff.
Reviewed-by: Andrey Ryabini
Move the untagged_addr() macro from arch/arm64/include/asm/uaccess.h
to arch/arm64/include/asm/memory.h to be later reused by KASAN.
Also make the untagged_addr() macro accept all kinds of address types
(void *, unsigned long, etc.). This allows not to specify type casts in
each place where the ma
Tag-based KASAN uses 1 shadow byte for 16 bytes of kernel memory, so it
requires 1/16th of the kernel virtual address space for the shadow memory.
This commit sets KASAN_SHADOW_SCALE_SHIFT to 4 when the tag-based KASAN
mode is enabled.
Reviewed-by: Andrey Ryabinin
Reviewed-by: Dmitry Vyukov
Sig
This patchset adds a new software tag-based mode to KASAN [1].
(Initially this mode was called KHWASAN, but it got renamed,
see the naming rationale at the end of this section).
The plan is to implement HWASan [2] for the kernel with the incentive,
that it's going to have comparable to KASAN perf
Tag-based KASAN reuses a significant part of the generic KASAN code, so
move the common parts to common.c without any functional changes.
Reviewed-by: Andrey Ryabinin
Reviewed-by: Dmitry Vyukov
Signed-off-by: Andrey Konovalov
---
mm/kasan/Makefile | 5 +-
mm/kasan/common.c | 603
This commit splits the current CONFIG_KASAN config option into two:
1. CONFIG_KASAN_GENERIC, that enables the generic KASAN mode (the one
that exists now);
2. CONFIG_KASAN_SW_TAGS, that enables the software tag-based KASAN mode.
The name CONFIG_KASAN_SW_TAGS is chosen as in the future we will h
Hi Ganapat,
On Thu, Dec 06, 2018 at 11:51:24AM +, Kulkarni, Ganapatrao wrote:
> This patchset adds PMU driver for Cavium's ThunderX2 SoC UNCORE devices.
> The SoC has PMU support in L3 cache controller (L3C) and in the
> DDR4 Memory Controller (DMC).
>
>
> v11:
> Updated Patch 2 with m
On Thu, Nov 29, 2018 at 7:22 PM Catalin Marinas wrote:
>
> On Thu, Nov 08, 2018 at 03:36:08PM +0100, Andrey Konovalov wrote:
> > This patch makes the untagged_addr macro accept all kinds of address types
> > (void *, unsigned long, etc.) and allows not to specify type casts in each
> > place where
On Thu, Nov 29, 2018 at 7:23 PM Catalin Marinas wrote:
>
> On Thu, Nov 08, 2018 at 03:36:09PM +0100, Andrey Konovalov wrote:
> > diff --git a/include/linux/uaccess.h b/include/linux/uaccess.h
> > index efe79c1cdd47..c045b4eff95e 100644
> > --- a/include/linux/uaccess.h
> > +++ b/include/linux/uacc
On Thu, Nov 29, 2018 at 7:16 PM Catalin Marinas wrote:
>
> Hi Andrey,
>
> On Thu, Nov 08, 2018 at 03:48:10PM +0100, Andrey Konovalov wrote:
> > On Thu, Nov 8, 2018 at 3:36 PM, Andrey Konovalov
> > wrote:
> > > Changes in v8:
> > > - Rebased onto 65102238 (4.20-rc1).
> > > - Added a note to the c
On Thu, Dec 06, 2018 at 01:44:24PM +0100, Andrey Konovalov wrote:
> On Thu, Nov 29, 2018 at 7:16 PM Catalin Marinas
> wrote:
> > On Thu, Nov 08, 2018 at 03:48:10PM +0100, Andrey Konovalov wrote:
> > > On Thu, Nov 8, 2018 at 3:36 PM, Andrey Konovalov
> > > wrote:
> > > > Changes in v8:
> > > > -
On Wed, Dec 05, 2018 at 08:28:05PM +0900, Masahiro Yamada wrote:
> Some time ago, Sam pointed out a certain degree of overwrap between
> generic-y and mandatory-y. (https://lkml.org/lkml/2017/7/10/121)
>
> I a bit tweaked the meaning of mandatory-y; now it defines the minimum
> set of ASM headers
On Thu, Dec 6, 2018 at 6:04 PM Will Deacon wrote:
>
> Hi Ganapat,
>
> On Thu, Dec 06, 2018 at 11:51:24AM +, Kulkarni, Ganapatrao wrote:
> > This patchset adds PMU driver for Cavium's ThunderX2 SoC UNCORE devices.
> > The SoC has PMU support in L3 cache controller (L3C) and in the
> > DDR4 Memo
On Wed, 5 Dec 2018 17:10:48 -0800
Kees Cook wrote:
> On Tue, Nov 27, 2018 at 12:15 AM Alexey Budankov
> wrote:
> >
> >
> > Implement initial version of perf-security.rst documentation file
> > covering security concerns of perf_event_paranoid settings.
> >
> > Suggested-by: Thomas Gleixner
> >
On Thu, 06 Dec 2018 08:00:58 +1100
NeilBrown wrote:
> > Is there a reason you used "include" rather than just adding it to the
> > TOC tree with the rest?
>
> Simple. I didn't know what I was doing, and so randomly made changes until
> the result seemed acceptable - then I stopped. If there
On Sun, 2 Dec 2018 18:40:09 +0100
Federico Vaga wrote:
> - fix broken links and some
> - fix some grammar errors
>
> Signed-off-by: Federico Vaga
Applied thanks (and the new translations as well).
jon
On Sat, 1 Dec 2018 13:44:29 +0100
Nicholas Mc Guire wrote:
> There are a number of cases where conversions to devm_* API have been
> done but developers forgot that this conversion may imply that return
> values need to be checked for failure of internal resource handling
> like allocation. Whil
On Wed, Dec 05, 2018 at 08:28:05PM +0900, Masahiro Yamada wrote:
> Some time ago, Sam pointed out a certain degree of overwrap between
> generic-y and mandatory-y. (https://lkml.org/lkml/2017/7/10/121)
>
> I a bit tweaked the meaning of mandatory-y; now it defines the minimum
> set of ASM headers
Hi Rui,
On 12/5/18 4:09 PM, Zhang Rui wrote:
> On 三, 2018-11-07 at 18:09 +0100, Lukasz Luba wrote:
>> This patch adds support irq mode in trip point.
>> When that flag is set in DT, there is no need for polling
>> in thermal framework. Crossing the trip point will rise an IRQ.
>> The naming conven
On 12/6/18 8:18 PM, Lukasz Luba wrote:
> Hi Rui,
>
> On 12/5/18 4:09 PM, Zhang Rui wrote:
>> On 三, 2018-11-07 at 18:09 +0100, Lukasz Luba wrote:
>>> This patch adds support irq mode in trip point.
>>> When that flag is set in DT, there is no need for polling
>>> in thermal framework. Crossing t
Hi,
These patches update formatting of function descriptions in
mm/slab_common.c and link the comments from this file to "The Slab Cache"
section of the MM API reference.
As the changes to mm/slab_common.c only touch the comments, I think these
patches can go via the docs tree.
Mike Rapoport (2)
Add the description for kmem_cache_create, fixup the return value paragraph
and make both kmem_cache_create and add the second '*' to the comment
opening.
Signed-off-by: Mike Rapoport
---
mm/slab_common.c | 35 +++
1 file changed, 31 insertions(+), 4 deletions(-)
Several functions in mm/slab_common.c have kernel-doc comments, it makes
perfect sense to link them to the MM API reference.
Signed-off-by: Mike Rapoport
---
Documentation/core-api/mm-api.rst | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/core-api/mm-api.rst
b/Documentatio
On 06.12.18 01:26, Wei Yang wrote:
> Currently locking for memory hotplug is a little complicated.
>
> Generally speaking, we leverage the two global lock:
>
> * device_hotplug_lock
> * mem_hotplug_lock
>
> to serialise the process.
>
> While for the long term, we are willing to have more f
On Wed, 28 Nov 2018 16:45:44 +0200
Mike Rapoport wrote:
> The mm-api.rst covers variety of memory management APIs under "More Memory
> Management Functions" section. The descriptions included there are in a
> random order there are quite a few of them which makes the section too
> long.
>
> Regr
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