Re: [PATCH] bpf, doc: Document Jump X addressing mode

2018-10-08 Thread Daniel Borkmann
On 10/07/2018 10:45 AM, Arthur Fabre wrote: > bpf_asm and the other classic BPF tools support jump conditions > comparing register A to register X, in addition to comparing register A > with constant K. > Only the latter was documented in filter.txt, add two new addressing > modes that describe the

Re: [PATCH] Documentation/arm64: HugeTLB page implementation

2018-10-08 Thread Punit Agrawal
Hi Randy, Randy Dunlap writes: > Hi, > Just some minor stuff (below). > > On 10/5/18 7:34 AM, Punit Agrawal wrote: >> Arm v8 architecture supports multiple page sizes - 4k, 16k and >> 64k. Based on the active page size, the Linux port supports >> corresponding hugepage sizes at PMD and PUD(4k on

Re: [PATCH v6 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

2018-10-08 Thread Ganapatrao Kulkarni
Hi Pranith, On Sat, Jul 7, 2018 at 11:22 AM Pranith Kumar wrote: > > Hi Ganapatrao, > > > On Wed, Jun 20, 2018 at 11:33 PM, Ganapatrao Kulkarni > wrote: > > > + > > +enum thunderx2_uncore_l3_events { > > + L3_EVENT_NONE, > > + L3_EVENT_NBU_CANCEL, > > + L3_EVENT_DIB_RETRY, > >

[PATCH v2] Documentation/arm64: HugeTLB page implementation

2018-10-08 Thread Punit Agrawal
Arm v8 architecture supports multiple page sizes - 4k, 16k and 64k. Based on the active page size, the Linux port supports corresponding hugepage sizes at PMD and PUD(4k only) levels. In addition, the architecture also supports caching larger sized ranges (composed of multiple entries) at the PTE

Re: [PATCH v8 07/10] i3c: master: Add driver for Cadence IP

2018-10-08 Thread Arnd Bergmann
On Wed, Oct 3, 2018 at 3:22 PM Boris Brezillon wrote: > > Add a driver for Cadence I3C master IP. > > Signed-off-by: Boris Brezillon > --- > Changes in v7: > - Fix readsl/writesl() usage > - Add a depends on ARM || ARM64 || XTENSA to forbid selection of this > driver on platforms that are not

Re: [PATCH v8 07/10] i3c: master: Add driver for Cadence IP

2018-10-08 Thread Boris Brezillon
On Mon, 8 Oct 2018 12:06:30 +0200 Arnd Bergmann wrote: > On Wed, Oct 3, 2018 at 3:22 PM Boris Brezillon > wrote: > > > > Add a driver for Cadence I3C master IP. > > > > Signed-off-by: Boris Brezillon > > --- > > > Changes in v7: > > - Fix readsl/writesl() usage > > - Add a depends on ARM ||

Re: [PATCH v8 07/10] i3c: master: Add driver for Cadence IP

2018-10-08 Thread Arnd Bergmann
On Mon, Oct 8, 2018 at 12:21 PM Boris Brezillon wrote: > > On Mon, 8 Oct 2018 12:06:30 +0200 > Arnd Bergmann wrote: > > > On Wed, Oct 3, 2018 at 3:22 PM Boris Brezillon > > wrote: > > > > > > Add a driver for Cadence I3C master IP. > > > > > > Signed-off-by: Boris Brezillon > > > --- > > > > >

Re: [PATCH v8 00/10] Add the I3C subsystem

2018-10-08 Thread Arnd Bergmann
On Wed, Oct 3, 2018 at 3:22 PM Boris Brezillon wrote: > > Sorry for the huge delay between v7 and v8 despite the small amount of > things I was asked to fix/rework. > > This patch series is adding a new subsystem to support I3C devices. > > This is just adding support for basic features. Extra fea

[PATCH 1/3] lib/vsprintf: Prepare for more general use of ptr_to_id()

2018-10-08 Thread Geert Uytterhoeven
- Make the ptr argument const, to avoid adding casts in future callers, - Add a forward declaration, to avoid moving large blocks of code. Signed-off-by: Geert Uytterhoeven --- lib/vsprintf.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/lib/vsprintf.c b/lib/vs

[PATCH 2/3] lib/vsprintf: Hash legacy clock addresses

2018-10-08 Thread Geert Uytterhoeven
On platforms using the Common Clock Framework, "%pC" prints the clock's name. On legacy platforms, it prints the unhashed clock's address, potentially leaking sensitive information regarding the kernel layout in memory. Avoid this leak by printing the hashed address instead. To distinguish betwee

[PATCH 0/3] lib/vsprintf: Hash remaining raw addresses

2018-10-08 Thread Geert Uytterhoeven
Hi all, There are still two format specifiers that print unhanced kernel addresses, potentially leaking sensitive information regarding the kernel layout in memory. This patch series fixes this by printing hashed addresses instead. Thanks! Geert Uytterhoeven (3): lib/vsprintf: Pre

[PATCH 3/3] lib/vsprintf: Hash printed address for netdev bits fallback

2018-10-08 Thread Geert Uytterhoeven
The handler for "%pN" falls back to printing the raw pointer value when using a different format than the (sole supported) special format "%pNF", potentially leaking sensitive information regarding the kernel layout in memory. Avoid this leak by printing the hashed address instead. Note that there

[PATCH] doc: printk-formats: Remove bogus kobject references for device nodes

2018-10-08 Thread Geert Uytterhoeven
When converting from text to rst, the kobjects section and its sole subsection about device tree nodes were coalesced into a single section, yielding an inconsistent result. Remove all references to kobjects, as 1. Device tree object pointers are not compatible to kobject pointers (the form

Re: [PATCH v8 07/10] i3c: master: Add driver for Cadence IP

2018-10-08 Thread Boris Brezillon
On Mon, 8 Oct 2018 12:36:44 +0200 Arnd Bergmann wrote: > On Mon, Oct 8, 2018 at 12:21 PM Boris Brezillon > wrote: > > > > On Mon, 8 Oct 2018 12:06:30 +0200 > > Arnd Bergmann wrote: > > > > > On Wed, Oct 3, 2018 at 3:22 PM Boris Brezillon > > > wrote: > > > > > > > > Add a driver for Cadenc

[PATCH] Documentation: preempt-locking: Use better example

2018-10-08 Thread Andrew Murray
The existing wording implies that the use of spin_unlock whilst irqs are disabled might trigger a reschedule. However the preemptible() test in preempt_schedule will prevent a reschedule if irqs are disabled. Lets improve the clarity of this wording to change the example from spin_unlock to cond_r

Re: [PATCH 1/3] lib/vsprintf: Prepare for more general use of ptr_to_id()

2018-10-08 Thread Andy Shevchenko
On Mon, Oct 08, 2018 at 01:05:02PM +0200, Geert Uytterhoeven wrote: > - Make the ptr argument const, to avoid adding casts in future > callers, > - Add a forward declaration, to avoid moving large blocks of code. How big it would be? ptr_to_id() itself plus... > +static char *ptr_to_id(

Re: [PATCH security-next v4 23/32] selinux: Remove boot parameter

2018-10-08 Thread Paul Moore
On Thu, Oct 4, 2018 at 1:38 AM John Johansen wrote: > On 10/03/2018 10:26 AM, Kees Cook wrote: ... > > Either a distro builds a very specific subset of LSMs, or they build > > in all LSMs (for the user to choose from). In both cases, they set an > > explicit order, which defines which exclusive

Re: [PATCH 1/3] lib/vsprintf: Prepare for more general use of ptr_to_id()

2018-10-08 Thread Geert Uytterhoeven
Hi Andy, On Mon, Oct 8, 2018 at 4:25 PM Andy Shevchenko wrote: > On Mon, Oct 08, 2018 at 01:05:02PM +0200, Geert Uytterhoeven wrote: > > - Make the ptr argument const, to avoid adding casts in future > > callers, > > > - Add a forward declaration, to avoid moving large blocks of code. > >

Re: [PATCH 1/3] lib/vsprintf: Prepare for more general use of ptr_to_id()

2018-10-08 Thread Andy Shevchenko
On Mon, Oct 08, 2018 at 04:37:29PM +0200, Geert Uytterhoeven wrote: > Hi Andy, > > On Mon, Oct 8, 2018 at 4:25 PM Andy Shevchenko > wrote: > > On Mon, Oct 08, 2018 at 01:05:02PM +0200, Geert Uytterhoeven wrote: > > > - Make the ptr argument const, to avoid adding casts in future > > > calle

Re: [PATCH v2] Documentation/arm64: HugeTLB page implementation

2018-10-08 Thread Randy Dunlap
On 10/8/18 3:03 AM, Punit Agrawal wrote: > Arm v8 architecture supports multiple page sizes - 4k, 16k and > 64k. Based on the active page size, the Linux port supports > corresponding hugepage sizes at PMD and PUD(4k only) levels. > > In addition, the architecture also supports caching larger size

Re: [PATCH 4/3 v2] x86/mm/doc: Enhance the x86-64 virtual memory layout descriptions

2018-10-08 Thread Baoquan He
Hi Andy, Ingo On 10/06/18 at 03:17pm, Andy Lutomirski wrote: > On Sat, Oct 6, 2018 at 10:03 AM Ingo Molnar wrote: > > ... but unless I'm missing something it's not really fundamental for it to > > be at the PGD level > > - it could be two levels lower as well, and it could move back to the same

[PATCH] security: fix LSM description location

2018-10-08 Thread Randy Dunlap
From: Randy Dunlap Fix Documentation location reference for where LSM descriptions should be placed. Suggested-by: Kees Cook Signed-off-by: Randy Dunlap Cc: James Morris Cc: "Serge E. Hallyn" Cc: linux-security-mod...@vger.kernel.org --- Documentation/security/LSM.rst |2 +- 1 file chan

[PATCH] docs: rcu: Make reader aware of rcu_dereference_protected

2018-10-08 Thread Joel Fernandes (Google)
whatisRCU says rcu_dereference cannot be used outside of rcu read lock protected sections. Its better to mention rcu_dereference_protected when it says that, so that the new reader is aware of this API and is not led to believing that all RCU dereferences in all situations have to be protected by a

Re: [PATCH] security: fix LSM description location

2018-10-08 Thread Kees Cook
On Mon, Oct 8, 2018 at 5:46 PM, Randy Dunlap wrote: > From: Randy Dunlap > > Fix Documentation location reference for where LSM descriptions should > be placed. > > Suggested-by: Kees Cook > Signed-off-by: Randy Dunlap > Cc: James Morris > Cc: "Serge E. Hallyn" > Cc: linux-security-mod...@vge

Re: [PATCH 4/3 v2] x86/mm/doc: Enhance the x86-64 virtual memory layout descriptions

2018-10-08 Thread Baoquan He
On 10/09/18 at 08:35am, Baoquan He wrote: > Hi Andy, Ingo > > On 10/06/18 at 03:17pm, Andy Lutomirski wrote: > > On Sat, Oct 6, 2018 at 10:03 AM Ingo Molnar wrote: > > > ... but unless I'm missing something it's not really fundamental for it > > > to be at the PGD level > > > - it could be two l

Re: [PATCH v5 04/21] dt-bindings: Add doc for the Ingenic TCU drivers

2018-10-08 Thread Lee Jones
On Wed, 03 Oct 2018, Paul Cercueil wrote: > Le 3 oct. 2018 3:02 PM, Daniel Lezcano a écrit : > > On 03/10/2018 14:51, Paul Cercueil wrote: > > > > > > Le 3 oct. 2018 2:47 PM, Daniel Lezcano a > > > écrit : > > >> > > >> On 03/10/2018 12:32, Paul Cercueil wrote: > > >>> > > >>> Le 1 oct. 20