Hi Jintack,
On Tue, Jul 18, 2017 at 10:23:05PM -0400, Jintack Lim wrote:
> On Tue, Jul 18, 2017 at 12:58 PM, Jintack Lim wrote:
> > Nested virtualization is the ability to run a virtual machine inside another
> > virtual machine. In other words, it’s about running a hypervisor (the guest
> > hype
On Tue, 18 Jul 2017 15:59:54 +0800
Shaokun Zhang wrote:
> This patch adds documentation for the uncore PMUs on HiSilicon SoC.
>
> Signed-off-by: Shaokun Zhang
> Signed-off-by: Anurup M
Hi Shaokun,
Sorry for the late reply on this (only recently joined Huawei)
This is a fairly generic revie
On Tue, 18 Jul 2017 15:59:55 +0800
Shaokun Zhang wrote:
> This patch adds support HiSilicon SoC uncore PMU driver framework and
> interfaces.
>
> Signed-off-by: Shaokun Zhang
> Signed-off-by: Anurup M
A couple of minor things inline.
Jonathan
> ---
> drivers/perf/Kconfig
On Tue, 18 Jul 2017 15:59:56 +0800
Shaokun Zhang wrote:
> This patch adds support for L3C PMU driver in HiSilicon SoC chip, Each
> L3C has own control, counter and interrupt registers and is an separate
> PMU. For each L3C PMU, it has 8-programable counters and supports 0x60
> events, event code
Hi Rafael,
This series tries to cleanup the code around transition-latency and its
users. Some of the old legacy code, which may not make much sense now,
is dropped as well. And some code consolidation is also done across
governors.
Based of: v4.13-rc1
Tested on: ARM64 Hikey board.
I have pushed
The cpufreq core and governors aren't supposed to set a limit on how
fast we want to try changing the frequency. This is currently done for
the legacy governors with help of min_sampling_rate.
At worst, we may end up setting the sampling rate to a value lower than
the rate at which frequency can b
Hello Thierry,
I know you may be very busy but do you have any resolution regarding
this series and the one with title
"[PATCH v2 0/2] extends PWM framework to support PWM dead-times"
Thank you,
Claudiu
On 09.05.2017 15:15, Claudiu Beznea - M18063 wrote:
> Extends PWM framework to support PWM mo
Some frameworks (e.g. iio, gpiolib) use irq_work to implement simulated
interrupts that can be 'fired' from process context when needed and
requested just like normal interrupts. This is useful for testing and
development purposes.
Currently this code is reimplemented by every user. This series
pr
Add a resource managed version of irq_sim_init(). This can be
conveniently used in device drivers.
Signed-off-by: Bartosz Golaszewski
---
Documentation/driver-model/devres.txt | 1 +
include/linux/irq_sim.h | 4
kernel/irq_sim.c | 43
Shrink the driver by removing the code dealing with dummy interrupts
and replacing it with calls to the irq_sim API.
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/Kconfig | 2 +-
drivers/gpio/gpio-mockup.c | 77 +-
2 files changed, 8 inser
Implement a simple, irq_work-based framework for simulating
interrupts. Currently the API exposes routines for initializing and
deinitializing the simulator object, enqueueing the interrupts and
retrieving the allocated interrupt numbers based on the offset of the
dummy interrupt in the simulator s
On Wed, 19 Jul 2017, Bartosz Golaszewski wrote:
> Some frameworks (e.g. iio, gpiolib) use irq_work to implement simulated
> interrupts that can be 'fired' from process context when needed and
> requested just like normal interrupts. This is useful for testing and
> development purposes.
>
> Curre
2017-07-19 14:25 GMT+02:00 Thomas Gleixner :
> On Wed, 19 Jul 2017, Bartosz Golaszewski wrote:
>
>> Some frameworks (e.g. iio, gpiolib) use irq_work to implement simulated
>> interrupts that can be 'fired' from process context when needed and
>> requested just like normal interrupts. This is useful
On Wednesday, July 19, 2017 03:42:40 PM Viresh Kumar wrote:
> Hi Rafael,
>
> This series tries to cleanup the code around transition-latency and its
> users. Some of the old legacy code, which may not make much sense now,
> is dropped as well. And some code consolidation is also done across
> gove
Obviously the MODULE_PARM_DESC documentation for
drm_kms_helper.edid_firmware needs some updating before we could
consider this.
Signed-off-by: Jani Nikula
---
Documentation/admin-guide/kernel-parameters.txt| 18 ---
.../admin-guide/module-parameters/drm.rst | 26 +++
Hi Jon, all, here are some quick'n'dirty patches to semi-automatically
generate module param documentation from the source, via module build
and modinfo(8). No polish or proper design, just a hacked up
proof-of-concept to think about.
Do we want nice documentation for module parameters, somewhere
Module parameters are supposed to be documented using MODULE_PARM_DESC
in source. We should be able to use this information to autogenerate
module parameter documentation instead of duplicating that information
manually in kernel-parameters.rst.
Parsing that information directly from the source is
Add a simple script to extract module param info from .ko using
modinfo(8), and convert the results to rst. There's no filtering of rst
special characters or anything.
Signed-off-by: Jani Nikula
---
scripts/modinfo-to-rst | 24
1 file changed, 24 insertions(+)
create mo
A simple helper to update module parameter docs. Probably too simple.
Signed-off-by: Jani Nikula
---
Documentation/admin-guide/module-parameters/README | 4
scripts/modparams-docs-update | 20
2 files changed, 24 insertions(+)
create mode 100755 s
On Wed, 19 Jul 2017, Bartosz Golaszewski wrote:
> 2017-07-19 14:25 GMT+02:00 Thomas Gleixner :
> > On Wed, 19 Jul 2017, Bartosz Golaszewski wrote:
> >
> >> Some frameworks (e.g. iio, gpiolib) use irq_work to implement simulated
> >> interrupts that can be 'fired' from process context when needed a
On Wed 28-06-17 16:01:48, Ross Zwisler wrote:
> To be able to use the common 4k zero page in DAX we need to have our PTE
> fault path look more like our PMD fault path where a PTE entry can be
> marked as dirty and writeable as it is first inserted, rather than waiting
> for a follow-up dax_pfn_mkw
On 19/07/17 14:58, Thomas Gleixner wrote:
> On Wed, 19 Jul 2017, Bartosz Golaszewski wrote:
>
>> 2017-07-19 14:25 GMT+02:00 Thomas Gleixner :
>>> On Wed, 19 Jul 2017, Bartosz Golaszewski wrote:
>>>
Some frameworks (e.g. iio, gpiolib) use irq_work to implement simulated
interrupts that ca
On Mon, Jul 17, 2017 at 3:39 PM, Waiman Long wrote:
> The number of positive dentries is limited by the number of files
> in the filesystems. The number of negative dentries, however,
> has no limit other than the total amount of memory available in
> the system. So a rogue application that genera
On Wed, Jul 19, 2017 at 5:19 PM, Marc Zyngier wrote:
> On 19/07/17 14:58, Thomas Gleixner wrote:
>> On Wed, 19 Jul 2017, Bartosz Golaszewski wrote:
> echo 1 >/proc/irq/9/trigger
> (or the corresponding /sys/kernel/debug/irq/irqs/ interface if we want to
> make sure that this
> is really not for
On Wed, Jul 19, 2017 at 4:49 AM, Christoffer Dall wrote:
> Hi Jintack,
>
> On Tue, Jul 18, 2017 at 10:23:05PM -0400, Jintack Lim wrote:
>> On Tue, Jul 18, 2017 at 12:58 PM, Jintack Lim wrote:
>> > Nested virtualization is the ability to run a virtual machine inside
>> > another
>> > virtual mach
On Wed, 19 Jul 2017, Andy Shevchenko wrote:
> On Wed, Jul 19, 2017 at 5:19 PM, Marc Zyngier wrote:
> > On 19/07/17 14:58, Thomas Gleixner wrote:
> >> On Wed, 19 Jul 2017, Bartosz Golaszewski wrote:
>
> > echo 1 >/proc/irq/9/trigger
> > (or the corresponding /sys/kernel/debug/irq/irqs/ interface
On 07/19/2017 10:39 AM, Miklos Szeredi wrote:
> On Mon, Jul 17, 2017 at 3:39 PM, Waiman Long wrote:
>> The number of positive dentries is limited by the number of files
>> in the filesystems. The number of negative dentries, however,
>> has no limit other than the total amount of memory available
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting
reset lines") started to transition the reset control request API calls
to explicitly state whether the driver needs exclusive or shared reset
control behavior. Add the explicit API calls to the devres list.
Cc: Jonathan Corb
On Wed 28-06-17 16:01:50, Ross Zwisler wrote:
> Another major change is that we remove dax_pfn_mkwrite() from our fault
> flow, and instead rely on the page fault itself to make the PTE dirty and
> writeable. The following description from the patch adding the
> vm_insert_mixed_mkwrite() call expl
On Wed, Jul 19, 2017 at 5:53 PM, Thomas Gleixner wrote:
> On Wed, 19 Jul 2017, Andy Shevchenko wrote:
>> On Wed, Jul 19, 2017 at 5:19 PM, Marc Zyngier wrote:
>> > echo 1 >/proc/irq/9/trigger
>> > (or the corresponding /sys/kernel/debug/irq/irqs/ interface if we want to
>> > make sure that this
On Wed, Jul 19, 2017 at 05:33:14PM +0200, Jan Kara wrote:
> On Wed 28-06-17 16:01:50, Ross Zwisler wrote:
> > Another major change is that we remove dax_pfn_mkwrite() from our fault
> > flow, and instead rely on the page fault itself to make the PTE dirty and
> > writeable. The following descripti
On Mon, Jul 17, 2017 at 05:24:42PM +0900, Akira Yokosawa wrote:
> >From b798b9b631e237d285aa8699da00bfb8ced33bea Mon Sep 17 00:00:00 2001
> From: Akira Yokosawa
> Date: Mon, 17 Jul 2017 16:25:33 +0900
> Subject: [PATCH] documentation: Fix two-CPU control-dependency example
>
> In commit 5646f7acc
On Wed, Jul 19, 2017 at 04:16:59PM +0200, Jan Kara wrote:
> On Wed 28-06-17 16:01:48, Ross Zwisler wrote:
> > To be able to use the common 4k zero page in DAX we need to have our PTE
> > fault path look more like our PMD fault path where a PTE entry can be
> > marked as dirty and writeable as it is
On Mon, Jul 17, 2017 at 3:39 PM, Waiman Long wrote:
> The number of positive dentries is limited by the number of files
> in the filesystems. The number of negative dentries, however,
> has no limit other than the total amount of memory available in
> the system. So a rogue application that genera
On 07/19/2017 04:24 PM, Miklos Szeredi wrote:
> On Mon, Jul 17, 2017 at 3:39 PM, Waiman Long wrote:
>> The number of positive dentries is limited by the number of files
>> in the filesystems. The number of negative dentries, however,
>> has no limit other than the total amount of memory available
On 2017/07/20 2:43, Paul E. McKenney wrote:
> On Mon, Jul 17, 2017 at 05:24:42PM +0900, Akira Yokosawa wrote:
>> >From b798b9b631e237d285aa8699da00bfb8ced33bea Mon Sep 17 00:00:00 2001
>> From: Akira Yokosawa
>> Date: Mon, 17 Jul 2017 16:25:33 +0900
>> Subject: [PATCH] documentation: Fix two-CPU c
On Thu, Jul 20, 2017 at 06:33:26AM +0900, Akira Yokosawa wrote:
> On 2017/07/20 2:43, Paul E. McKenney wrote:
> > On Mon, Jul 17, 2017 at 05:24:42PM +0900, Akira Yokosawa wrote:
> >> >From b798b9b631e237d285aa8699da00bfb8ced33bea Mon Sep 17 00:00:00 2001
> >> From: Akira Yokosawa
> >> Date: Mon, 1
On Wed, Jul 19, 2017 at 11:51:12AM -0600, Ross Zwisler wrote:
> On Wed, Jul 19, 2017 at 04:16:59PM +0200, Jan Kara wrote:
> > On Wed 28-06-17 16:01:48, Ross Zwisler wrote:
> > > To be able to use the common 4k zero page in DAX we need to have our PTE
> > > fault path look more like our PMD fault pa
On Wed, Jul 19, 2017 at 02:56:02PM -0700, Paul E. McKenney wrote:
> On Thu, Jul 20, 2017 at 06:33:26AM +0900, Akira Yokosawa wrote:
> > On 2017/07/20 2:43, Paul E. McKenney wrote:
> > > On Mon, Jul 17, 2017 at 05:24:42PM +0900, Akira Yokosawa wrote:
> > >> >From b798b9b631e237d285aa8699da00bfb8ced3
On Thu, Jul 20, 2017 at 09:31:41AM +0800, Boqun Feng wrote:
> On Wed, Jul 19, 2017 at 02:56:02PM -0700, Paul E. McKenney wrote:
> > On Thu, Jul 20, 2017 at 06:33:26AM +0900, Akira Yokosawa wrote:
> > > On 2017/07/20 2:43, Paul E. McKenney wrote:
> > > > On Mon, Jul 17, 2017 at 05:24:42PM +0900, Aki
.
> /*
> @@ -116,8 +104,8 @@ int __hash_page_4K(unsigned long ea, unsigned long
> access, unsigned long vsid,
>* On hash insert failure we use old pte value and we don't
>* want slot information there if we have a insert failure.
>*/
> -
Ram Pai writes:
> Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6
> in the 64K backed HPTE pages. This along with the earlier
> patch will entirely free up the four bits from 64K PTE.
> The bit numbers are big-endian as defined in the ISA3.0
>
> This patch does the following chan
Ram Pai writes:
> Introduce pte_set_hash_slot().It sets the (H_PAGE_F_SECOND|H_PAGE_F_GIX)
> bits at the appropriate location in the PTE of 4K PTE. For
> 64K PTE, it sets the bits in the second part of the PTE. Though
> the implementation for the former just needs the s
Ram Pai writes:
> Introduce pte_get_hash_gslot()() which returns the slot number of the
> HPTE in the global hash table.
>
> This function will come in handy as we work towards re-arranging the
> PTE bits in the later patches.
>
Reviewed-by: Aneesh Kumar K.V
> Signed-off-by: Ram Pai
> ---
>
Ram Pai writes:
> The H_PAGE_F_SECOND,H_PAGE_F_GIX are not in the 64K main-PTE.
> capture these changes in the dump pte report.
>
Reviewed-by: Aneesh Kumar K.V
> Signed-off-by: Ram Pai
> ---
> arch/powerpc/mm/dump_linuxpagetables.c |3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(
Ram Pai writes:
> replace redundant code in __hash_page_64K() with helper
> functions pte_get_hash_gslot() and pte_set_hash_slot()
>
Reviewed-by: Aneesh Kumar K.V
> Signed-off-by: Ram Pai
> ---
> arch/powerpc/mm/hash64_64k.c | 24
> 1 files changed, 4 insertions(+
Ram Pai writes:
> replace redundant code in __hash_page_huge() with helper
> functions pte_get_hash_gslot() and pte_set_hash_slot()
>
Can you fold all the helper function usage into one patch ?
> Signed-off-by: Ram Pai
> ---
> arch/powerpc/mm/hugetlbpage-hash64.c | 24 -
Ram Pai writes:
> basic setup to initialize the pkey system. Only 64K kernel in HPT
> mode, enables the pkey system.
>
> Signed-off-by: Ram Pai
> ---
> arch/powerpc/Kconfig | 16 ++
> arch/powerpc/include/asm/mmu_context.h |5 +++
> arch/powerpc/include/asm/pkeys
On Wed, Jul 19, 2017 at 10:47:04PM -0700, Paul E. McKenney wrote:
[...]
> > Hi Paul,
> >
> > I know the compiler could optimize atomics in very interesting ways, but
> > this case is about volatile, so I guess our case is still fine? ;-)
>
> Hello, Boqun,
>
> When I asked that question, the answ
Ram Pai writes:
> Map the PTE protection key bits to the HPTE key protection bits,
> while creating HPTE entries.
>
Reviewed-by: Aneesh Kumar K.V
> Signed-off-by: Ram Pai
> ---
> arch/powerpc/include/asm/book3s/64/mmu-hash.h |5 +
> arch/powerpc/include/asm/pkeys.h | 1
Ram Pai writes:
> helper function that checks if the read/write/execute is allowed
> on the pte.
>
> Signed-off-by: Ram Pai
> ---
> arch/powerpc/include/asm/book3s/64/pgtable.h |4 +++
> arch/powerpc/include/asm/pkeys.h | 12 +
> arch/powerpc/mm/pkeys.c
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