On Sat, May 27, 2017 at 6:22 PM, Icenowy Zheng wrote:
> Allwinner R40 is a new SoC, with Quad Core Cortex-A7 and peripherals
> like A20.
>
> Add support for it.
>
> Signed-off-by: Icenowy Zheng
> ---
> Changes in v3:
> - Use V1.0 documents.
>
> Documentation/arm/sunxi/README | 6
On Sat, May 27, 2017 at 6:23 PM, Icenowy Zheng wrote:
> Allwinner A10, A20 and R40 SoCs have similar GPIO layout.
>
> Add SoC definitions in pinctrl-sunxi.h, in order to merge A20 support
> into A10 driver, and add R40 support into it.
>
> Signed-off-by: Icenowy Zheng
Reviewed-by: Chen-Yu Tsai
On Sat, May 27, 2017 at 6:23 PM, Icenowy Zheng wrote:
> As A20 is designed as a pin-compatible upgrade of A10, their pin
> controller are very similar, and can share one driver.
>
> Add A20 support to the A10 driver.
>
> Signed-off-by: Icenowy Zheng
Reviewed-by: Chen-Yu Tsai
--
To unsubscribe f
On Sat, May 27, 2017 at 6:23 PM, Icenowy Zheng wrote:
> As we added A20 support to A10 pinctrl driver, now we can delete the
> dedicated A20 pinctrl driver, which is duplicated code.
>
> Signed-off-by: Icenowy Zheng
> ---
> Changes in v3:
> - Only remove the A20 driver(A10 driver for A20 is enabl
On Sat, May 27, 2017 at 6:23 PM, Icenowy Zheng wrote:
> Allwinner R40 has a pin controller like the ones in older Allwinner SoCs
> (especially A20), and can use modified version of the A10/A20 pinctrl
> driver.
>
> Add a compatible string for it.
>
> Signed-off-by: Icenowy Zheng
> Acked-by: Rob H
On Sat, May 27, 2017 at 6:23 PM, Icenowy Zheng wrote:
> Allwinner R40 has a clock controlling unit like the ones on other
> Allwinner SoCs after sun6i, and can also use a CCU-based driver.
>
> Add a compatible string for it.
>
> Signed-off-by: Icenowy Zheng
> Acked-by: Rob Herring
Reviewed-by:
